CN108297697B

CN108297697B - Eddy current retarder controller based on PWM control mode and control method thereof

Info

Publication number: CN108297697B
Application number: CN201710024187.2A
Authority: CN
Inventors: 韦昱灵
Original assignee: Guangdong Xiantong Industrial Control Co ltd
Current assignee: Guangdong Xiantong Industrial Control Co.,Ltd.
Priority date: 2017-01-13
Filing date: 2017-01-13
Publication date: 2021-06-18
Anticipated expiration: 2037-01-13
Also published as: CN108297697A

Abstract

The invention discloses an eddy current retarder controller based on a PWM control mode and a control method thereof, and the eddy current retarder controller comprises a clamping circuit, a power chip U1, a digital input sampling circuit U13, an analog input sampling circuit U14, an indicator lamp and alarm driving circuit U6, a single chip microcomputer U4 and a CAN bus transceiving chip U11, wherein the clamping circuit is formed by connecting a voltage stabilizing diode Z1, a voltage stabilizing diode Z2 and a voltage stabilizing diode Z3 in parallel. The invention takes the singlechip as a working core, can completely realize the functions of constant current, short-circuit protection, temperature protection and smooth gradual change of gear switching, and can reprogram programs to calibrate the values of the temperature protection, the constant current and the short-circuit protection according to the requirements of customers without changing hardware circuits, thereby having more flexible application.

Description

Eddy current retarder controller based on PWM control mode and control method thereof

Technical Field

The invention relates to the technical field of automobile parts, in particular to an eddy current retarder controller based on a PWM control mode and a control method thereof.

Background

In order to continuously reduce or maintain a stable vehicle speed and reduce or release the load of a driving brake for a long time when an automobile frequently runs in a mountain area or a hilly area, an auxiliary brake deceleration device such as a retarder is generally required to be additionally installed.

In recent years, more and more passenger car manufacturers in China mark or select the eddy current retarder as a product, the eddy current retarder improves the safety, the economy and the comfort of passenger car driving, the existing eddy current retarder is mostly controlled by a large-current relay in a grading way, the relay is generally classified into 2-grade, 3-grade and 4-grade, the switching between the grades is direct switching, and the change of the braking torque is discontinuous; the eddy current retarder is generally controlled by a mechanical handle switch, the switching sequence of the handle switch is always fixed and generally carried out from 1 gear to the last gear, the control mode always leads the front gear to be preferentially in a working state, the working positions of the control relay and the retarder are in a serious unbalance state, and the service life is greatly shortened.

In another situation, under the condition that the control handle is not completely opened at gears, the braking torque of the retarder is seriously eccentric, so that the change of a mechanical structure is caused, the service life of the retarder is also reduced, and a controller adopting a relay control mode cannot realize advanced control functions such as constant current, short-circuit protection, temperature protection and the like; the PWM retarder controller realizes graded control of retarding in a PWM control mode, smooth switching can be realized during gear shifting, and all gears are powered simultaneously all the time (except when the load is abnormal), so that the problem of eccentricity of braking torque of the retarder can not occur, and meanwhile, the functions of constant current, short circuit protection and temperature protection can also be realized.

Disclosure of Invention

The invention aims to provide an eddy current retarder controller based on a PWM control mode and a control method thereof, wherein the eddy current retarder is a novel non-contact type speed reducing device, has high braking efficiency, can stabilize the speed, reduce the temperature of a wheel brake, prolong the service life of a friction plate and improve the safety and smoothness of automobile driving; to solve the problems set forth in the background art described above.

In order to achieve the purpose, the invention provides the following technical scheme: an eddy current retarder controller based on a PWM control mode comprises a clamping circuit, a power chip U1, a digital input sampling circuit U13, an analog input sampling circuit U14, an indicator lamp and alarm driving circuit U6, a single chip microcomputer U4 and a CAN bus transceiving chip U11, wherein the clamping circuit is formed by connecting a voltage stabilizing diode Z1, a voltage stabilizing diode Z2 and a voltage stabilizing diode Z3 in parallel; the Vin end of the power chip U1 is connected in series with a resistor R1 and a diode D1,

pins

6 and 7 of the power chip U1 are connected in series with the anode of a voltage stabilizing diode Z4 and are grounded, the cathode of the voltage stabilizing diode Z4 is connected to the Vin end of the power chip U1, and a capacitor C1 is connected in parallel to the voltage stabilizing diode Z4; pin 1 of the Zener diode Z4 is connected to 5V voltage,

pins

2 and 3 of the power supply chip U1 are connected in parallel and connected to a capacitor C2, and the capacitor C is connected to pin 1 of the Zener diode Z4;

the single chip microcomputer U4 is also connected with a current sampling circuit, the current sampling circuit is composed of a chip U2, a chip U5, a chip U8 and a chip U10, and the chip U2, the chip U5, the chip U8 and the chip U10 respectively convert voltages at the ends of a current sampling resistor R4, a resistor R9, a resistor R14 and a resistor R21 into corresponding voltage values for the single chip microcomputer U4 to sample.

Preferably, pin 1, pin 2, pin 3, and pin 4 of the digital input sampling circuit U13 are input terminals of a lever switch in 1 st gear, 2 nd gear, 3 rd gear, and 4 th gear, respectively; a pin Speed of the digital input sampling circuit U13 is a vehicle Speed signal input end, and a pin ABS of the digital input sampling circuit U13 is a vehicle ABS signal input end; the digital input sampling circuit U13 is also externally connected with a 5V voltage power supply.

Preferably, a pin Temp of the analog input sampling circuit U14 is a retarder temperature input end, a pin padal is a vehicle accelerator signal input end, and the analog input sampling circuit U14 filters and converts vehicle signals and inputs the filtered and converted vehicle signals to the single chip microcomputer U4.

Preferably, a power LED of a pin of the indicator lamp and alarm driving circuit U6 is a retarder working indicator lamp; pin LED1 is retarder 1 shelves during operation pilot lamp, and pin LED2 is retarder 2 shelves during operation pilot lamp, and pin LED3 is retarder 3 shelves during operation pilot lamp, and pin LED4 is retarder 4 shelves during operation pilot lamp, and pin Buzzer is the pilot lamp when the retarder is unusual.

Preferably,

pins

1 and 2 of the single chip microcomputer U4 are connected in series with a capacitor C4 and a capacitor C5, the capacitor C4 is connected in parallel with a capacitor C3, and the capacitor C5 is connected in parallel with a capacitor C6; the single chip microcomputer U4 is further connected with a crystal oscillator X1, a capacitor C8 and a capacitor C9 to form a crystal oscillation circuit.

Preferably, the CAN bus transceiver chip U11 receives and transmits messages through the single chip microcomputer U4; the CAN bus transceiver chip U11 is connected in series with a current limiting resistor R18 and a current limiting resistor R23, and a pin CANSTB of the CAN bus transceiver chip U11 is connected with a pull-up resistor R17; a pin CAN _ H and a pin CAN _ L of the CAN bus transceiving chip U11 are clamped and connected with a common-mode inductor L5, a filter capacitor C10, a filter capacitor C12 and a diode D6; the CAN bus transceiver chip U11 is also connected with a capacitor C11 and grounded.

Preferably, the resistor R2, the resistor R7, the resistor R12 and the resistor R19 are all current-limiting resistors of the single chip microcomputer U4.

Another object of the present invention is to provide a control method for an eddy current retarder controller based on a PWM control method, including the following steps:

s1: when the single-chip microcomputer U4 obtains signals of the IGBT module Q1, the IGBT module Q2, the IGBT module Q3 or the IGBT module Q4 from the input circuit, the waveforms with the duty ratios of 25%, 50%, 75% and 100% are controlled to be output to the IGBT module Q1, the IGBT module Q2, the IGBT module Q3 or the IGBT module Q4 in a PWM control mode, and therefore output of different braking torques of the retarder is achieved;

s2: when the gears are switched, the PWM control waveform is gradually changed in a smooth gradual change mode so as to realize smooth gradual change of the braking torque;

s3: when the current sampling circuit finds that the retarder coil L1, the coil L2, the coil L3 and the coil L4 are over-current or over-temperature, the duty ratio of PWM is reduced; the IGBT module Q1, the IGBT module Q2, the IGBT module Q3, or the IGBT module Q4 are immediately turned off when the retarder coil L1, the coil L2, the coil L3, or the coil L4 is found to be short-circuited to avoid the retarder coil being damaged;

s4: when the ABS has signal input, the controller is turned off no matter where the handle switch is; when the controller receives the accelerator pedal signal, the controller output will be turned off regardless of the position of the handle switch.

Compared with the prior art, the invention has the beneficial effects that:

1. according to the control method of the controller of the eddy current retarder based on the PWM control mode, the singlechip is used for controlling the eddy current retarder in the PWM control mode so as to realize smooth braking and avoid the eccentricity of braking torque; the voltage stabilizing diode Z1, the voltage stabilizing diode Z2, the voltage stabilizing diode Z3 and the voltage stabilizing diode Z4 adopt a high-power TVS to provide protection for the whole circuit; the core control is completed with relatively low cost by adopting a low-side driving mode; meanwhile, the current of each retarder coil is sampled and processed by a single chip microcomputer to realize constant current and short circuit protection; the module integrates the function of a speed switch, and simultaneously has the CAN bus communication function.

2. The control method of the eddy current retarder controller based on the PWM control mode controls the retarder coils L1, L2, L3 and L4 in a low-side driving mode, and the advantage of the low-side driving mode is that a driving circuit is simple in structure and low in cost. The problem of the service life of the controller and the retarder coil can be well solved, and the electronic eddy current retarder controller is contactless, so long as the design is reasonable, the service life of the electronic eddy current retarder controller far exceeds that of a mechanical relay type controller. The invention takes the single chip as a working core, can completely realize the functions of constant current, short-circuit protection, temperature protection and smooth gradual change of gear switching, and can reprogram programs to calibrate the values of the temperature protection, the constant current and the short-circuit protection according to the requirements of customers without changing hardware circuits, thereby having more flexible application.

3. According to the control method of the eddy current retarder controller based on the PWM control mode, the controller is provided with the CAN bus module, and CAN send self state information to the bus or receive vehicle body signals from the bus, so that the module is more flexible to apply, and the functions are more complete.

Drawings

FIG. 1 is a schematic diagram of a single chip microcomputer circuit of the present invention;

FIG. 2 is a schematic diagram of the clamping circuit of the present invention;

FIG. 3 is a schematic circuit diagram of a power chip of the present invention;

FIG. 4 is a schematic diagram of a digital input sampling circuit of the present invention;

FIG. 5 is a schematic diagram of an analog input sampling circuit of the present invention;

FIG. 6 is a schematic diagram of the indicator light and alarm drive circuit of the present invention;

FIG. 7 is a schematic diagram of a CAN bus transceiver chip circuit of the present invention;

FIG. 8 is a schematic diagram of the present invention Q1 controlled by PWM;

FIG. 9 is a schematic diagram of the present invention Q2 controlled by PWM;

FIG. 10 is a schematic diagram of the present invention Q3 controlled by PWM;

FIG. 11 is a schematic diagram of the present invention Q4 controlled by PWM;

FIG. 12 is a waveform diagram of the Q1 of the present invention controlled by PWM to have an output duty cycle of 25%;

FIG. 13 is a waveform diagram of the Q2 of the present invention controlled by PWM to have an output duty cycle of 50%;

FIG. 14 is a waveform diagram of the Q3 of the present invention controlled by PWM to have an output duty cycle of 75%;

fig. 15 is a waveform diagram of the output duty ratio of the Q4 controlled by PWM according to the present invention as 100%.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1-15, the present invention provides a technical solution: a controller of an eddy current retarder based on a PWM control mode and a control method thereof comprise a clamping circuit, a power chip U1, a digital input sampling circuit U13, an analog input sampling circuit U14, an indicator lamp and alarm drive circuit U6, a singlechip U4 and a CAN bus transceiver chip U11, wherein the clamping circuit is formed by connecting a voltage stabilizing diode Z1, a voltage stabilizing diode Z2 and a voltage stabilizing diode Z3 in parallel; the Vin end of the power chip U1 is connected in series with a resistor R1 and a diode D1,

pins

2 and 3 of the power supply chip U1 are connected in parallel and connected to a capacitor C2, and the capacitor C is connected to pin 1 of the Zener diode Z4; the voltage stabilizing diode Z1, the voltage stabilizing diode Z2 and the voltage stabilizing diode Z3 are high-power TVSs to form a clamping circuit, and when the voltage of an input power supply is too high, the clamping circuit clamps the voltage to a reasonable range to protect the whole circuit; the power chip U1 provides stable power for the circuit, and the diode D1 only allows current to flow from the Vin end of the power chip U1, but not from the GND end; the resistor R1 and the voltage-stabilizing diode Z1 form a clamping circuit, and when the input power supply voltage is too high, the clamping circuit clamps the voltage input to the power supply chip U1 to a reasonable range; the capacitor C1 is a filter capacitor and is used for filtering the input power supply; the capacitor C2 is a filter capacitor and filters the output power.

Pins (1-4) of the digital input sampling circuit U13 are respectively the input ends of the handle switches (1-4); a pin 'Speed' of the digital input sampling circuit U13 is a vehicle Speed signal input end, and a pin 'ABS' of the digital input sampling circuit U13 is a vehicle ABS signal input end; the digital input sampling circuit U13 is also externally connected with a 5V voltage for power supply; the digital input sampling circuit U13 converts the level that the vehicle non-singlechip U4 (MCU) can receive into the level that the singlechip U4 can receive.

The 'temp.' end of the analog input sampling circuit U14 is a retarder temperature input end, the 'Pedal' end is a vehicle accelerator signal input end, and the analog input sampling circuit U14 inputs a vehicle signal to the singlechip U4 after filtering and converting the vehicle signal.

In an indicator lamp and alarm drive circuit U6, a power LED is a retarder work indicator lamp; the LED1 is an indicator lamp when the retarder works in the 1 gear, the LED2 is an indicator lamp when the retarder works in the 2 gear, the LED3 is an indicator lamp when the retarder works in the 3 gear, the LED4 is an indicator lamp when the retarder works in the 4 gear, and the Buzzer is an indicator lamp when the retarder is abnormal (exceeds a set temperature, is short-circuited or is broken).

Pins

1 and 2 of the singlechip U4 are connected with a capacitor C4 and a capacitor C5 in series, the capacitor C4 is connected with the capacitor C3 in parallel, and the capacitor C5 is connected with a capacitor C6 in parallel; the single chip microcomputer U4 (MCU) is a core device of the circuit, the processing work of signals is completed by executing a program burnt into the chip, and the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6 and the capacitor C7 are all filter capacitors and filter the power supply of the single chip microcomputer; the single chip microcomputer U4 is further connected with a crystal oscillator X1, a capacitor C8 and a capacitor C9 to form a crystal oscillation circuit, and stable working frequency is provided for the single chip microcomputer U4.

The CAN bus transceiver chip U11 receives and sends messages through the singlechip U4; the CAN bus transceiver chip U11 is connected in series with a current-limiting resistor R18 and a current-limiting resistor R23, and a CANSTB pin of the CAN bus transceiver chip U11 is connected with a pull-up resistor R17; the CAN _ H and CAN _ L of the CAN bus transceiving chip U11 are clamped and connected with a common-mode inductor L5, filter capacitors C10 and C12 and a diode D6; the pin of the CAN bus transceiver chip U11 is also connected with a capacitor C11 and grounded; common mode inductance L5 filters out common mode interference for CAN _ H and CAN _ L.

The single chip microcomputer U4 is also connected with a current sampling circuit, the current sampling circuit is composed of a chip U2, a chip U5, a chip U8 and a chip U10, and the chip U2, the chip U5, the chip U8 and the chip U10 respectively convert voltages at the ends of a current sampling resistor R4, a resistor R9, a resistor R14 and a resistor R21 into corresponding voltage values for the single chip microcomputer U4 to sample; the resistor R2, the resistor R7, the resistor R12 and the resistor R19 are all current-limiting resistors of the singlechip U4.

A control method of an eddy current retarder controller based on a PWM control mode comprises the following steps:

the first step is as follows: when the single-chip microcomputer U4 obtains signals of the IGBT module Q1, the IGBT module Q2, the IGBT module Q3 or the IGBT module Q4 from the input circuit, the waveforms with the duty ratios of 25%, 50%, 75% and 100% are controlled to be output to the IGBT module Q1, the IGBT module Q2, the IGBT module Q3 or the IGBT module Q4 in a PWM control mode, and therefore output of different braking torques of the retarder is achieved;

the second step is that: when the gears are switched, the PWM control waveform is gradually changed in a smooth gradual change mode so as to realize smooth gradual change of the braking torque;

the third step: when the current sampling circuit finds that the retarder coil L1, the coil L2, the coil L3 and the coil L4 are over-current or over-temperature, the duty ratio of PWM is reduced; the IGBT module Q1, the IGBT module Q2, the IGBT module Q3, or the IGBT module Q4 are immediately turned off when the retarder coil L1, the coil L2, the coil L3, or the coil L4 is found to be short-circuited to avoid the retarder coil being damaged;

the fourth step: when the ABS has signal input, the controller is turned off no matter where the handle switch is; when the controller receives the accelerator pedal signal, the controller output will be turned off regardless of the position of the handle switch.

The speed switch integrates the function of the speed switch, namely, when the speed is too low, even if a handle switch signal is input, the retarder is also closed by the controller, so that the power supply of the whole vehicle is prevented from being consumed; when the single chip microcomputer obtains signals of 1-gear, 2-gear, 3-gear or 4-gear of the handle switch from the input circuit, waveforms with output duty ratios of 25%, 50%, 75% and 100% are controlled by Q1, Q2, Q3 and Q4 in a PWM control mode, so that different braking torques of the retarder are output; when the gears are switched, the PWM control waveform is gradually changed in a smooth gradual change mode so as to realize smooth gradual change of the braking torque. When the current sampling circuit finds that the retarder coils L1, L2, L3 and L4 are over-current or over-temperature, the duty ratio of PWM is reduced, so that the purposes of constant current and over-temperature protection are achieved; the Q1, Q2, Q3, Q4 are switched off immediately when the "retarder coil" is found to be short-circuited to avoid damage to the "retarder coil".

In the fourth step of the control method of the eddy current retarder controller based on the PWM control mode, the controller is also applicable to the 2-gear or 3-gear controller, and the modification can be completed by removing unnecessary circuits on the basis of the present invention.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.

Claims

1. The utility model provides an eddy current retarder controller based on PWM control mode, includes clamp circuit, power chip U1, digital input sampling circuit U13, analog input sampling circuit U14, pilot lamp and alarm drive circuit U6, singlechip U4 and CAN bus transceiver chip U11, its characterized in that: the clamping circuit is formed by connecting a voltage stabilizing diode Z1, a voltage stabilizing diode Z2 and a voltage stabilizing diode Z3 in parallel; the Vin end of the power chip U1 is connected in series with a resistor R1 and a diode D1, pins 6 and 7 of the power chip U1 are connected in series with the anode of a voltage stabilizing diode Z4 and are grounded, the cathode of the voltage stabilizing diode Z4 is connected to the Vin end of the power chip U1, and a capacitor C1 is connected in parallel to the voltage stabilizing diode Z4; pin 1 of the Zener diode Z4 is connected to 5V voltage, pins 2 and 3 of the power supply chip U1 are connected in parallel and connected to a capacitor C2, and the capacitor C is connected to pin 1 of the Zener diode Z4;

the single chip microcomputer U4 is also connected with a current sampling circuit, the current sampling circuit is composed of a chip U2, a chip U5, a chip U8 and a chip U10, and the chip U2, the chip U5, the chip U8 and the chip U10 respectively convert voltages at the ends of a current sampling resistor R4, a resistor R9, a resistor R14 and a resistor R21 into corresponding voltage values for the single chip microcomputer U4 to sample;

pin 1, pin 2, pin 3 and pin 4 of the digital input sampling circuit U13 are input ends of a 1-gear, a 2-gear, a 3-gear and a 4-gear of the handle switch respectively; a pin Speed of the digital input sampling circuit U13 is a vehicle Speed signal input end, and a pin ABS of the digital input sampling circuit U13 is a vehicle ABS signal input end; the digital input sampling circuit U13 is also externally connected with a 5V voltage for power supply;

the pin Temp of the analog input sampling circuit U14 is a retarder temperature input end, the pin Pedal is a vehicle accelerator signal input end, and the analog input sampling circuit U14 filters and converts vehicle signals and then inputs the vehicle signals to the single chip microcomputer U4;

the power LED of the pin of the indicator light and alarm driving circuit U6 is a retarder working indicator light; the pin LED1 is an indicator lamp for the working condition of the retarder 1, the pin LED2 is an indicator lamp for the working condition of the retarder 2, the pin LED3 is an indicator lamp for the working condition of the retarder 3, the pin LED4 is an indicator lamp for the working condition of the retarder 4, and the pin Buzzer is an indicator lamp for the abnormal condition of the retarder;

pins 1 and 2 of the singlechip U4 are connected with a capacitor C4 and a capacitor C5 in series, the capacitor C4 is connected with a capacitor C3 in parallel, and the capacitor C5 is connected with a capacitor C6 in parallel; the single chip microcomputer U4 is also connected with a crystal oscillator X1, a capacitor C8 and a capacitor C9 to form a crystal oscillation circuit;

the CAN bus transceiver chip U11 receives and sends messages through the singlechip U4; the CAN bus transceiver chip U11 is connected in series with a current limiting resistor R18 and a current limiting resistor R23, and a pin CANSTB of the CAN bus transceiver chip U11 is connected with a pull-up resistor R17; a pin CAN _ H and a pin CAN _ L of the CAN bus transceiving chip U11 are clamped and connected with a common-mode inductor L5, a filter capacitor C10, a filter capacitor C12 and a diode D6; the CAN bus transceiver chip U11 is also connected with a capacitor C11 and grounded;

the resistor R2, the resistor R7, the resistor R12 and the resistor R19 are all current-limiting resistors of the single chip microcomputer U4.

2. The control method of the eddy current retarder controller based on the PWM control mode is characterized by comprising the following steps of:

s1: after the single-chip microcomputer U4 obtains signals of the IGBT module Q1, the IGBT module Q2, the IGBT module Q3 or the IGBT module Q4 from the input circuit, waveforms with the duty ratios of 25%, 50%, 75% and 100% are controlled to be output to the IGBT module Q1, the IGBT module Q2, the IGBT module Q3 and the IGBT module Q4 in a PWM control mode, and therefore output of different braking torques of the retarder is achieved;