CN108288661B - Micro light-emitting diode chip and display panel - Google Patents
Micro light-emitting diode chip and display panel Download PDFInfo
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- CN108288661B CN108288661B CN201710018774.0A CN201710018774A CN108288661B CN 108288661 B CN108288661 B CN 108288661B CN 201710018774 A CN201710018774 A CN 201710018774A CN 108288661 B CN108288661 B CN 108288661B
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- 239000004065 semiconductor Substances 0.000 claims abstract description 113
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- 239000010410 layer Substances 0.000 description 118
- 238000000034 method Methods 0.000 description 20
- 230000008569 process Effects 0.000 description 13
- 239000000463 material Substances 0.000 description 10
- 101100314273 Arabidopsis thaliana TOR1 gene Proteins 0.000 description 7
- 230000002950 deficient Effects 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 6
- 229910002601 GaN Inorganic materials 0.000 description 5
- 235000012431 wafers Nutrition 0.000 description 5
- 239000000969 carrier Substances 0.000 description 4
- 229910052738 indium Inorganic materials 0.000 description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 4
- 101001069810 Homo sapiens Psoriasis susceptibility 1 candidate gene 2 protein Proteins 0.000 description 3
- 102100034249 Psoriasis susceptibility 1 candidate gene 2 protein Human genes 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 230000008439 repair process Effects 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 101100121035 Arabidopsis thaliana GCP2 gene Proteins 0.000 description 2
- 101100478233 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) SPR3 gene Proteins 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 101100478232 Caenorhabditis elegans spr-3 gene Proteins 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides a micro light-emitting diode chip and a display panel. The semiconductor epitaxial structure comprises at least one first type doped semiconductor layer, a plurality of second type doped semiconductor layers and a plurality of light emitting layers arranged at intervals. A light emitting layer is disposed between a first type doped semiconductor layer and a second type doped semiconductor layer. A light emitting layer is located in a light emitting region. The first electrode is electrically connected with the first type doped semiconductor layers. The second electrodes are electrically connected with the second type doped semiconductor layers. In addition, a display panel is also provided. The micro light-emitting diode chip provided by the invention has the advantages that the probability of successful bonding of the display panel using the micro light-emitting diode chip is high, and the manufacturing yield and the image quality are good.
Description
Technical Field
The present invention relates to a Light Emitting Diode chip and a display panel, and more particularly, to a Micro Light Emitting Diode (μ LED) chip and a display panel having the same.
Background
A Micro light emitting diode (Micro LED, μ LED) has a self-luminous display characteristic. Compared with the Organic Light Emitting Diode (OLED) technology which is also self-luminous, the micro-led has high efficiency, long life, and relatively stable material without environmental impact. Therefore, the micro light emitting diode is expected to surpass the organic light emitting diode display technology and become the mainstream of the future display technology.
However, since the micro light emitting diode has a small size, when the electrode on the micro light emitting diode is transferred and bonded (Bonding) to the pad on the back plate of the display panel, the alignment is not easy, and the contact between the micro light emitting diode and the pad is not good. Therefore, the defective contact may cause a defective Pixel (defective Pixel) on the display panel, which may reduce the manufacturing yield of the display panel or deteriorate the image quality of the display panel. In order to solve the above-mentioned problems, the related art provides a plurality of adhesive layers and a plurality of micro light emitting diodes in each sub-pixel region in a display panel and reserves a redundant repair adhesive point. If the display panel is detected to find that: when one of the micro light emitting diodes in the sub-pixel region is a defective product, for example, one of the micro light emitting diodes cannot be turned on, and the other micro light emitting diode is turned on. If the micro light-emitting diodes in each sub-pixel area are detected to be defective, bonding another micro light-emitting diode on the reserved redundancy repair bonding point so as to enable at least one micro light-emitting diode capable of emitting light to be arranged in the sub-pixel area. In the prior art, the generation probability of the dead pixel is reduced by the method. However, such a solution would make the area covered by the whole sub-pixel region too large, and the sub-pixel region contained in each unit area is less, so that the resolution of the whole display panel is limited.
In summary, how to solve the above problems is one of the key points of research and development by researchers in this field.
Disclosure of Invention
The invention provides a micro light-emitting diode chip, which can ensure that a display panel applying the micro light-emitting diode chip has high probability of successful bonding and has good manufacturing yield and image quality.
The invention provides a display panel with good manufacturing yield and image quality.
An embodiment of the invention provides a micro light emitting diode chip. The micro light-emitting diode chip is provided with a plurality of light-emitting areas. The micro light emitting diode chip comprises a semiconductor epitaxial structure, a first electrode and a plurality of second electrodes. The semiconductor epitaxial structure comprises at least one first type doped semiconductor layer, a plurality of second type doped semiconductor layers arranged at intervals and a plurality of light emitting layers arranged at intervals. The light emitting layers are located between the first type doped semiconductor layer and the second type doped semiconductor layers. A light emitting layer is located in a light emitting region. The first electrode is electrically connected with the first type doped semiconductor layer. The second electrodes are arranged at intervals and are electrically connected with the second type doped semiconductor layers.
An embodiment of the invention provides a display panel, which includes a back plate and the plurality of micro light emitting diode chips. A micro light emitting diode chip is located in a sub-pixel region. The backplane includes a plurality of sub-pixel regions. The back plate is electrically connected with the micro light-emitting diode chips and controls the micro light-emitting diode chips to emit light in the corresponding sub-pixel areas.
In an embodiment of the invention, the light emitting regions are independently controlled to emit light.
In an embodiment of the invention, the first electrode and the second electrodes are respectively located at two opposite sides of the semiconductor epitaxial structure.
In an embodiment of the invention, the micro light emitting diode chip further includes an insulating layer. The insulating layer is provided with a plurality of through holes. The first electrode has a main body portion and a plurality of extension portions extending from the main body portion. The insulating layer is positioned between the main body part and the first type doped semiconductor layers. The extending parts of the first electrode are respectively positioned in the through holes and connected to the first type doped semiconductor layer.
In an embodiment of the invention, the semiconductor epitaxial structure includes a plurality of first-type doped semiconductor layers. The first electrode is electrically connected with the first type doped semiconductor layers.
In an embodiment of the invention, the first electrode and the second electrodes are located on the same side of the semiconductor epitaxial structure.
In an embodiment of the invention, the semiconductor epitaxial structure has a trench. The grooves separate the light-emitting layers and the second type doped semiconductor layers. The first electrode is electrically connected with the first type semiconductor layer through the groove.
In an embodiment of the invention, the micro light emitting diode chip has an insulating layer. The insulating layer is positioned between the first electrode and the light-emitting layers and between the second type doped semiconductor layers to electrically insulate the first electrode from the light-emitting layers and the second type doped semiconductor layers.
In an embodiment of the invention, the first type doped semiconductor layer is one of a P type doped semiconductor layer and an N type doped semiconductor layer, and the second type doped semiconductor layer is the other of the P type doped semiconductor layer and the N type doped semiconductor layer.
In an embodiment of the invention, a range of a diagonal length of the micro light emitting diode chip is in a range of 2 micrometers to 250 micrometers.
In an embodiment of the invention, the back plate further includes a plurality of pads. The micro light-emitting diode chips are electrically connected with the back plate through the connecting pads.
In an embodiment of the invention, the number of the pads disposed in each of the sub-pixel regions is the same as the number of the second electrodes of each of the micro light emitting diode chips.
Based on the above, each micro light emitting diode chip in the display panel according to the embodiment of the invention has a plurality of second electrodes and a plurality of light emitting layers disposed corresponding to the second electrodes. In each sub-pixel region of the display panel, when the second electrodes of the micro light-emitting diode chip are connected to the pads on the back plate, as long as one of the second electrodes is connected to one pad in the sub-pixel region, the first type carrier and the second type carrier provided by the back plate can still be combined in one of the light-emitting layers of the micro light-emitting diode chip to emit light beams. In other words, the micro led chip according to the embodiment of the invention has a larger electrode bonding area (for example, a design of a plurality of second electrodes arranged at intervals). When the micro light-emitting diode chip is transferred to the back plate, the probability of successful bonding of the electrode and the connecting pad on the back plate is higher. Therefore, the micro light-emitting diode chip of the embodiment of the invention can reduce the probability of generating dead pixels of the display panel using the micro light-emitting diode chip, thereby improving the manufacturing yield and the image quality of the display panel. Meanwhile, no additional wafer transfer process is needed when the defective pixel is repaired, and compared with the prior art, the display panel provided by the embodiment of the invention has the advantages that the area covered by each sub-pixel area is smaller, and more sub-pixel areas can be contained in each unit area, so that the resolution of the whole display panel is good.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1A is a schematic top view of a display panel according to an embodiment of the invention.
FIG. 1B is a schematic cross-sectional view taken along line A-A' of FIG. 1A.
FIG. 1C is a bottom view of the micro LED chip of the display panel of FIG. 1A.
Fig. 2A is a schematic top view of a display panel according to another embodiment of the invention.
FIG. 2B is a schematic cross-sectional view taken along line B-B' in FIG. 2A.
Fig. 2C is a bottom view of the micro light emitting diode die of fig. 2B.
Fig. 3A is a schematic top view of a display panel according to another embodiment of the invention.
FIG. 3B is a schematic cross-sectional view taken along line C-C' in FIG. 3A
FIG. 4 is a cross-sectional view of a micro light-emitting diode chip according to another embodiment of the present invention.
FIG. 5 is a cross-sectional view of a micro light-emitting diode chip according to another embodiment of the present invention.
Fig. 6A is a bottom view of a micro led chip according to another embodiment of the invention.
FIG. 6B is a cross-sectional view of the micro LED chip of FIG. 6A along line D-D'.
FIG. 7 is a cross-sectional view of a micro light-emitting diode chip according to still another embodiment of the present invention.
Description of the reference numerals
100. 100a, 100b, 100c, 100d, 100e, 100 f: a micro light emitting diode chip;
110: a semiconductor epitaxial structure;
110a, 110 b: a semiconductor sub-epitaxial structure;
112. 1121, 1122, 1123: a first type doped semiconductor layer;
114. 1141,1142, 1143: a light emitting layer;
116. 1161,1162, 1163: a second type doped semiconductor layer;
120: a first electrode;
120 a: a main body portion;
120 b: an extension portion;
130. 130a,130 b: a second electrode;
140: a first insulating layer;
150: a second insulating layer;
200. 200a, 200 b: a display panel;
210: a back plate;
212. 212a, 212b, 2121: a pad;
230. 230 a: a conductive member;
A-A ', B-B', C-C ', D-D': a section line;
ER: a light emitting region;
l: a diagonal line;
h: through holes are formed;
s1, S2: two sides;
SPR, SPR1, SPR2, SPR 3: a sub-pixel region.
Detailed Description
Fig. 1A is a schematic top view of a display panel according to an embodiment of the invention. FIG. 1B is a schematic cross-sectional view taken along line A-A' of FIG. 1A. FIG. 1C is a bottom view of the micro LED chip of the display panel of FIG. 1A. It should be noted that, for clarity, the micro led chip and other film structures are omitted from fig. 1A, and only the bonding positions of the sub-pixel regions and the micro led chip are shown.
Referring to fig. 1A and fig. 1B, in the present embodiment, the display panel 200 includes a back plate 210 and a plurality of micro led chips 100. The back plate 210 has a plurality of sub-pixel regions SPR and a plurality of pads 212. A micro led chip 100 is located in a sub-pixel region SPR. In fig. 1B, the plurality of sub-pixel regions SPR through which the line segment a-a' passes are, for example, three sub-pixel regions SPR1, SPR2, SPR3, or may be less than three sub-pixel regions SPR or more than three sub-pixel regions SPR, which is not limited to the present invention. The backplane 210 further includes a plurality of sub-pixel driving circuits (not shown), and the backplane 210 may be a Semiconductor (Semiconductor) substrate, a Submount (Submount), a Complementary Metal-Oxide-Semiconductor (CMOS) circuit substrate, a Liquid Crystal On Silicon (LCOS) substrate, a Thin Film Transistor (TFT) substrate, or other types of substrates. The pads 212 are electrically connected to a sub-pixel driving circuit (not shown). The back plate 210 is used to control whether the corresponding micro light emitting diode 100 in each sub-pixel region SPR emits light beams or not through the sub-pixel driving circuits, so as to display the image displayed by the panel 200. The operation and implementation of the display panel 200 can be taught, suggested and embodied sufficiently by common knowledge in the art, and thus will not be described in detail. In the present embodiment, the display panel 200 is embodied as a micro light emitting diode display panel. The back plate 210 is embodied as a Thin Film Transistor Substrate (Thin Film Transistor Substrate). The micro led chips 100 are electrically connected to the back plate 210, and more specifically, the micro led chips 100 are electrically connected to the back plate 210 through the pads 212. The back plate 210 controls the micro led chips 100 to emit light in the sub-pixel regions SPR. Referring to fig. 1C, in the present embodiment, the length of the diagonal line L of each micro led chip 100 is, for example, a length in the micrometer scale. In more detail, the length of the diagonal line L of a micro led chip 100 falls within a range of 2 to 250 micrometers, for example.
Referring to fig. 1B and fig. 1C, a micro led chip 100 according to an embodiment of the invention has a plurality of light emitting regions ER, such as two light emitting regions ER, but not limited thereto. The micro light emitting diode chip 100 includes a semiconductor epitaxial structure 110, a first electrode 120, and a plurality of second electrodes 130. The semiconductor epitaxial structure 110 includes at least one first-type doped semiconductor layer 112, a plurality of second-type doped semiconductor layers 116 spaced apart from each other, and a plurality of light emitting layers 114 spaced apart from each other. In this embodiment, for example, there are two first-type doped semiconductor layers 1121, 1122 and two light emitting layers 1141, 1142. The light emitting layers 114 are disposed between the first type doped semiconductor layer 112 and the second type doped semiconductor layers 116, and one light emitting layer 114 is disposed in one light emitting region ER, each of which can independently control light emission. The first electrode 120 is electrically connected to the first type doped semiconductor layers 112. The second electrodes 130 are disposed at intervals and electrically connected to the second type doped semiconductor layers 116.
In detail, the micro light emitting diode chip 100 of the present embodiment is, for example, a Vertical light emitting diode (Vertical type LED). The first electrode 120 and the second electrodes 130 in the micro led chip 100 are respectively located at two opposite sides S1 and S2 of the semiconductor epitaxial structure 110. The first electrode 120 is located on one side S1 of the micro light emitting diode chip 100. The second electrodes 130 are located on the other side S2 of the micro led chip 100, and the second electrodes 130 are located between the back plate 210 and the second type doped semiconductor layers 116.
In the present embodiment, the semiconductor epitaxial structure 110 includes two semiconductor sub-epitaxial structures 110a and 110b separated from each other. These semiconductor sub-epitaxial structures 110a, 110b are independent of each other. The semiconductor sub-epitaxial structures 110a and 110b have a trench N therebetween. The trench N is, for example, air, and in other embodiments, the trench N may be filled with an insulating material, which is not limited by the invention. The semiconductor sub-epitaxial structure 110a includes a first type doped semiconductor layer 1121, a light emitting layer 1141 and a second type doped semiconductor layer 1161. The semiconductor sub-epitaxial structure 110b includes a first type doped semiconductor layer 1122, a light emitting layer 1142 and a second type doped semiconductor layer 1162. In the present embodiment, the trench N is formed by, for example, an etching process, and is formed by, for example, an Inductively-Coupled Plasma (ICP) process, which is not limited by the invention.
In this embodiment, the number of the pads 212 disposed in each sub-pixel region SPR except the sub-pixel region SPR2 is the same as the number of the second electrodes 130 of each micro light emitting diode chip 100 (for example, two pads are provided, but not limited thereto). It should be noted that the configuration of the pads 212 shown in fig. 1A is an example, and the number of the pads 212 disposed in each sub-pixel region SPR is not limited in the present invention. Specifically, in the present embodiment, two pads 212 are disposed in the sub-pixel region SPR1 and are respectively connected to the two second electrodes 130a and 130b of the micro light emitting diode chip. One pad 212 is shown in the sub-pixel region SPR2, which is used to illustrate that one pad is not accurately disposed in the sub-pixel region SPR2 during the process of disposing the pad 212. Two bonding pads 212 are shown in the sub-pixel region SPR3, but the lower bonding pads 212 are slightly shifted from the other bonding pads 212 in the sub-pixel region SPR, which is used to illustrate that the lower bonding pads 212 are shifted due to process factors during the process of disposing the bonding pads 212. In more detail, the display panel 200 further includes a plurality of conductive members 230, and one conductive member 230 is disposed in one sub-pixel region SPR. The micro led chip 100 can independently control whether the light emitting regions ER emit light or not through a driving circuit layout (not shown) of the backplane 210. The material of the conductive member 230 is, for example, a transparent conductive material (such as indium tin oxide), but the invention is not limited thereto.
Specifically, the conductive members 230 are formed by, for example, forming a transparent conductive layer on the micro light emitting diode chips 100 after the micro light emitting diode chips 100 are bonded to the pads 212 on the back plate 210, and the method for forming the transparent conductive layer is, for example, a spin coating method or an evaporation method, which is not limited thereto. Next, a circuit pattern of the conductive member 230 is defined by a yellow light process, so that the conductive member 230 is electrically connected to the first electrode 120, but the invention is not limited to the method for forming the conductive member 230.
In the present embodiment, the back plate 210 provides a first type carrier (e.g., electrons) through the conductive member 230, and provides a second type carrier (e.g., holes) through the contact pads 212 to the micro led chip 100, so that the light emitting layers emit light.
In the present embodiment, the first type doped semiconductor layer 112 is one of a P type doped semiconductor layer and an N type doped semiconductor layer. The second type doped semiconductor layer 114 is the other of the P type doped semiconductor layer and the N type doped semiconductor layer. More specifically, the first type doped semiconductor layer 112 is, for example, an N type doped semiconductor layer, and the second type doped semiconductor layer 114 is, for example, a P type doped semiconductor layer, which is not limited in the invention. The material of the N-type doped semiconductor layer is, for example, N-type gallium nitride (N-GaN), and the material of the P-type doped semiconductor layer is, for example, P-type gallium nitride (P-GaN), which is not limited by the invention. The first type of carrier provided by the back plate 210 is, for example, an Electron (Electron), and the second type of carrier provided by the back plate 210 is, for example, a Hole (Hole), which is not limited in the present invention.
More specifically, the first type carriers in each sub-pixel region SPR sequentially pass through the conductive member 230, the first electrode 120, the first type doped semiconductor layer 112 and are transmitted to the light emitting layer 114 from the back plate 210. The second type carrier is transmitted from the back plate 210 to the light emitting layer 114 through the pad 212, the second electrode 130, and the second type doped semiconductor layer 116 in sequence. As a result, the first type carrier and the second type carrier are recombined in the light emitting layer 114 to emit light beams. Since the micro led chip 100 of the present embodiment has the plurality of second electrodes 130 disposed at intervals, when the micro led chips 100 are transferred and bonded to the pads 212 on the back plate 210, for a single micro led chip 100, at least one light emitting region ER of the plurality of light emitting regions ER can emit light beams as long as one of the second electrodes (130a or 130b) of the plurality of second electrodes 130 is well bonded to the pads 212 on the back plate 210.
Alternatively, even if one semiconductor sub-epitaxial structure is damaged during the transfer process, another semiconductor sub-epitaxial structure may be used to emit light. Furthermore, if the light beam emitted from one of the light-emitting layers 1141 of the micro light-emitting diode chip 100 is not bright enough, the brightness can be compensated by the other light-emitting layer 1142.
In addition, it should be noted that the intensity of the light beams respectively emitted by the light-emitting layers 1141 and 1142 can be adjusted by adjusting the voltage or the current of the back plate 210, but the invention is not limited thereto. That is, the probability of success of bonding the micro led 100 to the display panel 200 is high, and the repaired micro led chip does not need to be transferred additionally. Therefore, the micro led chip 100 of the present embodiment can reduce the probability of generating a dead pixel of the display panel 200 using the micro led chip 100, thereby improving the manufacturing yield and the image quality of the display panel 200. In addition, compared to the prior art, since the redundant bonding points of the two package wafers are not required to be reserved in each sub-pixel region SPR of the display panel 200 of the embodiment, each sub-pixel region SPR may have a smaller area, and the number of sub-pixel regions SPR included in each unit area of the display panel may be increased, thereby improving the resolution of the entire display panel 200.
In the present embodiment, the material of the pad 212 is, for example, selected from indium (In), tin (Sn) or an alloy thereof (In/Sn), which is not limited In the invention. The material of the first electrode 120 and the second electrode 130 is, for example, selected from gold (Au), tin (Sn) or an alloy thereof (Au/Sn), but the invention is not limited thereto. On the other hand, the structure of the light-emitting layer 114 is, for example, a Multi Quantum Well (MQW) structure. The multi-quantum-Well structure includes a plurality of quantum-Well layers (Well) and a plurality of quantum Barrier layers (Barrier) alternately arranged in a repeating manner. Further, the material of the light emitting layer 114 includes, for example, a plurality of layers of indium gallium nitride (InGaN) and a plurality of layers of gallium nitride (GaN) which are alternately stacked, and the ratio of indium or gallium in the light emitting layer 114 is designed to enable the light emitting layer 114 to emit light in different wavelength ranges. It should be noted that the materials of the light emitting layer 114 are only examples, and the materials of the light emitting layer 114 are not limited to indium gallium nitride and gallium nitride.
In addition, in the embodiment, the method of repairing the dead pixel is to select the light emitting region ER to be activated through the connection layout of the second electrodes 130 and the driving circuit in the sub-pixel region SPR, so as to achieve the efficacy of repairing the dead pixel; alternatively, the conductive member 230 and the first electrode 120 may be patterned in a subsequent process to limit a circuit loop to conduct the light-emitting region to be operated, and the repairing methods may be achieved by various circuit layouts of the backplate 210, which is not limited to the embodiment.
It should be noted that, the following embodiments follow the contents of the foregoing embodiments, descriptions of the same technical contents are omitted, reference may be made to the contents of the foregoing embodiments for the same element names, and repeated descriptions of the following embodiments are omitted.
Fig. 2A is a schematic top view of a display panel according to another embodiment of the invention. FIG. 2B is a schematic cross-sectional view taken along line B-B' in FIG. 2A. Fig. 2C is a bottom view of the micro light emitting diode die 100a in fig. 2B. It should be noted that, for clarity, the micro led chip and other film structures are omitted from fig. 2A, and only the bonding positions of the sub-pixel regions and the micro led chip are shown.
Referring to fig. 2A to fig. 2C, the display panel 200a in the present embodiment is substantially similar to the display panel 200 in fig. 1A and fig. 1B, and the main differences are: each sub-pixel region SPR has three pads 212a, 212b, 2121, and the micro light emitting diode chip 100a of the present embodiment is, for example, a Horizontal light emitting diode (Horizontal LED). In addition, the number of the pads 212 disposed in each sub-pixel region SPR is equal to the sum of the number of the first electrodes 120 and the number of the second electrodes 130. Specifically, the first electrode 120 and the second electrodes 130 are located on the same side S2 of the semiconductor epitaxial structure 110. The semiconductor epitaxial structure 110 has a trench N. The trench N separates the light emitting layers 1141 and 1142 and the second type doped semiconductor layers 1161 and 1162. The first electrode 120 is disposed in the trench N and electrically connected to the first type doped semiconductor layers 1121, 1122. In addition, the micro light emitting diode chip 100a further includes a first insulating layer 140. The first insulating layer 140 is disposed between the first electrode 120 and the light emitting layer 1141,1142, and between the first electrode 120 and the second type doped semiconductor layer 1161,1162 to electrically insulate the first electrode 120 from the light emitting layer 1141,1142 and the second type doped semiconductor layer 1161,1162, so as to avoid short circuit. More specifically, the first insulating layer 140 covers sidewalls of the trench N and exposes the first-type doped semiconductor layer 112. The first electrode 120 is filled in the trench N and contacts the first-type doped semiconductor layer 112.
Referring to fig. 2B, in the sub-pixel region SPR with good bonding, the second electrode 130a is electrically connected to the pad 212a, the other second electrode 130B is electrically connected to the pad 212B, and the first electrode 120 is electrically connected to the pad 2121. The first type carriers pass through the pad 2121, the first electrode 120, and the first type doped semiconductor layers 1121, 1122 in sequence from the back plate 210 and are transferred to the light emitting layers 1141, 1142. The second type carriers are sequentially transmitted from the back plate 210 to the light emitting layers 1141 and 1142 through the pads 212a and 212b, the second electrodes 130a and 130b, and the second type doped semiconductor layers 1161 and 1162. However, in the sub-pixel region SPR2, a second electrode 130B of the micro led chip 100a is not effectively electrically connected to the pad 212B, as shown in fig. 2B, it may be that the second electrode 130B cannot be well electrically connected to the pad 212B due to a position error of the pad in the process, but can still be electrically connected to the pad 212a by the second electrode 130 a. Therefore, the back plate 210 may also make the micro led chips 100a in the sub-pixel regions SPR2 emit light. In addition, in the present embodiment, the light emitting region ER to be activated can be selected or a plurality of light emitting regions ER can be turned on simultaneously by the design and repair of the driving circuit. In the embodiment, the defect repairing method is achieved by, for example, laser breaking or bridging in the subsequent process, and the invention is not limited thereto.
Fig. 3A is a schematic top view of a display panel according to another embodiment of the invention, and fig. 3B is a schematic cross-sectional view taken along line C-C' in fig. 3A. It should be noted that, for clarity, the micro led chip and other film structures are omitted from fig. 3A, and only the bonding positions of the sub-pixel regions and the micro led chip are shown.
Referring to fig. 3A and 3B, the display panel 200B in the present embodiment is substantially similar to the display panel 200 in fig. 1A and 1B, and the main differences are: the number of the pads 212 disposed in each sub-pixel region SPR is smaller than the number of the second electrodes 130 of each micro led chip 100 b. Specifically, one pad 212 is disposed in each sub-pixel region SPR of the back plate 210, and the micro led chip 100a is electrically connected to the pad 212 at the side S2 where the first electrode 120 is located. In addition, the trench N of the micro led chip 100b in this embodiment penetrates through the light emitting layer 114, the second type doped semiconductor layer 116 and a portion of the first type doped semiconductor layer 112. The conductive members 230a are respectively disposed on the second electrodes 130a and 130b, and electrically connected to the second electrodes 130a and 130 b. The second electrodes 130a and 130b respectively use the independent conductive element 230a to select the light emitting region ER to be activated. That is, the back plate 210 provides the second type carriers to the micro led chip 100b through the conductive members 230a, so that the light emitting layer 114 in the selected light emitting region ER forms a path to emit light.
As mentioned above, in the present embodiment, the area of the first electrode 120 is substantially equal to the area of the semiconductor epitaxial structure 110. That is, the display panel 200b is bonded to the pad 212 of the backplate 210 through the first electrode 120 having a larger area, so as to improve the yield, and further, the semiconductor sub-epitaxial structure 110 to be operated is selected to emit light through the circuit layout of the conductive member 230a to achieve the repairing effect, so as to improve the display quality and the manufacturing yield of the display panel 200 b.
Referring to fig. 4, a micro led chip 100c according to another embodiment of the invention is shown, the micro led chip 100c is substantially similar to the micro led chip 100 in fig. 1B or the micro led chip 100B in fig. 3B, and the main differences are: the micro light emitting diode chip 100c has four light emitting regions ER. In other embodiments, the number of the light emitting regions ER of the micro light emitting diode chip 100c may be three, for example, and the invention is not limited thereto.
Referring to fig. 5, a micro led chip 100d according to another embodiment of the invention is shown, which can be used to replace the micro led chips in the display panels 200 and 200b in the previous embodiments. The micro led chip 100d in this embodiment is similar to the micro led chip 100 in fig. 1B, and the main difference is: the micro light emitting diode die 100d further includes a second insulating layer 150. The second insulating layer 150 has a plurality of through holes H, such as two through holes H, which is not limited in the invention. The via H penetrates the second insulating layer 150. The first electrode 120 has a main body portion 120a and a plurality of extension portions 120b extending from the main body portion 120 a. The insulating layer 140 is located between the body portion 120a and the first-type doped semiconductor layers 1121, 1122. The extending portions 120b of the first electrode 120 are respectively located in the through holes H, and the extending portions 120b are connected to the first-type doped semiconductor layers 1121, 1122. In the present embodiment, the material of the insulating layer 140 is, for example, Benzocyclobutene (BCB) or Silicon Dioxide (SiO 2), which is not limited by the invention.
Fig. 6A and 6B show another micro led chip 100e according to the present invention. FIG. 6B is a cross-sectional view of the micro LED chip of FIG. 6A along line D-D'.
Referring to fig. 6A and fig. 6B, the micro led chip 100e of the present embodiment is similar to the micro led chip 100a in fig. 2A to fig. 2C, and the first electrode 120 and the plurality of second electrodes 130 are located on the same side, which mainly differs therefrom in that: the first electrode 120 and the second electrode 130 are arranged.
Fig. 7 shows another micro led chip 100f similar to the micro led chip 100e shown in fig. 6A to 6B, the main difference is: the first electrode 120 and the second electrode 130 are arranged.
In summary, each of the micro led chips in the display panel according to the embodiments of the invention has a plurality of second electrodes and a plurality of light emitting layers disposed corresponding to the second electrodes. In each sub-pixel region of the display panel, when the micro light emitting diode chip is abutted to the pad on the back plate, as long as the first type carrier and the second type carrier provided by the back plate can be still compounded in one of the light emitting layers of the micro light emitting diode chip to emit light beams. In other words, the micro led chip according to the embodiment of the invention has a larger electrode bonding area (for example, a design of a plurality of second electrodes arranged at intervals). When the micro light-emitting diode chip is transferred to the back plate, the probability of successful bonding of the electrode and the connecting pad on the back plate is higher. Therefore, the micro light-emitting diode chip of the embodiment of the invention can reduce the probability of generating dead pixels of the display panel using the micro light-emitting diode chip, thereby improving the manufacturing yield and the image quality of the display panel. In addition, compared with the prior art, the display panel of the embodiment of the invention has the advantages that the area covered by each sub-pixel area is smaller, and the number of sub-pixel areas contained in each unit area can be increased, so that the resolution of the whole display panel is good.
In addition, in the display panel according to the embodiment of the invention, the micro light emitting diode wafer is designed to have a plurality of light emitting areas which can be independently controlled (for example, whether each light emitting area in the micro light emitting diode wafer emits light is controlled through the conductive member), so that no additional wafer transfer process is required when a defective pixel needs to be repaired, and the damage of the semiconductor sub-epitaxial structure in the bonding process can be easily repaired.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (9)
1. A display panel, comprising:
a back plate having a plurality of sub-pixel regions; and
a plurality of micro led dies, one of the micro led dies being located in one of the sub-pixel regions, each of the micro led dies having a plurality of light emitting regions, each of the micro led dies comprising:
a semiconductor epitaxial structure, including at least a first type doped semiconductor layer, a plurality of second type doped semiconductor layers arranged at intervals, and a plurality of light emitting layers arranged at intervals, wherein the light emitting layer is located between the first type doped semiconductor layer and the second type doped semiconductor layer, and the light emitting layer is located in the light emitting region;
the first electrode is electrically connected with the first type doped semiconductor layer; and
a plurality of second electrodes arranged at intervals and electrically connected with the second type doped semiconductor layer,
the back plate is electrically connected with the micro light-emitting diode wafer and controls the micro light-emitting diode wafer to emit light in the corresponding sub-pixel region, and the diagonal length of the micro light-emitting diode wafer is within the range of 2-250 micrometers.
2. The display panel of claim 1, wherein the back plate further comprises a plurality of pads, and the micro light emitting diode chip is electrically connected to the back plate through the pads.
3. The display panel of claim 1, wherein the first electrode and the second electrode of each micro led chip are respectively located on two opposite sides of the semiconductor epitaxial structure, and the second electrode is located between the back plate and the second type doped semiconductor layer.
4. The display panel of claim 3, wherein the micro LED chip further comprises an insulating layer having a plurality of through holes, wherein the first electrode has a main portion and a plurality of extension portions extending from the main portion, the insulating layer is disposed between the main portion and the first-type doped semiconductor layer, and the extension portions of the first electrode are respectively disposed in the through holes and connected to the first-type doped semiconductor layer.
5. The display panel according to claim 2, wherein the number of pads disposed in each of the sub-pixel regions is the same as the number of second electrodes of each of the micro light emitting diode chips.
6. The display panel of claim 1, wherein the first electrode and the second electrode of each micro light emitting diode wafer are respectively located on two opposite sides of the semiconductor epitaxial structure, and the first electrode is located between the back plate and the first type doped semiconductor layer.
7. The display panel of claim 1, wherein the first electrode and the second electrode are located on a same side of the semiconductor epitaxial structure.
8. The display panel of claim 7, wherein the semiconductor epitaxial structure of each of the micro light emitting diode chips has a trench separating the light emitting layer and the second type doped semiconductor layer, and the first electrode is electrically connected to the first type semiconductor layer through the trench.
9. The display panel of claim 8, wherein the micro light emitting diode chip has an insulating layer between the first electrode and the light emitting layer and the second type doped semiconductor layer to electrically insulate the first electrode from the light emitting layer and the second type doped semiconductor layer.
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TWI677903B (en) * | 2018-08-24 | 2019-11-21 | 王中林 | Method of arranging chips in a large numbe |
CN109273479B (en) | 2018-09-20 | 2021-07-23 | 上海天马微电子有限公司 | Display panel and manufacturing method thereof |
TWI682531B (en) * | 2019-06-04 | 2020-01-11 | 友達光電股份有限公司 | Display apparatus and manufacturing method thereof |
CN113261104A (en) * | 2019-12-09 | 2021-08-13 | 重庆康佳光电技术研究院有限公司 | Transfer unit, display module and display device of miniature light-emitting diode |
CN113409699A (en) * | 2020-03-16 | 2021-09-17 | 重庆康佳光电技术研究院有限公司 | LED display convenient to repair and repair method thereof |
CN113748452B (en) * | 2020-03-27 | 2022-12-09 | 京东方科技集团股份有限公司 | Display substrate, display method and display device |
CN111477652B (en) * | 2020-04-20 | 2022-07-12 | 錼创显示科技股份有限公司 | Micro light emitting device display device |
TWI743750B (en) | 2020-04-20 | 2021-10-21 | 錼創顯示科技股份有限公司 | Micro light-emitting device display apparatus |
TWI753645B (en) | 2020-11-12 | 2022-01-21 | 錼創顯示科技股份有限公司 | Micro led display and repair method thereof |
CN112331641B (en) * | 2020-11-12 | 2022-09-13 | 錼创显示科技股份有限公司 | Miniature LED display and its repairing method |
CN113540302A (en) * | 2021-06-28 | 2021-10-22 | 成都辰显光电有限公司 | Light-emitting micro-element and display device |
CN114005916A (en) * | 2021-11-01 | 2022-02-01 | 厦门天马微电子有限公司 | Micro light-emitting diode and display panel |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103378233A (en) * | 2012-04-16 | 2013-10-30 | 展晶科技(深圳)有限公司 | Light emitting diode crystal grain and light emitting diode packaging structure using same |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02174272A (en) * | 1988-12-17 | 1990-07-05 | Samsung Electron Co Ltd | Manufacture of light-emitting diode array |
JP3726398B2 (en) * | 1997-02-14 | 2005-12-14 | 富士ゼロックス株式会社 | Semiconductor device |
KR100682255B1 (en) * | 2005-09-27 | 2007-02-15 | 엘지전자 주식회사 | Method for fabricating light emitting diode of vertical type electrode |
JPWO2009118979A1 (en) * | 2008-03-28 | 2011-07-21 | パナソニック株式会社 | Nitride semiconductor light emitting device |
TWI470832B (en) * | 2010-03-08 | 2015-01-21 | Lg Innotek Co Ltd | Light emitting device |
CN102386200B (en) * | 2010-08-27 | 2014-12-31 | 财团法人工业技术研究院 | Light emitting unit array and projection system |
TWI606618B (en) * | 2012-01-03 | 2017-11-21 | Lg伊諾特股份有限公司 | Light emitting device |
TWI479694B (en) * | 2012-01-11 | 2015-04-01 | Formosa Epitaxy Inc | Light emitting diode wafers |
KR101956084B1 (en) * | 2012-08-07 | 2019-03-11 | 엘지이노텍 주식회사 | Light emitting device |
CN104183675B (en) * | 2014-07-10 | 2017-02-22 | 华南理工大学 | GaN-based LED preparation method based on regional laser lift-off and chemical corrosion |
-
2017
- 2017-01-10 CN CN201710018774.0A patent/CN108288661B/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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