CN108287302A - The single particle effect detection circuit structure of space-oriented radiation environment - Google Patents
The single particle effect detection circuit structure of space-oriented radiation environment Download PDFInfo
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- CN108287302A CN108287302A CN201810082173.0A CN201810082173A CN108287302A CN 108287302 A CN108287302 A CN 108287302A CN 201810082173 A CN201810082173 A CN 201810082173A CN 108287302 A CN108287302 A CN 108287302A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2813—Checking the presence, location, orientation or value, e.g. resistance, of components or conductors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2818—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] using test structures on, or modifications of, the card under test, made for the purpose of testing, e.g. additional components or connectors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2891—Features relating to contacting the IC under test, e.g. probe heads; chucks related to sensing or controlling of force, position, temperature
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Measurement Of Radiation (AREA)
Abstract
The invention discloses a kind of single particle effect detection circuit structures of space-oriented radiation environment, include mainly sram cell storage circuit and single particle effect detection circuit, unit storage circuit includes SRAM cell array and its peripheral circuit, and peripheral circuit includes sense amplifier, row/column decoder, row/column Address Register, inputoutput data buffer；Single particle effect detection circuit includes column unit SEE current detection sensors, row unit N trap SEE current detection sensors, sensor scanning circuit, SEU address storage circuits, sequential control circuit.The present invention effectively improves the LET values of the incident Energetic particle of monitoring by the critical charge or depletion width of change SEE current sensors, and LET value resolution ratio reaches 1MeV.cm2/mg。
Description
Technical field
The present invention relates to the technical fields such as integrated circuit, reliability, Aeronautics and Astronautics and radiation environment, more particularly to one kind
The single particle effect detector chip circuit structure of space-oriented radiation environment.
Background technology
Radiation effect is the table of the performance change of electronic device and material in radiation field (for example, space radiation environment etc.)
It is existing, including total dose effect, displacement damage effect and single particle effect etc..The statistical data of separate sources shows have 16% to arrive
42% Spacecraft malfunction and exception is caused by space environment.Show leading according to AEROSPACE companies statistics in 1999
It causing in Spacecraft anomaly or the space environment effect of failure, various radiation effects account for 88%, and wherein total dose effect accounts for 5.4%,
Surface charge effects account for 20.1%, and deep layer charge effects account for 24.7% (charge effects for being difficult to distinguish account for 9.4%), single-particle effect
28.4% should be accounted for.So far, single particle effect is to induce Spacecraft anomaly or the most radiation effect of failure.
Table 1 below gives clearly defined single particle effect types at present.In all these effects, single-particle
It burns, single event gate rupture, single-particle displacement damage and single position hard error are all permanent damage, also referred to as hard error, by again
Write-in or deenergization, still cannot restore normal condition, device is thoroughly damaged by irradiation device；In addition single event latch-up is not
In the case of taking safeguard measure, permanent damage is also resulted in.Other single particle effects are soft error, and device can restore just
Normal state.Generally speaking, either permanent error or soft error, for running spacecraft, any type effect
It should may all cause major accident and massive losses.
1 single particle effect of table is classified
Single-particle soft error takes place mostly in memory device and combination/sequential logical circuit, is incoming particle movement drive
The charge generated around mark is collected by sensitive electrode, forms transient current, triggers logic circuit, logic state is caused to overturn.When
Particle pass through chip when, particle loss energy, and along its path excite electron-hole pair, these charges can by drift and
Flooding mechanism is collected by reverse biased pn junction, and the drain junction of OFF state transistor is reverse-biased, so it can collect charge.If reverse-biased
Drain junction is collected into enough charges, and the voltage of respective nodes will change.This effect does not cause circuit usually
Damage, therefore be a kind of soft error.If circuit voltage change cannot restore quickly, this pulse current will cause circuit system
The confusion of system some time.Especially if the charge collected in circuit cannot dissipate before feedback causes unit overturning, storage
Logical value in sram cell will just change, and the mistake of storage unit may result in system mistake in chip.Half
There are the pattern that two main ionising radiations discharge charge in conductor device, one is incoming particle direct ionization, secondly serving as reasons
The indirect ionization that the secondary that nuclear reaction generates occurs occurs in incoming particle and device effect.Both mechanism generate simultaneously
And it acts in the device by particle radiation.
With FPGA, SoC etc. mainstream is had become for the application in spacecraft of large scale integrated circuit or system of representative
Development trend, and these large scale integrated circuits or system are vulnerable to the influence of Single event upset effecf (SEU).Current normal basis
In-orbit logic state changes and can be restored by measures such as power-off restarting, refreshing, partial reconfigurations, to determine whether to have occurred
SEU.And whether the exception is caused by high energy charged particles and SEU occur location information research it is less.This may cause
Circuit or system SEU reclamation activities can not be used accurately, and influence the in-orbit efficiency of spacecraft stablizes realization or even entail dangers to space flight
The in-orbit safety of device.For this reason, it is necessary to carry out the in-orbit SEU examinations of spacecraft and Study of location, screen caused by in-orbit SEU
Failure obtains the location information that in-orbit SEU occurs, timely and accurately counter-measure to be taken to provide technical support.
Is started to the research of single particle effect, test method is divided into space flight experiment research and ground the eighties in last century
Analog study.The former is the research most direct means of single particle effect, and Chenettle etc. has been observed between 1973-1984 decades
The activity of solar flare has recorded the information such as solar flare heavy ion intensity and occurrence frequency and power spectrum and composition, and utilizes U.S.
The IMP28 satellites (carrying monitor) of Chicago University of state transmitting in 1973 are measured from proton to Fe and energy is 10-
The particle of 400MeV/u.NASA, ESA have also carried out a large amount of work in terms of single particle effect research, transmit in July, 2000
Space Radiation Effects of the CEASE developed by Amptek companies dedicated for monitoring including single particle effect.
The U.S. utilizes advanced photoelectron test satellite (Advanced Photovoltaic and Electronics
Experiment, APEX) carry out cosmic ray roll-over test (Cosmic Ray Upset Experiment, CRUX).This is defended
70 °, apogee 2544km, perigee 359km of star orbital road inclination launched on the 3rd in August in 1994, flew to 1996 5
Month.The experiment related with space radiation environment and effect that APEX is completed includes cosmic ray roll-over test (CRUX).
The device selected in CRUX experiments is commercialization SRAM and power MOSFET.Surrey university is existed using Uosat series moonlets
There are many memory type that rail is monitored in real time involved by single-particle inversion experiment, include NMOS DRAMs, CMOS SRAM etc.
A variety of devices.
Since since China, single particle effect failure occurs in satellite, the country begins to pay much attention to grinding for single particle effect
Study carefully, it starts from the mid-80, studies external single particle effect always into line trace.Space center of the Chinese Academy of Sciences is in SJ-4, SJ-
It is equipped with flight test device on 5 two satellites, which includes single particle effect monitoring and safeguard procedures verification test dresses
It sets, has carried out corresponding experiment.It puts into practice No. 4 and is one and special measure terrestrial space charged particle environment and its spacecraft is influenced
Satellite, perigee altitude 200km, altitude of the apogee 36125km, 28.6 ° of inclination angle highly elliptic orbit.Its single event is supervised
Device is surveyed to be made of static single event monitor and dynamic single event monitor.
Static single event monitor is a MCS-51 SCM system, is as monitoring single event sensor
The SRAM array being made of IDT7164, IDT6116, MD2764EPROM, total storage capacity are 1.015808M bits, and when work presses
Certain rule sets number to these arrays.It sets there are three types of digital modelings：“0000 0000”、“1111 1111”、“0101 1010”.In
Central processor finds the changed unit of storage content, i.e., every the storage content of the SRAM array of inspection in 5.24 minutes
As a single event has occurred, the address for recording the unit and the content after change, calculate from satellier injection to
Accumulative single event sum this moment, is stored in data storage area together.When the frame synchronization of telemetry system arteries and veins synchronous with road code
Be flushed to up to when, storage area data is sent to telemetry system and beams back ground by central processing unit.
Dynamic single-particle monitor is 80c86, memory 1Mbyte (being equivalent to 8Mbit) multibus microcomputer system with a CPU
It unites, application program ceaselessly searches for the areas RAM of 944kB in machine, and in the areas RAM, memory is placed with the pattern set in advance, such as finds not
Symbol indicates SEU or SEL occur, and encoded, data packing is placed on for information about by its address and time when occurring etc.
SEU event data buffer areas, while packaged data format is beamed back into ground with the speed of 2B/F by interrupt output service routine.Separately
Outside, since abnormal cause causes On board computer endless loop or self-locking to be stopped, also it can restore normal by remote control restarting
Working procedure.
The a large amount of Seeds of First Post-flight space radiation single particle effect detectors carried out at present are record single event mostly, and
Single event upset is not screened and is positioned, in order to it is more acurrate, targetedly take corresponding reply single-particle to turn over
The measure turned, therefore the present invention is screened for the in-orbit single-particle inversion of spacecraft and location technology, screens in-orbit single-particle inversion
Caused failure obtains the location information that in-orbit single-particle inversion occurs, timely and accurately counter-measure to be taken to provide technology
Support.
Invention content
Based on this, the purpose of the present invention is to provide a kind of single particle effect detection circuit knots of space-oriented radiation environment
Structure is difficult to the present situation of accurate analyzing and positioning for current SEU events producing cause, carries out in-orbit SEU examinations and location technology
Research, establishes the relevance of space radiation environment and SEU effect bodies, develops in-orbit SEU monitoring modulars, breaks through SEU and detects IP
With the designing technique and verification technique of chip, assessed in conjunction with the soft error of large scale integrated circuit, to solve the examination of in-orbit SEU
And orientation problem.
To achieve the goals above, present invention employs the following technical solutions：
The single particle effect detection circuit structure of space-oriented radiation environment includes mainly sram cell storage circuit and list
Particle effect detection circuit, the sram cell storage circuit include SRAM cell array and its peripheral circuit, peripheral circuit
Including sense amplifier, row/column decoder, row/column Address Register, inputoutput data buffer；The single-particle effect
It includes column unit SEE current detection sensors, row unit N trap SEE current detection sensors, sensor scanning electricity to answer detection circuit
Road, SEU address storage circuits, sequential control circuit.
Wherein, each row of SRAM cell array place a column unit SEE current detection sensor, and it is mono- to act on row SRAM
Member provides virtual VDD and GND for it, when the NMOS of row cut-off catches a packet, then has transient state SET current to be flowed to from VDD
The PMOS of conducting then has transient state SET current to flow to GND from the NMOS of conducting, in this way when the PMOS of row cut-off catches a packet
When there is transient state SET current that single-particle hit and flowed through VDD or GND, it is detected by the sram cell hair of the row
SEU events are given birth to.
Wherein, according to the requirement of position resolution, SRAM cell array be expert on every a distance place a row list
First N traps SEE current detection sensors act on row sram cell, test side and the N traps residing for PMOS in row unit of sensor
Contact is connected directly, and when PMOS is hit by single-particle, just be will produce and is flowed through the transient state SET current of N traps contact and sensed by the row
Device captures, to judge whether to have occurred SEU mistakes.
Further, being applied in combination by row and column sensor detects the specific location that SEU units occur.
Further, SRAM array is divided into small array and places sensor in each column, and is put every a distance
Set line sensor.
Wherein, SRAM cell array is as unit is detected, and peripheral circuit is in initial phase to SRAM cell array
Initial value is written, according to the symmetry of SRAM cell circuit, write-in 0/1, sram cell storage circuit, which is in, thereafter keeps
State the operations such as is not written, to carry out single particle effect detection.
Further, the column position that column unit SEE current detection sensors detection single particle effect occurs, row unit N traps
The substantially line position that SEE current detection sensors detection single particle effect occurs is set, and under the timing control of sequential control circuit, is passed
Sensor scanning circuit is timed scanning to the height output level of row/column sensor, and by the sram cell of each period
The position that single particle effect mistake occurs in array is saved in SEU address storage circuits.
The single particle effect detection circuit structure of the space-oriented radiation environment of the present invention, has the following advantages that：
1) embedded SEU detection IP and stand alone type SEU detection chips, are the technologies with extended capability and flexibility.It is embedding
Entering formula SEU detections IP can be placed in the complicated circuits chip such as FPGA/SoC, monitor that there is a situation where single particle effects for it.It is independent
Formula SEU detection chips can be placed on any position of pcb board grade system, and monitoring it, there is a situation where single particle effects.
2) it is based on column unit SEE current sensors and row cell S EE current sensors, space high energy grain can be accurately positioned
The incoming position of son, positioning accuracy are better than 50 microns；
3) it is controlled by input clock, the temporal resolution of monitoring Energetic particle can be increased substantially, improve core
Built-in testing efficiency.In conjunction with the counting situation of particle incidence, the fluence rate information of Energetic particle can be obtained.
4) by change SEE current sensors critical charge or depletion width, can effectively improve monitor into
The LET values of Energetic particle are penetrated, LET values resolution ratio can reach 1MeV.cm2/mg。
Description of the drawings
Fig. 1 is the composition schematic diagram of the single particle effect detection circuit structure of the space-oriented radiation environment of the present invention；
Fig. 2 is the composition schematic diagram of the SEU detection circuits of the present invention；
Fig. 3 be the present invention SEU detection circuits in built-in current sensor function composition schematic diagram；
Fig. 4 be the present invention SEU detection circuits in Dyn_P circuits structural schematic diagram.
Specific implementation mode
Introduced below is the specific implementation mode as content of the present invention, below by specific implementation mode to this
The content work of invention further illustrates.Certainly, description following detailed description is only the not Tongfang of the example present invention
The content in face, and should not be construed as the limitation scope of the invention.
Referring to Fig. 1, Fig. 1 is that the composition of the single particle effect detection circuit structure of the space-oriented radiation environment of the present invention shows
It is intended to；The wherein single particle effect detection circuit structure of space-oriented radiation environment, mainly include sram cell storage circuit and
Single particle effect detection circuit, the sram cell storage circuit include SRAM cell array and its peripheral circuit, periphery electricity
Road includes sense amplifier, row/column decoder, row/column Address Register, inputoutput data buffer；The single-particle
Effect detection circuit includes column unit SEE current detection sensors, row unit N trap SEE current detection sensors, sensor scanning
Circuit, SEU address storage circuits, sequential control circuit.
Specifically, embedded SEU detection IP and stand alone type SEU detection chips, from circuit framework for it is essentially identical.
The main distinction is that embedded SEU detections IP needs to be positioned in the chips such as parent FPGA or SOC, utilizes parent FPGA or SOC
Vacant resource in chip, is laid out wiring, therefore is limited to design resource and the flow processing of parent FPGA or SOC chip
Condition.Free-standing SEU detection chips are more flexibly placed on the chips such as FPGA or SOC envelope for individually designed and flow processing
It fills outside body (same load pcb board can be positioned over), is monitored.SEU detection circuits design drawing is as shown in Fig. 2, main packet
Include sram cell storage circuit and single particle effect detection circuit.The sram cell storage circuit includes SRAM cell array
And its peripheral circuit (sense amplifier, row/column decoder, row/column Address Register, inputoutput data buffer etc.).Institute
The single particle effect detection circuit stated include column unit SEE current detection sensors, row unit N trap SEE current detection sensors,
Sensor scanning circuit, SEU address storage circuits, sequential control circuit.
(1) sram cell storage circuit
SRAM cell design：In SEU detectors, most areas is occupied by storage unit.It thus stores single
First driving capability of itself, area and power consumption can generate significant impact to whole performance.Being configured as storage unit is entire
The factor that SRAM design considers at first.Under conditions of meeting functional parameter, reduce the size of pipe as far as possible, to increasing pair
The sensibility of SEU improves the accuracy of detection of detector.
Sense amplifier designs：Sense amplifier can be divided into voltage-type, current mode and charge type by operation object；By electricity
Line structure can be divided into amplifier type, cross-couplings type and latch-type.Latch-type pressure sensitive amplifier is because of high gain, speed
Soon, temperature stability is widely used in the design of embedded SRAM well.In order to reduce to being moved caused by bit line capacitance charging
State power consumption can reduce the voltage swing on bit line, hence it is evident that be less than supply voltage, small electricity is detected by sense amplifier
The pressure amplitude of oscillation is simultaneously amplified reading, and voltage on bit line is avoided to reach full swing, to make up because of differential bit line overload and deposit
Bit-line voltage variation is slow caused by the reasons such as storage unit output driving ability is limited, and delay is accessed to reduce.It is sensitive to put
Big device all plays very important effect in terms of reducing delay, reducing power consumption and reliability.The design of sense amplifier should fill
Point consider speed, power consumption, the factors such as area, and ensure different process angle, voltage, temperature and various storage array width with
It is met the requirements under depth.
(2) single particle effect detection circuit
Column unit SEE current sensors design：Column unit SEE current detection sensors are an on piece BICS designs, are made
For the sram cell of each row, virtual VDD and GND are provided for the row.It, will when the NMOS of row cut-off catches a packet
There is PMOS of the transient state SET current from VDD flow direction conductings.Likewise, when the PMOS of row cut-off catches a packet, transient state is just had
SET current flows to GND from the NMOS of conducting.Column unit SEE sensors provide virtual VDD and GND for the row, thus can be with
Detect whether the sram cell of the row has occurred SEU events.
Amplify the current impulse of overturning using current mirror and current source load phase inverter and is translated into logic level
Voltage pulse.Fig. 3 shows that the structure of the BICS, the Svdd in figure are the detector of 1 to 0 overturning, detection and amplification because 1 arrives
The transient current pulse that 0 overturning generates, and convert Wei's logic-level voltages pulse.It is used using Sgnd to detect 0 to 1 overturning
Be with Svdd have symmetrical structure Sgnd.The logical pulse that Svdd and Sgnd is provided is used for set ynchronous latch.BICS
Provide the Vdd ' and Gnd ' of permutation storage unit.Svdd is made of transistor MV1-MV8.Transistor MV1 and MV2 are formd
The current mirror of one n-channel, MV7 and MV8 are as current source load phase inverter.Transistor MV5 and MV6 are the active electricals of current mirror
Resistance.The ource electric current of current mirror and current source load phase inverter is provided by transistor MV3, MV4 and MV8.Transistor MV3, MV4 and
The bias voltage of MV8 is provided by the reference voltage source for being common in 8 or 16BICS.Reference voltage source is a simple CMOS partial pressure
Device generates two bias voltages BV and BG and is respectively supplied to Svdd and Sgnd.This reference voltage source is for ensureing in power supply electricity
BICS can correctly work in the case that pressure changes.When Vdd is increased or decreased, it can increase or decrease the biased electrical of output
Pressure.Inside particle strike sram cell when the drain electrode of "off" transistor, can a transient current arteries and veins generated by strike node
Punching.Electric current has flowed through the PMOS tube of conducting, as shown in IV from Vdd to by strike node.When IV is flow to from Vdd by strike node,
The electric current for flowing through transistor MV1 is reduced.Which results in the electric current increases for flowing through transistor MV2, also just therefore increase MV2's
Drain-source pressure drop.The drain electrode of MV2 is connected to the grid of MV7, so the grid source pressure drop of MV7 increases, the drain terminal of MV7 is caused to produce one
A voltage pulse.Because the phase inverter that transistor MV9 and MV10 are constituted, this voltage pulse are amplified in node EV and patrol entirely again
Collect the amplitude of oscillation.Likewise, when the PMOS tube of particle strike cut-off, Sgnd provides a voltage pulse in node EG.
Work of the Bypassvdd and Bpassgnd signals for interrupting BICS when memory read/write operates.Svdd and
The output EV and EG of Sgnd is connected respectively to ynchronous latch.Any output increases, and latch is just triggered, and Erri is activated to believe
Number.After detecting overturning and reading information from latch, using reseting signal reset ynchronous latch.
Row unit N trap SEE current detection sensors：It is mono- that row unit N trap SEE current detection sensors act on row SRAM
Member, the test side of sensor contact with the N traps residing for PMOS in row unit and are connected directly.When PMOS is hit by single-particle, just
The transient state SET current for flowing through the contact of N traps is will produce, is captured by line sensor, so as to judge whether to have occurred SEU mistakes
Accidentally.
Fig. 4 shows the Dyn_P circuit diagrams for monitoring PMOS transistor.Transistor T5 is storage unit, and T4 is as leakage
End load.T3 by the reset pulse controlling cycle on its grid on and off, and by remove be present in or by leakage current
The charge accumulated in T5 grids keeps T5 cut-off states.Therefore, because the presence of T4, not_out signals are in high level.It is supervised
Not_bulk pins should be connected to by surveying the body of transistor.T0 is constantly in conducting state by the control of sens voltages, because of its drain-source
Pressure drop is proportional to the body electric current of monitored transistor and can be used as sense resistance.In normal operation, to make its drain-source pressure drop
It is negligible, T0 sizes can be increased, also maintain the cut-off state of T2 in this way.When body electric current because when SET is abnormal,
The drain-source pressure drop abruptly increase of T0, it is sufficient to make T2 be connected, to the gate-source capacitance charging conducting T5 pipes of T5 so that not_out signals are lower.
When body electric current is restored to normal value, T2 returns to cut-off state, but T5 is because of the grid source charge leakage not in addition to leakage path
Access remains on state.The information that SET occurs is saved in always monitoring system and sends out new reset signal to T3.Due to
There are leakage path, the gate-source capacitance of T5 cannot indefinite holding charge or discharge state.When normal work, reset signals
Ensure the conducting that T5 will not be wrong.By to storage unit design the suitable retention time can to avoid the Self-resetting of T5, and
Because of the detection that erroneous transmissions mechanism instant response SET occurs, it is contemplated that common clock frequency, retention time cannot be longer than
Several nanoseconds.
By being applied in combination for row and column sensor, the specific location that SEU units occur can be detected.In order to improve inspection
The precision of survey and sram cell VDD and GND is not had an impact, SRAM array can be divided into small array and put in each column
Sensor is set, and line sensor is placed every a distance.By this method, the adjusting of position resolution may be implemented.
(3) radiation hardening of sensor and peripheral circuit：
In order to ensure the normal operation of detector system, sensor circuit and SRAM peripheral circuit portions to row and column are needed
Point carry out anti-single particle, accumulated dose and ESD Design of Reinforcement.The design rule and technological parameter of circuit are selected, optimized
Radiation hardening structure and anti-bolt lock structure ensure that time stimulatiom and post-simulation pass through, ensure the stability of processing technology,
And stringent test and screening examination are carried out according to the pertinent regulations of GJB548B, and reach the reliability requirement of B grades of national military standard,
Guarantee meets user's requirement.Using the extension silicon substrate of heavy doping, single event latch-up effect can be prevented.It is set using RHBD
Meter technology considers the influence of accumulated dose, single particle effect and SEL in logical design, ensures what circuit was applied under radiation environment
Reliability.In layout design, add and increase as possible and electrical power contacts.Current density limits metal pair on power and ground
The current density conducted thereon has the threshold value of a restriction, if current density is excessive, it will generates serious ELECTROMIGRATION PHENOMENON, i.e.,
The metallic atom of current density general goal can be with current drift, and metal strip can attenuate at this, eventually leads to fracture.Due to power cord and
Ground wire is summarizing for all branch currents, and electric current is maximum, therefore wants appropriate in design and widen power supply and ground line width, ensures it
The reliability used.All of the port must add esd protection circuit, the clamper that input port is hindered using diode power-up in the design
Circuit, while resistance plays metering function, and circuit is protected effectively to ensure device not by electrostatic damage.Output port, which uses, is suitable for body
The gated diode structure of silicon technology, it is appropriate to increase protection circuit area, improve ESD grades.
Although the specific implementation mode of the present invention is described in detail and is illustrated above, it should be noted that
We can make various changes and modifications the above embodiment, but these spirit without departure from the present invention and appended power
Profit requires recorded range.
Claims (7)
1. the single particle effect detection circuit structure of space-oriented radiation environment includes mainly sram cell storage circuit and simple grain
Sub- effect detection circuit, the sram cell storage circuit include SRAM cell array and its peripheral circuit, peripheral circuit packet
Include sense amplifier, row/column decoder, row/column Address Register, inputoutput data buffer；The single particle effect
Detection circuit includes column unit SEE current detection sensors, row unit N trap SEE current detection sensors, sensor scanning electricity
Road, SEU address storage circuits, sequential control circuit.
2. single particle effect detection circuit structure as described in claim 1, wherein each row of SRAM cell array place one
Column unit SEE current detection sensors, act on row sram cell, and virtual VDD and GND are provided for it, when row cut-off
When NMOS catches a packet, then there is PMOS of the transient state SET current from VDD flow direction conductings, when the PMOS of row cut-off catches a packet,
Then there is transient state SET current to flow to GND from the NMOS of conducting, hits and flow through VDD's or GND when there is single-particle in this way
When transient state SET current, SEU events have occurred in the sram cell for being detected by the row.
3. single particle effect detection circuit structure as described in claim 1, wherein according to the requirement of position resolution, SRAM
Cell array be expert on every a distance place a row unit N trap SEE current detection sensor, it is mono- to act on row SRAM
Member, the test side of sensor contact with the N traps residing for PMOS in row unit and are connected directly, when PMOS is hit by single-particle, just
Will produce flow through N traps contact transient state SET current captured by the line sensor, to judge whether to have occurred SEU mistakes.
4. single particle effect detection circuit structure as claimed in claim 3, wherein made by the combination of row and column sensor
With, detect SEU units occur specific location.
5. single particle effect detection circuit structure as described in claim 1, wherein SRAM array be divided into small array and
Each column places sensor, and places line sensor every a distance.
6. single particle effect detection circuit structure as described in claim 1, wherein SRAM cell array is single as being detected
Member, peripheral circuit are write to SRAM cell array write-in initial value according to the symmetry of SRAM cell circuit in initial phase
Enter 0/1, sram cell storage circuit, which is in, thereafter keeps state, the operations such as is not written, to carry out single particle effect detection.
7. single particle effect detection circuit structure as described in claim 1, wherein column unit SEE current detection sensors are examined
The column position that single particle effect occurs is surveyed, row unit N trap SEE current detection sensors detect substantially going for single particle effect generation
Position, under the timing control of sequential control circuit, sensor scanning circuit carries out the height output level of row/column sensor
Timing scan, and the position that single particle effect mistake occurs in the SRAM cell array of each period is saved in the addresses SEU
In storage circuit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810082173.0A CN108287302A (en) | 2018-01-29 | 2018-01-29 | The single particle effect detection circuit structure of space-oriented radiation environment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109884414A (en) * | 2019-01-25 | 2019-06-14 | 中国科学院微电子研究所 | Highly sensitive high energy particle ionization charge tests circuit |
| CN109917269A (en) * | 2019-01-25 | 2019-06-21 | 中国科学院微电子研究所 | Single high energy particle ionization charge tests circuit |
| CN112124636A (en) * | 2020-05-09 | 2020-12-25 | 长沙天仪空间科技研究院有限公司 | Novel high integrated satellite platform system |
| CN112711894A (en) * | 2020-12-29 | 2021-04-27 | 中国人民解放军63921部队 | Quantitative evaluation method for single particle resistance of on-orbit component |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6642725B2 (en) * | 2001-06-28 | 2003-11-04 | Chung-Shan Institute Of Science And Technology | Method of testing radiation for a SDRAM |
| US20070013426A1 (en) * | 2005-07-14 | 2007-01-18 | International Business Machines Corporation | Set/reset latch with minimum single event upset |
| CN101499788A (en) * | 2009-02-19 | 2009-08-05 | 上海交通大学 | Single particle upset and single particle transient pulse resisiting D trigger |
| CN101826038A (en) * | 2010-04-28 | 2010-09-08 | 复旦大学 | Circuit and method for resisting SEU of SRAM FPGA device |
| CN101907662A (en) * | 2009-06-04 | 2010-12-08 | 中国科学院空间科学与应用研究中心 | Single-event effect detection device and method |
| CN102622965A (en) * | 2012-04-25 | 2012-08-01 | 上海大学 | Silicon-based micro display driving circuit |
| CN103019177A (en) * | 2012-11-16 | 2013-04-03 | 中国航天科技集团公司第五研究院第五一〇研究所 | Single event effect monitoring system of space general-purpose memory |
| CN104731995A (en) * | 2013-12-23 | 2015-06-24 | 深圳市国微电子有限公司 | Semiconductor circuit based single-particle resistance effect verification method and system |
| CN105974905A (en) * | 2016-05-10 | 2016-09-28 | 中国民航大学 | Simulated test system and method for single-particle overturn fault of aviation data bus |
-
2018
- 2018-01-29 CN CN201810082173.0A patent/CN108287302A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6642725B2 (en) * | 2001-06-28 | 2003-11-04 | Chung-Shan Institute Of Science And Technology | Method of testing radiation for a SDRAM |
| US20070013426A1 (en) * | 2005-07-14 | 2007-01-18 | International Business Machines Corporation | Set/reset latch with minimum single event upset |
| CN101499788A (en) * | 2009-02-19 | 2009-08-05 | 上海交通大学 | Single particle upset and single particle transient pulse resisiting D trigger |
| CN101907662A (en) * | 2009-06-04 | 2010-12-08 | 中国科学院空间科学与应用研究中心 | Single-event effect detection device and method |
| CN101826038A (en) * | 2010-04-28 | 2010-09-08 | 复旦大学 | Circuit and method for resisting SEU of SRAM FPGA device |
| CN102622965A (en) * | 2012-04-25 | 2012-08-01 | 上海大学 | Silicon-based micro display driving circuit |
| CN103019177A (en) * | 2012-11-16 | 2013-04-03 | 中国航天科技集团公司第五研究院第五一〇研究所 | Single event effect monitoring system of space general-purpose memory |
| CN104731995A (en) * | 2013-12-23 | 2015-06-24 | 深圳市国微电子有限公司 | Semiconductor circuit based single-particle resistance effect verification method and system |
| CN105974905A (en) * | 2016-05-10 | 2016-09-28 | 中国民航大学 | Simulated test system and method for single-particle overturn fault of aviation data bus |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109884414A (en) * | 2019-01-25 | 2019-06-14 | 中国科学院微电子研究所 | Highly sensitive high energy particle ionization charge tests circuit |
| CN109917269A (en) * | 2019-01-25 | 2019-06-21 | 中国科学院微电子研究所 | Single high energy particle ionization charge tests circuit |
| CN109917269B (en) * | 2019-01-25 | 2021-10-01 | 中国科学院微电子研究所 | Single high-energy particle ionization charge test circuit |
| CN112124636A (en) * | 2020-05-09 | 2020-12-25 | 长沙天仪空间科技研究院有限公司 | Novel high integrated satellite platform system |
| CN112124636B (en) * | 2020-05-09 | 2024-06-04 | 长沙天仪空间科技研究院有限公司 | High-integration satellite platform system |
| CN112711894A (en) * | 2020-12-29 | 2021-04-27 | 中国人民解放军63921部队 | Quantitative evaluation method for single particle resistance of on-orbit component |
| CN112711894B (en) * | 2020-12-29 | 2024-01-30 | 中国人民解放军63921部队 | On-orbit component single particle resistance quantitative assessment method |
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