CN108269818A - A kind of CMOS type imaging sensor and preparation method thereof - Google Patents
A kind of CMOS type imaging sensor and preparation method thereof Download PDFInfo
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- CN108269818A CN108269818A CN201810090280.8A CN201810090280A CN108269818A CN 108269818 A CN108269818 A CN 108269818A CN 201810090280 A CN201810090280 A CN 201810090280A CN 108269818 A CN108269818 A CN 108269818A
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- 238000003384 imaging method Methods 0.000 title claims abstract description 36
- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 129
- 239000010409 thin film Substances 0.000 claims abstract description 90
- 229910052751 metal Inorganic materials 0.000 claims abstract description 88
- 239000002184 metal Substances 0.000 claims abstract description 88
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 56
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229920002120 photoresistant polymer Polymers 0.000 claims description 36
- 238000000034 method Methods 0.000 claims description 33
- 238000000151 deposition Methods 0.000 claims description 31
- 230000008021 deposition Effects 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 238000002955 isolation Methods 0.000 claims description 12
- 230000003647 oxidation Effects 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims 4
- 238000000576 coating method Methods 0.000 claims 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 230000003628 erosive effect Effects 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 18
- 229910052710 silicon Inorganic materials 0.000 description 18
- 239000010703 silicon Substances 0.000 description 18
- 230000003287 optical effect Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The present invention provides a kind of CMOS type imaging sensor and preparation method thereof,The substrate of side including the second oxide layer and in the oxide layer,The side of substrate forms the first groove for being recessed to the second oxide layer downwards,It is equipped with HIK layers and the first oxide layer successively from the bottom to top in substrate and first groove,It is formed in the first groove equipped with high dielectric thin film layer and the first oxide layer through the first oxide layer,The connecting groove of the second oxide layer of high dielectric thin film layer and part,The first metal layer is equipped in the first oxide layer and in connecting groove,Aluminum wiring board is equipped on the first metal layer of connecting groove,Aluminum wiring board is electrically connected by the high dielectric thin film layer that the first metal layer in connecting groove and wiring groove sidewall expose,To provide voltage as high dielectric thin film layer when applying voltage on aluminum wiring board,Make the potential difference of generation bigger between high dielectric thin film layer and substrate,Make substrate stronger to the constraint ability of electronics,So as to preferably reduce white point and dark current.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of CMOS type imaging sensor and preparation method thereof.
Background technology
It, correspondingly will to the optical property of sensor with the higher and higher demand of small size, the high pixel to camera
Ask also more harsh.Traditional handicraft is by taking HiK techniques that the electronics of silicon face is strapped in surface and obstructing extraneous electronics
Injection cannot meet height in the method for this optical property (White pixel, Dark current, etc.) for providing product
The demand of client is held, Fig. 1 show traditional CMOS type imaging sensor.
Conventional method increases high dielectric thin film layer (HiK layers) to improve the optical property of sensor.
In order to promote the optical property of CMOS type imaging sensor and electric property, in the pixel of CMOS type imaging sensor
Cellular zone introduces deep trench isolation (DTI) technique, forms the second groove for pixel unit isolation, and production method includes：
As depicted in figs. 1 and 2, the second oxide layer 101 below a silicon base 102 and silicon base 102, the silicon base in figure are provided
Right side on 102 forms the second groove 105 for pixel unit isolation, on the silicon base 102 of second groove 105 is formed with
It is sequentially formed with 103 and first oxide layer 104 of high dielectric thin film layer from the bottom to top, as shown in Figure 1；Again in silicon base 102
Left side etches first oxide layer 104, high dielectric thin film layer 103, silicon base 102 and the second oxide layer of part 101 and forms the
One groove 106, and continue at the first groove 106 to etch second oxide layer 101 and form connecting groove 107, al wiring
Plate 108 etc. is arranged at the connecting groove 106, as shown in Figure 2.
As shown in figure 3, its cardinal principle is to be flooded with the electricity on 102 surface of charge and silicon base in itself using HiK layers 103
Lotus forms built in field, and extra electron is strapped in silicon face and makes external charge that can not inject in silicon by the potential difference of generation.Cause
This reduces white point (White Pixel) and dark current (Dark current), improves the optics of CMOS type imaging sensor
Performance.But due between the limitation of HiK materials in itself causes in this potential difference it is limited, the ability of bound electron is also limited.No
Can meet the needs of higher optical property.
Invention content
For the defects in the prior art, an embodiment of the present invention provides CMOS type imaging sensors and preparation method thereof.
In a first aspect, the embodiment of the present invention provides a kind of CMOS type imaging sensor, including：Second oxide layer and positioned at institute
State the substrate in the second oxide layer；
The substrate is located at the side of second oxide layer, and the side of the substrate, which is formed, is recessed to downwards described second
The first groove of oxide layer is equipped with high dielectric thin film layer and first successively from the bottom to top in the substrate and the first groove
Oxide layer is formed in the first groove equipped with high dielectric thin film layer and the first oxide layer through first oxide layer, described
The connecting groove of high dielectric thin film layer and part second oxide layer, sets in first oxide layer and in the connecting groove
There is the first metal layer, aluminum wiring board is equipped on the first metal layer of the connecting groove, the aluminum wiring board passes through described
The high dielectric thin film layer electrical connection that the first metal layer and the wiring groove sidewall in connecting groove expose, in the aluminium
When applying voltage on terminal plate voltage is provided for the high dielectric thin film layer.
Preferably, it is also formed with the second groove for being isolated between pixel unit on the substrate.
Preferably, there is pre-determined distance between the bottom of the second groove and the bottom surface of the substrate.
Preferably, including at least four second grooves, every four institutes at least four second groove
It states second groove and forms a rectangular area, each rectangular area surrounds a pixel unit wherein.
Preferably, the first metal layer is tungsten layer.
Preferably, the second metal layer being formed in second oxide layer is further included；
The aluminum wiring board is electrically connected by the first metal layer and the second metal layer.
Second aspect, the present invention also provides a kind of production method of the CMOS type imaging sensor, including：
The second oxide layer below one substrate and the substrate is provided；
Photoresist is coated above the substrate, the photoresist in the substrate is exposed using a mask plate aobvious
Shadow, to form the first pattern on the photoresist of the substrate；
The first pattern according to being formed on the photoresist of the substrate performs etching the substrate, removes in the substrate
Photoresist, form first groove on the substrate, the first groove is through second oxidation of the substrate and part
Layer；
It is sequentially depositing high dielectric thin film layer and the first oxide layer from the bottom to top in the substrate and the first groove；
Have in deposition and formed in the first groove of the high dielectric thin film layer and the first oxide layer through the described first oxidation
The connecting groove of layer, the high dielectric thin film layer and part second oxide layer；
The first metal layer is deposited in first oxide layer and in the connecting groove, first in the connecting groove
Deposited aluminum layer on metal layer, forms aluminum wiring board, and the aluminum wiring board passes through the first metal layer in the connecting groove and described
The high dielectric thin film layer electrical connection that wiring groove sidewall exposes.
Preferably, it after the second oxide layer below a substrate and the substrate is provided, is applied above the substrate
Photoresist is covered, before being exposed development to the photoresist in the substrate using a mask plate, the method further includes：
Second metal layer is formed in second oxide layer；
Then, the method further includes：
The aluminum wiring board is electrically connected by the first metal layer and the second metal layer.
The third aspect, the present invention also provides a kind of production method of the CMOS type imaging sensor, including：
The second oxide layer below one substrate and the substrate is provided；
Photoresist is coated above the substrate, the photoresist in the substrate is exposed using a mask plate aobvious
Shadow, to form first pattern and the second pattern on the photoresist of the substrate；The area of first pattern is more than described the
The area of two patterns；
The substrate is performed etching according to the first pattern and the second pattern formed on the photoresist of the substrate, is removed
Photoresist in the substrate, forms first groove and second groove on the substrate, and the first groove runs through the base
Bottom and part second oxide layer have pre-determined distance between the bottom of the second groove and the bottom surface of the substrate；
It is sequentially depositing high dielectric thin film layer and the first oxidation from the bottom to top above the substrate and the first groove
Layer；
Have in deposition and formed in the first groove of the high dielectric thin film layer and the first oxide layer through the described first oxidation
The connecting groove of layer, the high dielectric thin film layer and part second oxide layer；
The first metal layer is deposited in first oxide layer and in the connecting groove, first in the connecting groove
Deposited aluminum layer on metal layer, forms aluminum wiring board, and the aluminum wiring board passes through the first metal layer in the connecting groove and described
The high dielectric thin film layer electrical connection that wiring groove sidewall exposes.
Preferably, the second groove is the second groove for being isolated between pixel unit；
Then, the method further includes：
Etch the first metal layer, first oxide layer and the high dielectric thin film between the second groove
Layer to form metal grate, forms that light is made to enter the entering light area of pixel unit between the metal grate.
Preferably, the method further includes：
It is sequentially depositing high dielectric thin film layer and the first oxidation from the bottom to top above the substrate and the first groove
While layer, it is sequentially depositing high dielectric thin film layer and the first oxide layer from the bottom to top above the second groove.
Preferably, it after the second oxide layer below a substrate and the substrate is provided, is applied above the substrate
Photoresist is covered, before being exposed development to the photoresist in the substrate using a mask plate, the method further includes：
Second metal layer is formed in second oxide layer；
Then, the method further includes：
The aluminum wiring board is electrically connected by the first metal layer and the second metal layer.
The present invention is sequentially depositing height from the bottom to top due to being initially formed first groove in the substrate and the first groove
Dielectric film layers and the first oxide layer are formed on the first groove for having the high dielectric thin film layer and the first oxide layer is deposited and are passed through
The connecting groove of first oxide layer, the high dielectric thin film layer and part second oxide layer is worn, in the described first oxidation
Deposition the first metal layer, deposited aluminum layer on the first metal layer in the connecting groove are formed on layer and in the connecting groove
Aluminum wiring board remains high dielectric thin film layer at first groove, so as to which aluminum wiring board be allow to pass through in the connecting groove
The high dielectric thin film layer electrical connection that the first metal layer and the wiring groove sidewall expose, and then on the aluminum wiring board
Voltage can be provided for the high dielectric thin film layer when applying voltage, make to generate between the high dielectric thin film layer and the substrate high
Potential difference when high dielectric thin film layer is only used, makes the substrate stronger to the constraint ability of electronics, thus preferably will be additional
Electronics is strapped in the surface of the substrate, can not be injected into silicon, and so as to preferably reduce white point and dark current, light is substantially improved
Learn performance.
Description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this hair
Some bright embodiments, for those of ordinary skill in the art, without creative efforts, can be with root
Other attached drawings are obtained according to these attached drawings.
Fig. 1 is the structure diagram that traditional CMOS type imaging sensor is simply formed with second groove；
Fig. 2 is the structure diagram for foring first groove again on the basis of Fig. 1；
Fig. 3 is the schematic diagram that traditional CMOS type imaging sensor realizes electronics constraint；
Fig. 4 is the structure diagram of CMOS type imaging sensor that one embodiment of the invention provides；
Fig. 5 is the flow chart of the production method of CMOS type imaging sensor that one embodiment of the invention provides；
Fig. 6 is the flow chart of the production method of CMOS type imaging sensor that another embodiment of the present invention provides.
Specific embodiment
Purpose, technical scheme and advantage to make the embodiment of the present invention are clearer, below in conjunction with the embodiment of the present invention
Attached drawing, the technical solution of the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is this hair
Bright part of the embodiment, instead of all the embodiments.Based on described the embodiment of the present invention, ordinary skill
Personnel's all other embodiments obtained under the premise of without creative work, shall fall within the protection scope of the present invention.
Unless otherwise defined, the technical term or scientific terminology that the disclosure uses, which are should be in fields of the present invention, to be had
The ordinary meaning that the personage for having general technical ability is understood." first ", " second " and the similar word used in the disclosure is simultaneously
It does not indicate that any sequence, quantity or importance, and is used only to distinguish different component parts.Equally, "one", " one " or
The similar word such as person's "the" does not indicate that quantity limits yet, but represents that there are at least one." comprising " or "comprising" etc. are similar
Word mean to occur element before the word either object cover the element for appearing in the word presented hereinafter or object and its
It is equivalent, and it is not excluded for other elements or object.The similar word such as " connection " or " connected " be not limited to physics or
The connection of person's machinery, but electrical connection can be included, it is either directly or indirect." on ", " under ", " left side ",
" right side " etc. is only used for representing relative position relation, after the absolute position for being described object changes, then the relative position relation
May correspondingly it change.
Fig. 4 is the structure diagram of CMOS type imaging sensor that one embodiment of the invention provides.
A kind of CMOS type imaging sensor as shown in Figure 4, including：Second oxide layer 401 and positioned at described second oxidation
Substrate 402 on layer 401, the substrate 402 are located at the side of second oxide layer 401, and the side of the substrate 402 is formed
It is recessed to the first groove 406 of second oxide layer 401 downwards, in the substrate 402 and the first groove 406 under
It is supreme to be equipped with 403 and first oxide layer 404 of high dielectric thin film layer successively, equipped with 403 and first oxide layer of high dielectric thin film layer
It is formed in 404 first groove 406 through first oxide layer 404, the high dielectric thin film layer 403 and part described second
The connecting groove 410 of oxide layer 401 is equipped with the first metal layer in first oxide layer 404 and in the connecting groove 410
405, aluminum wiring board 408 is equipped on the first metal layer 405 of the connecting groove 410, the aluminum wiring board 408 passes through institute
State 403 electricity of the high dielectric thin film layer that 410 side wall of the first metal layer 405 and the connecting groove in connecting groove 410 exposes
Connection, to provide voltage as the high dielectric thin film layer 403 when applying voltage on the aluminum wiring board 408.
In a specific embodiment, the first metal layer 405 can be tungsten layer.The light-proofness of tungsten is good, prevent light into
Enter non-pixel areas.Certainly, the first metal layer 405 can also be the good metal of other light-proofness, and the present invention is without limitation.
The aluminum wiring board 408 of the present embodiment passes through the first metal layer 405 in the connecting groove 410 and the wiring
The high dielectric thin film layer 403 that 410 side wall of slot exposes is electrically connected, and can be when applying voltage on the aluminum wiring board 408
The high dielectric thin film layer 403 provides voltage, makes to generate higher than only between the high dielectric thin film layer 403 and the substrate 402
Potential difference during with high dielectric thin film layer makes the substrate 402 stronger to the constraint ability of electronics, so as to preferably by additional electric
Beamlet is tied to the surface of the substrate 402, can not be injected into silicon, so as to preferably reduce white point and dark current, is substantially improved
Optical property.
As a kind of preferred embodiment, be also formed in the substrate 402 for be isolated between pixel unit second
Groove 407.Further, there is pre-determined distance between the bottom of the second groove 407 and the bottom surface of the substrate 402.
In a kind of specific embodiment, including at least four second grooves 407, at least four second groove 407
Every four second grooves 407 form a rectangular area, and a pixel unit is enclosed in it by each rectangular area
In.
The present embodiment can prevent electronics between adjacent pixel unit by being isolated between 407 pixel unit of second groove
Crosstalk, so as to promote the optical property of CMOS type imaging sensor and electric property.
Certainly, the quantity of the corresponding second groove 407 of each pixel unit is not limited to four, can also be more,
Such as five, six, the present embodiment is without limitation.
What deserves to be explained is the buffer action of second groove 407 because the substance difference filled in second groove 407 without
Together, the isolation, which can be divided into, is optically isolated and electrical isolation, and lighttight metal is filled in second groove 407 available for optics
Isolation fills nonconducting silica available for electrical isolation in second groove 407.
In a specific embodiment, the width range of the second groove 407 be 70-150nm, the second groove
407 depth bounds are 1500-2500nm.The width and depth of second groove 407 can specifically be set as needed, and the present invention is right
This is not limited.
As a kind of preferred embodiment, the second metal layer 409 being formed in second oxide layer 401 is further included；
The aluminum wiring board 408 is electrically connected by the first metal layer 405 and the second metal layer 409.
What deserves to be explained is the substrate can be silicon base.
Fig. 5 is the flow chart of the production method of CMOS type imaging sensor that one embodiment of the invention provides.
The production method of CMOS type imaging sensor as shown in Figure 5, including：
The second oxide layer 401 below S501, one substrate 402 of offer and the substrate 402；
S502, photoresist is coated above the substrate 402, using a mask plate to the photoetching in the substrate 402
Glue is exposed development, to form the first pattern on the photoresist of the substrate 402；
What deserves to be explained is there is the first mask pattern corresponding with the first pattern on the mask plate；
The first pattern formed on S503, the photoresist according to the substrate 402 performs etching the substrate 402, removes
The photoresist in the substrate 402 is removed, first groove 406 is formed in the substrate 402, the first groove 406 runs through institute
State substrate 402 and part second oxide layer 401；
S504, it is sequentially depositing high dielectric thin film layer 403 from the bottom to top in the substrate 402 and the first groove 406
With the first oxide layer 404, formed in the first groove 406 for having 403 and first oxide layer 404 of high dielectric thin film layer in deposition
Through the connecting groove 410 of first oxide layer 404, the high dielectric thin film layer 403 and part second oxide layer 401；
The prior art can be used in the forming method of the connecting groove, and by exposing, developing, etching formation, the present embodiment is not
It is described in detail again.
S505, deposition the first metal layer 405 in first oxide layer 404 and in the connecting groove 410, described
Deposited aluminum layer on the first metal layer 405 in connecting groove 410 forms aluminum wiring board 408, and the aluminum wiring board 408 is by described
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in connecting groove 410 expose is electrically connected
It connects.
What deserves to be explained is existing method, this implementation can be used in the specific method of the step S501-S505 in the present embodiment
Example is no longer described in detail.
The production method of the CMOS type imaging sensor of the present embodiment, is initially formed first groove 406, in the substrate 402
With 403 and first oxide layer 404 of high dielectric thin film layer is sequentially depositing in the first groove 406 from the bottom to top, deposition
It states and is formed in the first groove 406 of 403 and first oxide layer 404 of high dielectric thin film layer through first oxide layer 404, described
The connecting groove 410 of high dielectric thin film layer 403 and part second oxide layer 401, in first oxide layer 404 and institute
It states and the first metal layer 405 is deposited in connecting groove 410, deposited aluminum layer on the first metal layer 405 in the connecting groove 410, shape
Into aluminum wiring board 408, high dielectric thin film layer 403 is remained at first groove 406, so as to pass through aluminum wiring board 408
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in the connecting groove 410 expose
Electrical connection, and then can be that the high dielectric thin film layer 403 provides voltage when applying voltage on the aluminum wiring board 408, make institute
The potential difference for generating and being higher than when only using high dielectric thin film layer between high dielectric thin film layer 403 and the substrate 402 is stated, makes the base
Bottom 402 is stronger to the constraint ability of electronics, so as to which extra electron to be preferably strapped in the surface of the substrate 402, can not note
Enter into silicon, so as to preferably reduce white point and dark current, optical property is substantially improved.
As a kind of preferred embodiment, after the step S501, before the step S502, the method further includes：
Second metal layer 409 is formed in second oxide layer 401；
Then, the method further includes：
The aluminum wiring board 408 is electrically connected by the first metal layer 405 and the second metal layer 409.
What deserves to be explained is the substrate can be silicon base.
Fig. 6 is the flow chart of the production method of CMOS type imaging sensor that another embodiment of the present invention provides.
The production method of CMOS type imaging sensor as shown in Figure 6, including：
The second oxide layer 401 below S601, one substrate 402 of offer and the substrate 402；
S602, photoresist is coated above the substrate 402, using a mask plate to the photoetching in the substrate 402
Glue is exposed development, to form first pattern and the second pattern on the photoresist of the substrate 402；First pattern
Area is more than the area of second pattern；
What deserves to be explained is on the mask plate have the first mask pattern corresponding with the first pattern and with the second pattern
Corresponding second mask pattern.
The first pattern and the second pattern formed on S603, the photoresist according to the substrate 402 to the substrate 402 into
Row etching, removes the photoresist in the substrate 402, and first groove 406 and second groove 407 are formed in the substrate 402,
The first groove 406 run through the substrate 402 and part second oxide layer 401, the bottom of the second groove 407 with
There is pre-determined distance between the bottom surface of the substrate 402；
S604, it is sequentially depositing high dielectric thin film layer from the bottom to top above the substrate 402 and the first groove 406
403 and first oxide layer 404, have in the first groove 406 of 403 and first oxide layer 404 of high dielectric thin film layer in deposition
Form the connecting groove through first oxide layer 404, the high dielectric thin film layer 403 and part second oxide layer 401
410；
In this step, a floor height Dielectric film layers 403, the first oxide layer can be also deposited in the second groove 407
404 enter in second groove 407, but cannot fill up, and there are gaps for meeting.
The prior art can be used in the forming method of the connecting groove, and by exposing, developing, etching formation, the present embodiment is not
It is described in detail again.
S605, deposition the first metal layer 405 in first oxide layer 404 and in the connecting groove 410, described
Deposited aluminum layer on the first metal layer 405 in connecting groove 410 forms aluminum wiring board 408, and the aluminum wiring board 408 is by described
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in connecting groove 410 expose is electrically connected
It connects.
In this step, the first metal layer 405 enters in the above-mentioned gap of second groove 407, and second groove 407 is filled out
It is full.
Existing method can be used in the specific method of step S601-S605 in the present embodiment, and the present embodiment is no longer described in detail.
The production method of the CMOS type imaging sensor of the present embodiment, is initially formed first groove 406, in the substrate 402
With 403 and first oxide layer 404 of high dielectric thin film layer is sequentially depositing in the first groove 406 from the bottom to top, deposition
It states and is formed in the first groove 406 of 403 and first oxide layer 404 of high dielectric thin film layer through first oxide layer 404, described
The connecting groove 410 of high dielectric thin film layer 403 and part second oxide layer 401, in first oxide layer 404 and institute
It states and the first metal layer 405 is deposited in connecting groove 410, deposited aluminum layer on the first metal layer 405 in the connecting groove 410, shape
Into aluminum wiring board 408, high dielectric thin film layer 403 is remained at first groove 406, so as to pass through aluminum wiring board 408
The high dielectric thin film layer 403 that the first metal layer 405 and 410 side wall of the connecting groove in the connecting groove 410 expose
Electrical connection, and then can be that the high dielectric thin film layer 403 provides voltage when applying voltage on the aluminum wiring board 408, make institute
The potential difference for generating and being higher than when only using high dielectric thin film layer between high dielectric thin film layer 403 and the substrate 402 is stated, makes the base
Bottom 402 is stronger to the constraint ability of electronics, so as to which extra electron to be preferably strapped in the surface of the substrate 402, can not note
Enter into silicon, so as to preferably reduce white point and dark current, optical property is substantially improved.And the present embodiment is according to etching
Loading effect phenomenons (load effect, because etch rate and Etching profile are related with dimension of picture and density and generate
Etching relevant with depth-to-width ratio or micro loading effect, i.e. pattern area is bigger, and the groove for etching formation is deeper, and pattern area is got over
Small, the groove for etching formation is more shallow), it is different using the first mask pattern and the second mask pattern area, on a mask plate
There is the first mask pattern and the second mask pattern simultaneously, the different first groove of depth is formed with single exposure, development, etching
406 and second groove 407, technique is simplified, reduces cost.
As a kind of preferred embodiment, the second groove 407 is the second groove for being isolated between pixel unit
407；
Then, the method further includes：
Etch the first metal layer 405, first oxide layer 404 and the height between the second groove 407
Dielectric film layers 403 to form metal grate, form that light is made to enter the entering light of pixel unit between the metal grate
Area 411.
The present embodiment can make light pass through the entering light area 411 between metal grate into pixel region.
What deserves to be explained is the buffer action of second groove 407 because the substance difference filled in second groove 407 without
Together, the isolation, which can be divided into, is optically isolated and electrical isolation, and lighttight metal is filled in second groove 407 available for optics
Isolation fills nonconducting silica available for electrical isolation in second groove 407.
As a kind of preferred embodiment, the method further includes：
It is sequentially depositing 403 He of high dielectric thin film layer from the bottom to top above the substrate 402 and the first groove 406
While first oxide layer 404, it is sequentially depositing 403 He of high dielectric thin film layer from the bottom to top above the second groove 407
First oxide layer 404.
It is sequentially depositing 403 and first oxide layer of high dielectric thin film layer from the bottom to top above the second groove 407
404, convenient for the needs of subsequent technique.
As a kind of preferred embodiment, after the step S601, before the step S602, the method further includes：
Second metal layer 409 is formed in second oxide layer 401；
The method further includes：
The aluminum wiring board 408 is electrically connected by the first metal layer 405 and the second metal layer 409.
What deserves to be explained is the substrate can be silicon base.
The present invention is initially formed first groove, and high dielectric is sequentially depositing from the bottom to top in the substrate and the first groove
Film layer and the first oxide layer have in deposition and are formed in the first groove of the high dielectric thin film layer and the first oxide layer through institute
The connecting groove of the first oxide layer, the high dielectric thin film layer and part second oxide layer is stated, in first oxide layer
And the first metal layer is deposited in the connecting groove, deposited aluminum layer on the first metal layer in the connecting groove forms aluminium and connects
Line plate remains high dielectric thin film layer at first groove, so as to which aluminum wiring board be allow to pass through first in the connecting groove
The high dielectric thin film layer electrical connection that metal layer and the wiring groove sidewall expose, and then apply on the aluminum wiring board
Voltage can be provided for the high dielectric thin film layer during voltage, make to generate higher than only between the high dielectric thin film layer and the substrate
Potential difference during with high dielectric thin film layer makes the substrate stronger to the constraint ability of electronics, so as to preferably by extra electron
The surface of the substrate is strapped in, can not be injected into silicon, so as to preferably reduce white point and dark current, is substantially improved optical
Energy.
The above description is merely a specific embodiment, and still, protection scope of the present invention is not limited to this, appoints
What those familiar with the art in the technical scope disclosed by the present invention, the variation that can be readily occurred in or replacement, all
It is covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with the scope of the claims
Subject to.
Claims (12)
1. a kind of CMOS type imaging sensor, which is characterized in that including：Second oxide layer (401) and positioned at described second oxidation
Substrate (402) on layer (401)；
The substrate (402) has on the side of second oxide layer (401), the substrate (402) to be recessed to downwards
The first groove (406) of second oxide layer (401), in the substrate (402) and the first groove (406) by down toward
On successively be equipped with high dielectric thin film layer (403) and the first oxide layer (404), equipped with high dielectric thin film layer (403) and the first oxygen
Change layer (404) first groove (406) on formed through first oxide layer (404), the high dielectric thin film layer (403) and
The connecting groove (410) of part second oxide layer (401), on first oxide layer (404) and the connecting groove
(410) the first metal layer (405) is equipped in, al wiring is equipped on the first metal layer (405) of the connecting groove (410)
Plate (408), the aluminum wiring board (408) pass through the first metal layer (405) in the connecting groove (410) and the connecting groove
(410) the high dielectric thin film layer (403) electrical connection that side wall exposes, to apply voltage on the aluminum wiring board (408)
When for the high dielectric thin film layer (403) provide voltage.
2. CMOS type imaging sensor according to claim 1, which is characterized in that also formed in the substrate (402)
It is useful for the second groove being isolated between pixel unit (407).
3. CMOS type imaging sensor according to claim 2, which is characterized in that the bottom of the second groove (407)
There is pre-determined distance between the bottom surface of the substrate (402).
4. the CMOS type imaging sensor according to any one of claim 2-3, which is characterized in that including at least four institutes
State second groove (407), second grooves (407) composition of every four at least four second groove (407)
One rectangular area, each rectangular area surround a pixel unit wherein.
5. CMOS type imaging sensor according to claim 1, which is characterized in that the first metal layer (405) is tungsten
Layer.
6. CMOS type imaging sensor according to claim 1, which is characterized in that further include and be formed in second oxidation
Second metal layer (409) in layer (401)；
The aluminum wiring board (408) is electrically connected by the first metal layer (405) and the second metal layer (409).
7. a kind of production method of CMOS type imaging sensor, which is characterized in that including：
The second oxide layer (401) of one substrate (402) and the substrate (402) below is provided；
The coating photoresist above the substrate (402) carries out the photoresist in the substrate (402) using a mask plate
Exposure imaging, to form the first pattern on the photoresist of the substrate (402)；
The substrate (402) is performed etching according to the first pattern formed on the photoresist of the substrate (402), described in removing
Photoresist in substrate (402), forms first groove (406) in the substrate (402), and the first groove (406) is run through
The substrate (402) and part second oxide layer (401)；
It is sequentially depositing high dielectric thin film layer (403) and from the bottom to top in the substrate (402) and the first groove (406)
One oxide layer (404)；
Have in deposition and formed in the first groove (406) of the high dielectric thin film layer (403) and the first oxide layer (404) through institute
State the first oxide layer (404), the high dielectric thin film layer (403) and part second oxide layer (401) connecting groove
(410)；
Deposition the first metal layer (405) on first oxide layer (404) and in the connecting groove (410), connects described
Deposited aluminum layer on the first metal layer (405) in wire casing (410), forms aluminum wiring board (408), and the aluminum wiring board (408) is logical
The high dielectric that the first metal layer (405) and the connecting groove (410) side wall crossed in the connecting groove (410) expose is thin
Film layer (403) is electrically connected.
8. the method according to the description of claim 7 is characterized in that provide a substrate (402) and the substrate (402) below
The second oxide layer (401) after, the coating photoresist above described substrate (402), using a mask plate to the substrate
(402) photoresist on is exposed before development, and the method further includes：
Second metal layer (409) is formed in second oxide layer (401)；
Then, the method further includes：
The aluminum wiring board (408) is electrically connected by the first metal layer (405) with the second metal layer (409).
9. a kind of production method of CMOS type imaging sensor, which is characterized in that including：
The second oxide layer (401) of one substrate (402) and the substrate (402) below is provided；
The coating photoresist above the substrate (402) carries out the photoresist in the substrate (402) using a mask plate
Exposure imaging, to form first pattern and the second pattern on the photoresist of the substrate (402)；The area of first pattern
More than the area of second pattern；
The substrate (402) is carved according to the first pattern and the second pattern formed on the photoresist of the substrate (402)
Erosion, removes the photoresist in the substrate (402), first groove (406) and second groove is formed in the substrate (402)
(407), the first groove (406) is through the substrate (402) and part second oxide layer (401), second ditch
There is pre-determined distance between the bottom of slot (407) and the bottom surface of the substrate (402)；
It is sequentially depositing high dielectric thin film layer (403) from the bottom to top above the substrate (402) and the first groove (406)
With the first oxide layer (404)；
Have in deposition and formed in the first groove (406) of the high dielectric thin film layer (403) and the first oxide layer (404) through institute
State the first oxide layer (404), the high dielectric thin film layer (403) and part second oxide layer (401) connecting groove
(410)；
Deposition the first metal layer (405) on first oxide layer (404) and in the connecting groove (410), connects described
Deposited aluminum layer on the first metal layer (405) in wire casing (410), forms aluminum wiring board (408), and the aluminum wiring board (408) is logical
The high dielectric that the first metal layer (405) and the connecting groove (410) side wall crossed in the connecting groove (410) expose is thin
Film layer (403) is electrically connected.
10. according to the method described in claim 9, it is characterized in that, the second groove (407) is between pixel unit
The second groove (407) of isolation；
Then, the method further includes：
Etch the first metal layer (405) between the second groove (407), first oxide layer (404) and described
High dielectric thin film layer (403) to form metal grate, forms that light is made to enter pixel unit between the metal grate
Entering light area.
11. according to the method described in claim 9, it is characterized in that, the method further includes：
It is sequentially depositing high dielectric thin film layer (403) from the bottom to top above the substrate (402) and the first groove (406)
While with the first oxide layer (404), it is sequentially depositing high dielectric thin film layer from the bottom to top above the second groove (407)
(403) and the first oxide layer (404).
12. it according to the method described in claim 9, it is characterized in that, provides under a substrate (402) and the substrate (402)
After second oxide layer (401) in face, the coating photoresist above the substrate (402), using a mask plate to the base
Photoresist on bottom (402) is exposed before development, and the method further includes：
Second metal layer (409) is formed in second oxide layer (401)；
Then, the method further includes：
The aluminum wiring board (408) is electrically connected by the first metal layer (405) and the second metal layer (409).
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| CN110634898A (en) * | 2019-09-23 | 2019-12-31 | 上海华力微电子有限公司 | Deep silicon groove for back-illuminated image sensor and forming method thereof |
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