CN108259400B - Soft bit processing method, device and storage medium - Google Patents
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Abstract
The present disclosure relates to a soft bit processing method, apparatus and storage medium, including: acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in a data buffer area; performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit; determining a target soft bit from the absolute value of the combined soft bit, and determining a shift bit number according to the target soft bit; the combined soft bits are quantized according to the number of shifted bits.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a soft bit processing method, apparatus, and storage medium.
Background
In the communication field, before decoding a received signal, the received signal needs to be demodulated to obtain a Log Likelihood Ratio (LLR) of each received bit, that is, a soft bit, and the soft bit is subjected to rate de-matching and then used as an input of a decoder to decode the received signal.
The processing of the soft bits by the receiver includes soft bit combination and soft bit quantization, wherein for the soft bit quantization, the bit width of the soft bits obtained through demodulation is large, for example, 16 bits or 32 bits, but the bit width of the soft bits input to the decoder is smaller than the bit width of the soft bits after demodulation, for example, 4 to 8 bits. Therefore, the soft bits need to be quantized before they are input to the decoder to reduce the bit width of the soft bits.
In the prior art, a quantization method for soft bits includes: firstly, counting the distribution of soft bits, then determining the shift digit of the soft bits according to the statistical distribution, shifting the soft bits according to the shift digit, and finally intercepting Q high bits or saturating Q low bits in the soft bits after shifting to reduce the bit width of the soft bits, wherein Q is the bit width of the soft bits required by a decoder.
However, in the soft bit quantization by the related art, the inventors found that: the process of counting the soft bit distribution is complex, and the calculation amount is large, so that a large amount of system resources are occupied, and the running speed of the system is reduced.
Disclosure of Invention
An object of the present disclosure is to provide a soft bit processing method, apparatus and storage medium, which can simplify the step of combining soft bit quantization and the complexity of calculation, and increase the system calculation speed.
In order to achieve the above object, the present disclosure provides a soft bit processing method, including: acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in a data buffer area; performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit; determining target soft bits from the absolute values of the combined soft bits, and determining the number of shift bits according to the target soft bits; and quantizing the combined soft bits according to the number of the shift bits.
Optionally, the performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit includes: performing soft bit combination by a first formula to obtain the combined soft bit, wherein the first formula comprises:
wherein,
a jth of said combined soft bits representing said current received signal,
represents the jth first soft bit corresponding to the current received signal；
Represents a jth of the second soft bits corresponding to a last received signal stored in the data buffer; l represents the number of soft bits of the data buffer.
Optionally, the determining the target soft bit from the absolute value of the combined soft bit comprises: determining the target soft bit from the absolute value of the combined soft bit according to a second formula, the second formula comprising:
wherein,
representing the target soft bits of the data stream,
represents the jth of the combined soft bits of the current received signal, and L represents the number of soft bits of the data buffer.
Optionally, the determining the number of shift bits according to the target soft bits includes: determining the number of soft bits for calculating the shift bit number from the combined soft bits by a third formula; the third formula includes:
wherein P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first preset parameter,
representing the target soft bitL represents the number of soft bits in the data buffer;
and determining the shift bit number according to the soft bit number.
Optionally, the determining the number of shift bits according to the number of soft bits includes: calculating the number of shift bits by a fourth formula; the fourth formula includes:
wherein β represents the number of shift bits,
representing the target soft bits, ρ representing a first preset parameter, P representing the number of soft bits, γ representing a second preset parameter, and L representing the number of soft bits in the data buffer.
Optionally, the quantizing the combined soft bits according to the number of shifted bits includes: shifting the combined soft bits according to the shift bit number from high bits to low bits; and carrying out quantization according to the shifted combined soft bit.
The present disclosure also provides a soft bit processing apparatus, including: the device comprises an acquisition module, a data buffer and a processing module, wherein the acquisition module is used for acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in the data buffer; a merging module, configured to perform soft bit merging according to the first soft bit and the second soft bit to obtain a merged soft bit; a determining module, configured to determine a target soft bit from the absolute value of the merged soft bit, and determine a shift bit number according to the target soft bit; and the quantization module is used for quantizing the combined soft bit according to the shift bit number.
Optionally, the combining module is configured to perform soft bit combining according to a first formula to obtain the combined soft bit, where the first formula includes:
wherein,
a jth of said combined soft bits representing said current received signal,
representing a jth of the first soft bits corresponding to the currently received signal;
represents a jth of the second soft bits corresponding to a last received signal stored in the data buffer; l represents the number of soft bits of the data buffer.
Optionally, the determining module is configured to determine the target soft bit from the absolute value of the combined soft bit according to a second formula, where the second formula includes:
wherein,
representing the target soft bits of the data stream,
represents the jth of the combined soft bits of the current received signal, and L represents the number of soft bits of the data buffer.
Optionally, the determining module is configured to determine, by a third formula, a number of soft bits for calculating the shift bit number from the combined soft bits; the third formula includes:
wherein P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first preset parameter,
representing the target soft bits, L representing the number of soft bits in the data buffer;
and determining the shift bit number according to the soft bit number.
Optionally, the determining module is configured to calculate the shift bit number by a fourth formula; the fourth formula includes:
wherein β represents the number of shift bits,
representing the target soft bits, ρ representing a first preset parameter, P representing the number of soft bits, γ representing a second preset parameter, and L representing the number of soft bits in the data buffer.
Optionally, the quantization module is configured to shift the merged soft bits according to the shift bits in an order from high bits to low bits; and carrying out quantization according to the shifted combined soft bit.
The present disclosure also provides a soft bit processing apparatus, including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to: acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in a data buffer area; performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit; determining target soft bits from the absolute values of the combined soft bits, and determining the number of shift bits according to the target soft bits; and quantizing the combined soft bits according to the number of the shift bits.
The present disclosure also provides a computer readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the steps of the above-described soft bit processing method.
According to the technical scheme, the target soft bit is determined from the absolute value of the combined soft bit, the shift bit number is determined according to the target soft bit, and the combined soft bit is quantized according to the shift bit number, so that when the combined soft bit is shifted according to the shift bit number determined by the target soft bit, the effectiveness of the high bit in the combined soft bit after shifting can be guaranteed, the data precision of the combined soft bit obtained after quantization is improved, the effective information of the current received signal is guaranteed, and the decoding capability of a decoder is improved. Meanwhile, the method can simplify the step of combining soft bit quantization and the complexity of calculation, and improve the calculation speed of the system.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1 is a flow chart illustrating a method of soft bit processing in accordance with an exemplary embodiment;
FIG. 2 is a block diagram illustrating a soft bit processing apparatus according to an example embodiment;
fig. 3 is a schematic diagram illustrating a hardware structure of a soft bit processing apparatus according to an exemplary embodiment.
Detailed Description
The following detailed description of specific embodiments of the present disclosure is provided in connection with the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present disclosure, are given by way of illustration and explanation only, not limitation.
Before explaining the contents of the present disclosure, an application scenario of the present disclosure is first briefly explained.
The processing of the soft bits by the receiver includes soft bit combining and soft bit quantization. In the soft bit combining, when an HARQ (Hybrid Automatic Repeat Request) or a Repeat transmission Request is introduced into a communication system, a receiver combines soft bits after rate de-matching received retransmission data (retransmissions) or repeated data (repetitions), and the process mainly combines the soft bits corresponding to a current received signal and the soft bits stored in an HARQ buffer to obtain combined soft bits, and stores the combined soft bits into the HARQ buffer again, where the HARQ buffer is a storage area for storing the combined soft bits. In the prior art, soft bit combining is obtained by accumulating the product of combining weights respectively corresponding to the soft bit corresponding to the current received signal and the soft bit corresponding to the last received signal stored in the HARQ buffer, and the calculation formula is as follows:
wherein alpha isi∈[0,1]Represents combining weights calculated from the current received signal;
represents the j soft bit corresponding to the current received signal;
a j-th soft bit indicating the last received signal stored in the buffer;
represents the j soft bit after the current received signal is combined; l denotes the number of soft bits in the HARQ buffer.
It can be seen from the above soft bit combination method that the combining weight needs to be recalculated in each received signal, and the calculation logic of the combining weight is relatively complex, and in addition, at least one multiplication operation needs to be performed to obtain the combined soft bit, so that the method is relatively complex in calculation, and the calculation amount of the system is increased.
Secondly, for soft bit quantization, the higher the accuracy of the soft bits, the better the decoding performance of the decoder. However, the higher the accuracy of the soft bits, the larger the bit width of the soft bits, which results in a longer decoding time and affects decoding efficiency. In order to improve the decoding efficiency of the decoder, the bit width of the soft bits input to the decoder needs to be limited. In practical applications, the bit width of the soft bits obtained through demodulation is large, for example, 16 bits or 32 bits, and the bit width of the input decoder is limited, so that the bit width of the soft bits input to the decoder is smaller than the bit width of the soft bits after demodulation, for example, 4 to 8 bits. Therefore, before the soft bits are input into the decoder, quantization processing needs to be performed on the soft bits, so as to reduce the bit width of the soft bits, so as to meet the bit width of the soft bits required by the decoder.
In the prior art, a quantization method for soft bits includes: firstly, counting the distribution of the soft bits, then determining the shift digit of the soft bits according to the statistical distribution, shifting the soft bits according to the shift digit, and finally intercepting Q high bits in the soft bits or intercepting Q low bits of the soft bits in a saturation manner so as to reduce the bit width of the soft bits. However, the distribution process of the statistical soft bits is complex, and the calculation amount is large, which increases the implementation difficulty of the method.
In order to solve the problems that the process of soft bit quantization is complex and the calculation amount is large, thereby occupying a large amount of system resources and reducing the operation speed of a system in the prior art, the present disclosure provides a soft bit processing method, device and storage medium, by determining a target soft bit from an absolute value of a merged soft bit, determining a shift digit according to the target soft bit, and quantizing the merged soft bit according to the shift digit, so that when the merged soft bit is shifted according to the shift digit determined by the target soft bit, the validity of a high bit in the shifted merged soft bit can be ensured, the data precision of the merged soft bit obtained after quantization can be improved, thereby ensuring effective information of a current received signal and improving the decoding capability of a decoder. Meanwhile, the method can simplify the step of combining soft bit quantization and the complexity of calculation, and improve the calculation speed of the system.
The present disclosure is described in detail below with reference to specific examples.
Fig. 1 is a flow chart illustrating a soft bit processing method, as shown in fig. 1, applied to a communication system, according to an exemplary embodiment, the method including the following steps.
Wherein the current received signal comprises retransmitted data or repeated data received by the receiver when the system is according to a hybrid automatic repeat request or a repeat transmission request. The first soft bit may be obtained after the receiver performs rate de-matching on the current received signal, and the second soft bit may be a soft bit corresponding to the first soft bit in the last received signal stored in the data buffer. The data buffer may comprise a HARQ buffer.
And 102, performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit.
The soft bits may be combined in this step by a first formula, which includes:
wherein,
represents the jth first soft bit corresponding to the current received signal;
the jth second soft bit corresponding to the last received signal in the data buffer is represented;
represents the jth of the combined soft bits of the currently received signal, and L represents the number of the second soft bits.
It should be noted that, assuming that the bit width of the first soft bit is N and the bit width of the second soft bit is M, the maximum retransmission number or the number of times of repeated transmission that can be obtained by the communication system can be determined by setting the values of N and M. Therefore, in order to avoid the influence on the system response to the retransmission request or the repeated transmission request caused by too low limit of the retransmission times or the repeated transmission times in the system, N and M can be reasonably set. For example, when N equals 16 and M equals 32, 65536 retransmissions or repeated transmissions may be made.
In addition, when the system performs multiple retransmissions or repeated transmissions, correspondingly, the jth first soft bit of the currently received signal and the jth second soft bit corresponding to the last received signal in the data buffer are accumulated for multiple times, and the accumulated combined soft bit may exceed the data range that can be represented by the preset bit width, which causes the problem of overflow of the first formula. One solution to this problem is to saturate the accumulated combined soft bits. For example, when the accumulated combined soft bit exceeds the maximum value that can be represented by the preset bit width, the combined soft bit may be forcibly set to the maximum value that can be represented by the preset bit width; or, when the accumulated combined soft bit is smaller than the minimum value that can be represented by the preset bit width, the combined soft bit may be forcibly set to the minimum value that can be represented by the preset bit width. The embodiment is merely illustrative and is not limited to the solution of the first formula overflow problem.
Compared with the soft bit combination calculation in the prior art, the soft bit combination method provided by the embodiment has the advantages that the combination weight does not need to be recalculated in each received signal, and the multiplication operation in the soft bit combination is omitted, so that the soft bit combination method provided by the disclosure has less calculation amount, the operation steps are simplified, the calculation speed of a system can be improved, and the performance of the system is optimized.
In this step, the target soft bit may be determined from the absolute value of the combined soft bit by a second formula, where the second formula includes:
wherein,
the target soft bits are represented as a set of soft bits,
represents the jth of the combined soft bits of the current received signal, and L represents the number of soft bits in the data buffer. That is, the second formula can select the combined soft bit having the largest absolute value from the absolute values of the combined soft bits as the target soft bit.
Secondly, after determining the target soft bits, the method further includes: determining the number of soft bits for calculating the shift bit number from the combined soft bits by a third formula; the third formula includes:
where P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first predetermined parameter,
indicating the target soft bit, L indicating the number of soft bits in the data buffer, wherein the first predetermined parameter may be a threshold value of a maximum absolute value of absolute values of preset combined soft bits, i.e. the target soft ratioThe threshold value of the specific value, for example, may be set to 0.5.
Thus, the absolute value of the combined soft bit can be determined to be greater than the absolute value of the combined soft bit by the third formula
The number of soft bits of the combined soft bits.
And finally, after the soft bit number of the shift bit number is calculated according to the third formula, the shift bit number is determined according to the soft bit number.
Illustratively, the number of shift bits may be calculated by a fourth formula; the fourth formula includes:
wherein, β represents the number of the shift bits,
represents the target soft bit, ρ represents a first preset parameter, P represents the number of soft bits, γ represents a second preset parameter, and L represents the number of soft bits in the data buffer.
For example, the second preset parameter γ may be obtained through a large number of simulation experiments, for example, the value of the second preset parameter γ may be 0.3.
And 104, quantizing the combined soft bit according to the number of the shift bits.
In this step, the combined soft bits may be shifted in order from the upper bits to the lower bits according to the number of shifted bits. Therefore, when the combined soft bit is shifted according to the shift bit number determined by the target soft bit, the effectiveness of the high bit in the combined soft bit after shifting can be ensured, and the data precision of the combined soft bit obtained after quantization is improved, so that the effective information of the current received signal is ensured, and the decoding capability of the decoder is improved.
For example, the combined soft bits may be shifted by the following formula to obtain shifted combined soft bits:
wherein,
indicating the shifted combined soft bits and,
represents the jth combined soft bit corresponding to the current received signal, β represents the number of shift bits, and L represents the number of soft bits in the data buffer.
After obtaining the shifted soft combining bits, quantizing the shifted soft combining bits, and in a possible implementation, intercepting the soft bits of Q high bits of the shifted soft combining bits as the quantized soft combining bits, where Q represents a bit width of the soft bits required by the decoder.
For example, assuming that the merged soft bit is composed of several bits with an ABCDEFGH bit width of 8 from high to low, the number of shift bits is 4, and the bit width of the soft bit required by the decoder is also 4, the merged soft bit is first shifted from high to low by 4 bits to the right, after the shift, the merged soft bit of 4 high bits is intercepted, so that the quantized merged soft bit is obtained as ABCD, and the quantized merged soft bit is input to the decoder for decoding.
By the method, the target soft bit is determined from the absolute value of the combined soft bit, the shift bit number is determined according to the target soft bit, and the combined soft bit is quantized according to the shift bit number, so that when the combined soft bit is shifted according to the shift bit number determined by the target soft bit, the effectiveness of the high bit in the combined soft bit after shifting can be ensured, the data precision of the combined soft bit obtained after quantization is improved, the effective information of the current received signal is ensured, and the decoding capability of a decoder is improved. Meanwhile, the method can simplify the step of combining soft bit quantization and the complexity of calculation, and improve the calculation speed of the system.
Fig. 2 is a block diagram illustrating a soft bit processing apparatus according to an exemplary embodiment, as shown in fig. 2, the apparatus including:
an obtaining module 201, configured to obtain a first soft bit corresponding to a currently received signal and a second soft bit stored in a data buffer;
a combining module 202, configured to perform soft bit combining according to the first soft bit and the second soft bit to obtain a combined soft bit;
a determining module 203, configured to determine a target soft bit from the absolute value of the combined soft bit, and determine a shift bit number according to the target soft bit;
a quantization module 204, configured to quantize the combined soft bit according to the shift bit number.
Optionally, the combining module is configured to perform soft bit combining by using a first formula to obtain the combined soft bit, where the first formula includes:
wherein,
the jth of the combined soft bits representing the current received signal,
represents the jth first soft bit corresponding to the current received signal;
indicating the jth second soft bit corresponding to the last received signal stored in the data buffer; l represents the number of soft bits of the data buffer.
Optionally, the determining module is configured to determine the target soft bit from the absolute value of the combined soft bit according to a second formula, where the second formula includes:
wherein,
the target soft bits are represented as a set of soft bits,
j represents the combined soft bit of the current received signal, and L represents the number of soft bits of the data buffer.
Optionally, the determining module is configured to determine, by a third formula, a number of soft bits used for calculating the shift bit number from the combined soft bits; the third formula includes:
where P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first predetermined parameter,
indicating the target soft bit, L indicating the number of soft bits in the data buffer;
the number of shift bits is determined according to the number of soft bits.
Optionally, the determining module is configured to calculate the number of shift bits by a fourth formula; the fourth formula includes:
wherein, β represents the number of the shift bits,
represents the target soft bit, ρ represents a first preset parameter, P represents the number of soft bits, γ represents a second preset parameter, and L represents the number of soft bits in the data buffer.
Optionally, the quantization module is configured to shift the merged soft bits according to the shift bits in an order from high bits to low bits; and carrying out quantization according to the shifted combined soft bit.
By the device, the target soft bit is determined from the absolute value of the combined soft bit, the shift bit number is determined according to the target soft bit, and the combined soft bit is quantized according to the shift bit number, so that when the combined soft bit is shifted according to the shift bit number determined by the target soft bit, the validity of the high bit in the combined soft bit after shifting can be ensured, the data precision of the combined soft bit obtained after quantization is improved, the effective information of the current received signal is ensured, and the decoding capability of a decoder is improved. Meanwhile, the method can simplify the step of combining soft bit quantization and the complexity of calculation, and improve the calculation speed of the system.
Fig. 3 is a block diagram illustrating a soft bit processing apparatus 300 according to an example embodiment. As shown in fig. 3, the soft bit processing apparatus 300 may include: a processor 301, a memory 302, a multimedia component 303, an input/output (I/O) interface 304, and a communication component 305.
Wherein, the processor 301 is used to control the overall operation of the soft bit processing apparatus 300 to complete all or part of the steps of the above method. The memory 302 is used to store various types of data to support the operation of the soft bit processing apparatus 300, which may include, for example, instructions for any application or method operating on the soft bit processing apparatus 300, as well as application-related data. The Memory 302 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk or optical disk. The multimedia components 303 may include a screen and an audio component. Wherein the screen may be, for example, a touch screen and the audio component is used for outputting and/or inputting audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signal may further be stored in the memory 302 or transmitted through the communication component 305. The audio assembly also includes at least one speaker for outputting audio signals. The I/O interface 304 provides an interface between the processor 301 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 305 is used for wired or wireless communication between the soft bit processing apparatus 300 and other devices. Wireless Communication, such as Wi-Fi, bluetooth, Near Field Communication (NFC), 2G, 3G or 4G, or a combination of one or more of them, so that the corresponding Communication component 305 may include: Wi-Fi module, bluetooth module, NFC module.
In an exemplary embodiment, the soft bit Processing apparatus 300 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components, and is configured to perform any one of the above methods of soft bit Processing.
In another exemplary embodiment, a computer readable storage medium comprising program instructions, such as the memory 302 comprising program instructions, executable by the processor 301 of the soft bit processing apparatus 300 to perform any one of the methods of soft bit processing described above is also provided.
The preferred embodiments of the present disclosure are described in detail with reference to the accompanying drawings, however, the present disclosure is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solution of the present disclosure within the technical idea of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.
It should be noted that, in the foregoing embodiments, various features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various combinations that are possible in the present disclosure are not described again.
In addition, any combination of various embodiments of the present disclosure may be made, and the same should be considered as the disclosure of the present disclosure, as long as it does not depart from the spirit of the present disclosure.
Claims (8)
1. A method of soft bit processing, comprising:
acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in a data buffer area;
performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit;
determining target soft bits from the absolute values of the combined soft bits, and determining the number of shift bits according to the target soft bits;
quantizing the combined soft bits according to the number of the shift bits;
the determining the target soft bit from the absolute value of the combined soft bit comprises:
determining the target soft bit from the absolute value of the combined soft bit according to a second formula, the second formula comprising:
wherein,
representing the target soft bits of the data stream,
a j-th said combined soft bit representing said current received signal, L representing the number of soft bits of said data buffer;
the determining the number of shift bits according to the target soft bits comprises:
determining the number of soft bits for calculating the shift bit number from the combined soft bits by a third formula; the third formula includes:
wherein P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first preset parameter,
representing the target soft bits, L representing the number of soft bits in the data buffer;
determining the shift digit according to the soft bit number;
calculating the number of shift bits by a fourth formula; the fourth formula includes:
wherein β represents the number of shift bits,
to representAnd P represents a first preset parameter, P represents the number of the soft bits, γ represents a second preset parameter, and L represents the number of the soft bits in the data buffer.
2. The method of claim 1, wherein the soft bit combining according to the first soft bit and the second soft bit to obtain a combined soft bit comprises:
performing soft bit combination by a first formula to obtain the combined soft bit, wherein the first formula comprises:
wherein,
a jth of said combined soft bits representing said current received signal,
representing a jth of the first soft bits corresponding to the currently received signal;
represents a jth of the second soft bits corresponding to a last received signal stored in the data buffer; l represents the number of soft bits of the data buffer.
3. The method of any of claims 1-2, wherein the quantizing the combined soft bits according to the number of shifted bits comprises:
shifting the combined soft bits according to the shift bit number from high bits to low bits;
and carrying out quantization according to the shifted combined soft bit.
4. A soft bit processing apparatus, comprising:
the device comprises an acquisition module, a data buffer and a processing module, wherein the acquisition module is used for acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in the data buffer;
a merging module, configured to perform soft bit merging according to the first soft bit and the second soft bit to obtain a merged soft bit;
a determining module, configured to determine a target soft bit from the absolute value of the merged soft bit, and determine a shift bit number according to the target soft bit;
a quantization module for quantizing the merged soft bits according to the number of the shift bits;
the determining module is configured to determine the target soft bit from the absolute value of the combined soft bit according to a second formula, where the second formula includes:
wherein,
representing the target soft bits of the data stream,
a j-th said combined soft bit representing said current received signal, L representing the number of soft bits of said data buffer;
the determining module is used for determining the number of soft bits for calculating the shift bit number from the combined soft bits through a third formula; the third formula includes:
wherein P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first preset parameter,
representing the target soft bits, L representing the number of soft bits in the data buffer;
determining the shift digit according to the soft bit number;
the determining module is used for calculating the shift digit number through a fourth formula; the fourth formula includes:
wherein β represents the number of shift bits,
representing the target soft bits, ρ representing a first preset parameter, P representing the number of soft bits, γ representing a second preset parameter, and L representing the number of soft bits in the data buffer.
5. The apparatus of claim 4, wherein the combining module is configured to perform soft bit combining according to a first formula to obtain the combined soft bit, and wherein the first formula comprises:
wherein,
a jth of said combined soft bits representing said current received signal,
representing a jth of the first soft bits corresponding to the currently received signal;
represents a jth of the second soft bits corresponding to a last received signal stored in the data buffer; l represents the number of soft bits of the data buffer.
6. The apparatus according to any of claims 4 to 5, wherein the quantization module is configured to shift the combined soft bits according to the shift bits in an order from higher bits to lower bits; and carrying out quantization according to the shifted combined soft bit.
7. A soft bit processing apparatus, comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to: acquiring a first soft bit corresponding to a current received signal and a second soft bit stored in a data buffer area; performing soft bit combination according to the first soft bit and the second soft bit to obtain a combined soft bit; determining target soft bits from the absolute values of the combined soft bits, and determining the number of shift bits according to the target soft bits; quantizing the combined soft bits according to the number of the shift bits;
the determining the target soft bit from the absolute value of the combined soft bit comprises:
determining the target soft bit from the absolute value of the combined soft bit according to a second formula, the second formula comprising:
wherein,
representing the target soft bits of the data stream,
a j-th said combined soft bit representing said current received signal, L representing the number of soft bits of said data buffer;
the determining the number of shift bits according to the target soft bits comprises:
determining the number of soft bits for calculating the shift bit number from the combined soft bits by a third formula; the third formula includes:
wherein P represents the number of soft bits,
represents the jth combined soft bit corresponding to the current received signal, p represents a first preset parameter,
representing the target soft bits, L representing the number of soft bits in the data buffer;
determining the shift digit according to the soft bit number;
calculating the number of shift bits by a fourth formula; the fourth formula includes:
wherein β represents the number of shift bits,
representing the target soft bits, P representing a first preset parameter, P representing the soft ratioThe number of bits, γ represents a second preset parameter, and L represents the number of soft bits in the data buffer.
8. A computer-readable storage medium, on which computer program instructions are stored, which program instructions, when executed by a processor, carry out the steps of the method according to any one of claims 1 to 3.
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