CN108259399A - Time-domain equalizer and its control method - Google Patents

Time-domain equalizer and its control method Download PDF

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Publication number
CN108259399A
CN108259399A CN201611232713.6A CN201611232713A CN108259399A CN 108259399 A CN108259399 A CN 108259399A CN 201611232713 A CN201611232713 A CN 201611232713A CN 108259399 A CN108259399 A CN 108259399A
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retardation
signal
estimation
partial differential
cost function
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CN108259399B (en
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周禹伸
廖懿颖
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MediaTek Inc
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MStar Semiconductor Inc Taiwan
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03012Arrangements for removing intersymbol interference operating in the time domain
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03878Line equalisers; line build-out devices
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L2025/03433Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439Fixed structures
    • H04L2025/03445Time domain

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Filters That Use Time-Delay Elements (AREA)

Abstract

The present invention provides a kind of time-domain equalizer, to eliminate the echo-signal in a reception signal.The reception signal includes an original signal and the echo-signal.The time-domain equalizer includes a time delay estimator, an Amplitude amplification multiplying power estimator and a phase pushing figure estimator.The time delay estimator finds out the retardation that a cost function can be enabled to be maximized, and estimates retardation relative to the one of the original signal as the echo-signal.The Amplitude amplification multiplying power estimator determines that the echo-signal estimates Amplitude amplification multiplying power relative to the one of the original signal according to the estimation retardation.The phase pushing figure estimator determines that the echo-signal estimates phase offset relative to the one of the original signal according to the estimation retardation.

Description

Time-domain equalizer and its control method
Technical field
The present invention is related to time-domain equalizer and especially related to the parameter deciding means in time-domain equalizer.
Background technology
Orthogonal frequency division multiplexing (orthogonal frequency-division multiplexing, OFDM) technology is because of tool Have the advantages that the availability of frequency spectrum is high, hardware structure is simple, be widely used in communication system in recent years.Orthogonal frequency division multiplexing is believed It number is made of multiple symbols (symbol).In order to avoid the intersymbol interference caused by multicast path (multipath) (intersymbol interference, ISI), each symbol front end are all equipped with a protection interval (guard interval).So And in more complicated communication environment, it is also possible that occurring more than the propagation delay of the protection interval length, thus cause Intersymbol interference causes the overall efficiency of system to decline.This problem can not be solved by frequency-domain equalization technology, but must be One time-domain equalizer is additionally set before the frequency domain equalizer of receiving terminal.It has only in correct estimation multicast path each time Wave signal (echo signal) relative to original signal arrival time retardation, Amplitude amplification multiplying power and phase pushing figure, And the time-domain equalizer is set accordingly, the beginning can effectively eliminate or reduce interference of these echo-signals for original signal as possible.
Invention content
The present invention proposes a kind of time-domain equalizer and its control method.By defining an appropriate cost function (cost function) can estimate echo letter as assessment basis, time-domain equalizer according to the present invention and control method Number relative to original signal time delay.Further, according to the estimation retardation, the echo-signal is relative to original The amplitude multiplying power of signal can be also determined with phase offset.
A specific embodiment according to the present invention is a kind of time-domain equalizer, to eliminate the echo in a reception signal Signal.The reception signal includes an original signal and the echo-signal.The time-domain equalizer is estimated comprising a time delay Device, an Amplitude amplification multiplying power estimator and a phase pushing figure estimator.The time delay estimator is found out first to be enabled The retardation that one cost function is maximized estimates retardation as the echo-signal relative to the one of the original signal.It should Amplitude amplification multiplying power estimator determines that the echo-signal estimates amplitude relative to the one of the original signal according to the estimation retardation Enlargement ratio.The phase pushing figure estimator determines the echo-signal relative to the original signal according to the estimation retardation One estimation phase offset.The cost function is:
Wherein, symbol y represents the reception signal, and k represents a sampling index, and signal y [k+ τ] represents reception signal process Length be τ time delay after generate one delay after signal, y*[k+ τ] represents the conjugated signal of signal after the delay.
Another specific embodiment according to the present invention is a kind of control method for being applied to a time-domain equalizer.The time domain is equal Weighing apparatus is eliminating the echo-signal in a reception signal.The reception signal includes an original signal and the echo-signal. First, the retardation that a cost function is maximized can be enabled to be found, as the echo-signal relative to the original signal One estimation retardation.According to the estimation retardation, which estimates Amplitude amplification multiplying power relative to the one of the original signal It is determined with an estimation phase offset.Then, the estimation retardation, the estimation Amplitude amplification multiplying power and the estimation phase offset quilt To set the filter condition that the time-domain equalizer will be applied to the reception signal.The cost function is:
Wherein, symbol y represents the reception signal, and k represents a sampling index, and signal y [k+ τ] represents reception signal process Length be τ time delay after generate one delay after signal, y*[k+ τ] represents the conjugated signal of signal after the delay.
Description of the drawings
For the above objects, features and advantages of the present invention can be clearer and more comprehensible, below in conjunction with attached drawing to the tool of the present invention Body embodiment elaborates, wherein:
Fig. 1 is the functional block diagram of the time-domain equalizer in one embodiment of the invention.
Fig. 2 is the flow chart of the time-domain equalizer control method in one embodiment of the invention.
It should be noted that attached drawing of the invention includes the functional block diagram that a variety of functional devices associated with each other are presented.This A little attached drawings are not thin portion circuit diagram, and connecting line therein is only representing signal stream.It is more between functional element and/or program Kind interactive relationship is not necessarily intended to reach by the direct electrical connection beginning.In addition, the function of individual component is not necessarily intended to as attached The mode being painted in figure is distributed, and distributed block is not necessarily intended to realize with distributed electronic component.
Component label instructions are as follows in figure:
100:Time-domain equalizer 11:Candidate delay amount generation circuit
12:Time delay estimator 14:Amplitude amplification multiplying power estimator
16:Phase pushing figure estimator 18:Wave filter
S22~S26:Process step
Specific embodiment
In signal model of the present invention, the original signal that transmission end is sent out is represented as symbol x, and receiving terminal is received To reception signal be represented as symbol y.Do not considering that symbol time offset (symbol timing offset) and frequency are inclined In the case of moving (frequency offset), behind multicast path, receiving signal y can represent as follows:
Wherein k represents a sampling index, and the multicast path that P represents transmission end to the transmission channel between receiving terminal is caused Echo-signal total quantity.It can be seen that by formula one, receive signal y i.e. original signal x and the summation of P echo-signal.Symbol Number ap、θp,k、(Mpp) p-th of echo-signal representing respectively in this P echo-signal put relative to the amplitude of original signal x Big multiplying power, phase pushing figure and arrival time retardation (P is a positive integer, and p is range 1 to the integer index between P).n[k] Represent noise signal.Arrival time retardation (Mpp) include two ingredients, symbol MpIt is that the outline of the pth echo-signal prolongs Chi Liang is that receiving terminal can be by person known to fast fourier inverse transformation, but fine delay amount ΔpIt is difficult to measure.
According to formula one, the transfer function between the reception signal y that original signal x and receiving terminal receive can be defined as:
The design object of time-domain equalizer provided by the present invention is to eliminate as much as the echo-signal in signal y, Transfer function Z/X between the output signal z of time-domain equalizer and original signal x is exactly enabled close to 1.Therefore, ideal can be reasoned out Transfer function Z/Y should be:
Correspondingly, the desired output signal z of time-domain equalizer is:
Fig. 1 is the functional block diagram of the time-domain equalizer in one embodiment of the invention.Time-domain equalizer 100 can be estimated Arrival time retardation, Amplitude amplification multiplying power and phase pushing figure of each echo-signal relative to original signal x are counted out, is become Adjustment receives the foundation of signal y.As shown in Figure 1, time-domain equalizer 100 includes a candidate delay amount generation circuit 11, a time Retardation estimator 12, an Amplitude amplification multiplying power estimator 14, a phase pushing figure estimator 16 and a wave filter 18;Each electricity The function mode on road is described below.
For an echo-signal, time delay estimator 12 is found out first can enable a cost function (cost Function the arrival time retardation) being maximized, as the echo-signal relative to the estimation retardation of original signal xThe cost function is:
Wherein k represents a sampling index, and y [k] is k-th of sampling for receiving signal y.Signal y [k+ τ] representation signal y [k] Signal after the delay generated after length is the time delay of τ, y*[k+ τ] then represents the conjugation of signal y [k+ τ] after delay Signal.Signal y [k+ τ] is generated by time delay estimator 12 according to signal y [k] after delay;Retardation τ is time delay 12 controllable variables of estimator.Operation in formula five can be considered as signal y [k+ τ] after calculating signal y [k] and its postponing Correlation, and by the correlation operation result through adding up after a period of time.Theoretically, time delay estimator 12 is adopted Retardation τ can make the phase of signal y [k+ τ] after signal y [k] and its delay closer to the actual delay amount of the echo-signal Closing property is higher, and then enables the result of calculation of formula five bigger.In view of this, time delay estimator 12 is designed to find out and can enable The maximized retardation τ of cost function C (τ), as the echo-signal relative to the estimation retardation of original signal x
Candidate delay amount generation circuit 11 can preselect or determine multiple candidate delay amounts immediately, and the time is supplied to prolong Amount estimator 12 late.As it was earlier mentioned, the outline retardation M of pth echo-signalpIt is that receiving terminal can be by fast Flourier inversion Change known person, but fine delay amount ΔpIt is difficult to measure.For each echo-signal, candidate delay amount generation circuit 11 Its outline retardation can be first found out, and candidate delay amount is selected out of the outline retardation nearby sphere.For example, it is assumed that The known nearby sphere is (Mpmin)~(Mpmax) and it is desirable that select ten candidate delay amount τ09, then candidate can be enabled to prolong Amount τ late0Equal to (Mpmin), enable candidate delay amount τ9Equal to (Mpmax), and in candidate delay amount τ0With τ9Between interpolation generate Go out the candidate delay amount τ of other eight ascending equidistant intervals18
In practice, time delay estimator 12 there are many find out enable the maximized retardation τ of cost function C (τ) can It can way;Several embodiments are enumerated below, but scope of the invention is not limited.
In an embodiment, time delay estimator 12 can be according to candidate delay amount τ09It generates respectively and receives signal y Ten kinds of delays after signal, and ten cost function operation result C are generated with receiving signal y according to signal after this ten kinds delays (τ0)~C (τ9).Then, according to cost function operation result C (τ0)~(τ9), the selection of time delay estimator 12 can generate The candidate delay amount of one maximum cost function operation result, as estimation retardationFor example, if C (τ3) it is cost function Operation result C (τ0)~C (τ9) in a maximum cost function operation result, time delay estimator 12 can select to prolong Amount τ late3As estimation retardation
In another embodiment, cost function C (τ) is imposed one caused by partial differential using retardation τ as partial derivative Partial differential function C ' (τ) is to be provided previously.Multiple candidate delay amounts are substituted into partial differential letter by time delay estimator 12 respectively Number C ' (τ), to generate multiple partial differential operation results, such as C ' (τ0)~C ' (τ9).Then, time delay estimator 12 selects The candidate delay amount that can be generated closest to zero partial differential operation result is selected, as estimation retardationIn other words, if C′(τ3) it is partial differential operation result C ' (τ0)~C ' (τ9) in closest to zero a partial differential operation result, time delay Estimator 12 can select retardation τ3As estimation retardation
In another embodiment, similarly, partial differential is imposed to cost function C (τ) using retardation τ as partial derivative and is produced A raw partial differential function C ' (τ) is to be provided previously.First, time delay estimator 12 is respectively by multiple candidate delay amount generations Enter cost function C (τ), to generate multiple cost function operation results, such as C (τ0)~C (τ9).Then, it is transported according to cost function Calculate result C (τ0)~C (τ9), time delay estimator 12 selects the candidate that can generate a maximum cost function operation result to prolong Chi Liang, as a retardation, and further inquire into more accurately estimate retardation accordingly according to a preliminary estimate(it is first to be necessarily adjacent to this Step estimation retardation).With retardation τ3This is selected as according to a preliminary estimate for retardation, time delay estimator 12 can will Retardation τ according to a preliminary estimate3Partial differential function C ' (τ) is substituted into, to generate one first partial differential result C ' (τ3).Assuming that candidate delay Measure τ09It is ascending sequential.If it will be appreciated that the first partial differential result C ' (τ3) it is more than zero, it can maximize The retardation (retardation that also its partial differential result can be enabled essentially a zero) of cost function C (τ) is likely to appear in candidate Retardation τ3、τ4Between, and candidate delay amount τ4Corresponding partial differential result C ' (τ4) it is possibly less than zero.Relatively, if first Partial differential result C ' (τ3) less than zero, can maximize the retardation of cost function C (τ) (can also enable its partial differential result substantially The retardation for being zero) then it is likely to appear in candidate delay amount τ2、τ3Between, and candidate delay amount τ4Corresponding partial differential result C′(τ4) it is likely to be greater than zero.Therefore, according to the first partial differential result C ' (τ3) sign, time delay estimator 12 can From multiple candidate delay amount τ09Middle reselection another refer to retardation.For example, if the first partial differential result C ' (τ3) To be more than zero, time delay estimator 12 can select candidate delay amount τ4As another with reference to retardation, and will refer to Retardation τ4Partial differential function C ' (τ) is substituted into, to generate one second partial differential result C ' (τ4).Then, time delay estimator 12 can be according to the first partial differential result C ' (τ3) and the second partial differential result C ' (τ4) interpolation generation enable partial differential result essentially a zero Retardation, as estimation retardation
It should be noted that in practical application, above-mentioned candidate delay amount is not necessarily correspond to the sampling index k of integer, Such as sampling index k=1.5 or k=1.75 can be corresponded to.More specifically, if the sampling index k of non-integer to be generated, The candidate delay amount that time delay estimator 12 uses can be according to several retardations one corresponding to integer sampling index k Stage or multistage interpolation generate.A two benches interpolation presented below generates the example of candidate delay amount.
First, first stage interpolation is to generate multiple preliminary interpolation results y (k+tj).For example, it is initial using five Retardation t0~t4Corresponding reception signal y can linear combination go out five preliminary interpolation results y (k+tj):
Wherein j is integer index of the range between 0 to 4;For weight coefficient, each retardation tjWeight coefficient all It is different;MjIt is a basic retardation (with tjIt is unrelated).
Then, second stage interpolation is to generate multiple second stage interpolation results y (k+ τi).For example, basis is utilized Y (the k+t that formula six obtainsj) interpolation it can generate 11 second stage interpolation results y (k+ τ againi):
Wherein i is integer index of the range between 0 to 10,For weight coefficient, each retardation tjWeight coefficient all It is different.
Convolution six and formula seven, can be by cost function C (τi) be unfolded as follows:
Wherein,
According to formula eight and formula nine, partial differential function C ' (τ can be exportedi):
A thereink,I、Ak,QCorrespond respectively to same phase constituent and the Quadrature-phase component in signal.In practice, coefficient WithIt can precalculate and store in memory as with reference to data, be used for time delay estimator 12.
In time delay estimator 12 estimation retardation is generated for an echo-signalLater, Amplitude amplification multiplying power is estimated Gauge 14 is just according to estimation retardationDetermine estimation Amplitude amplification multiplying power of the echo-signal relative to original signal xYu Yi In embodiment, Amplitude amplification multiplying power estimator 14 determines the estimation Amplitude amplification multiplying power according to following arithmetic expression:
Wherein k ∈ GI, it is that selection corresponds between a protection of original signal x to represent when calculating the estimation Amplitude amplification multiplying power Sampling result in (guard interval),Represent the estimation retardation of the generation of time delay estimator 12, μ generations Receiving terminal belonging to table time-domain equalizer 100 imposes on the length for the Fast Fourier Transform for receiving signal y.In practice, formula 11 In numerical valueIt may have been generated by time delay estimator 12 a little earlier, the estimation of Amplitude amplification multiplying power can be supplied directly to Device 14 uses.
In addition, estimation retardation is generated for an echo-signal in time delay estimator 12Later, phase pushing figure Estimator 16 is just according to estimation retardationDetermine estimation phase offset of the echo-signal relative to original signal xYu Yishi It applies in example, phase pushing figure estimator 16 finds out operation resultPhase angle (or argument), it is inclined as the estimation phase It movesIn practice, operation resultIt is generated by time delay estimator 12 a little earlier, phase pushing figure can be supplied directly to Estimator 16 uses.
Finally, wave filter 18 is according to the estimation retardation of each echo-signalEstimate Amplitude amplification multiplying powerWith estimating phase Position offsetThe filter condition for receiving signal y will be applied to set.It should be noted that how according to the estimation of each echo-signal RetardationEstimate Amplitude amplification multiplying powerWith estimating phase offsetBelieved to set appropriate filter condition with filtering out these echoes Number known to the technical staff in the technical field of the invention, not repeated in this.
The technical staff in the technical field of the invention is it is understood that can be without departing substantially from this there are many circuit configurations and element Candidate delay amount generation circuit 11, time delay estimator 12, the estimation of Amplitude amplification multiplying power are realized in the case of spirit Device 14, phase pushing figure estimator 16, such as fixed and programmable logic circuit, such as programmable gate array, For the integrated circuit of specific application, microcontroller, microprocessor, digital signal processor.In addition, these estimators also can quilt It is designed as by performing processor instruction stored in memory, to complete its processor active task.
Another specific embodiment according to the present invention be a kind of control method for being applied to a time-domain equalizer, flow chart It is illustrated in Fig. 2.The time-domain equalizer is eliminating the echo-signal in a reception signal.The reception signal includes an original letter Number and the echo-signal.First, step S22 is to find out the retardation that a cost function can be enabled to be maximized, as this time Wave signal estimates retardation relative to the one of the original signal.In step s 24, according to the estimation retardation, the echo-signal It is determined relative to an estimation Amplitude amplification multiplying power and an estimation phase offset for the original signal.Then, in step S26, The estimation retardation, the estimation amplitude multiplying power and the estimation phase offset are used to set the time-domain equalizer and will be applied to this and connect One filter condition of the collection of letters number.In step S22, which is:
Wherein, symbol y represents the reception signal, and k represents a sampling index, and signal y [k+ τ] represents reception signal process Length be τ time delay after generate one delay after signal, y*[k+ τ] represents the conjugated signal of signal after the delay.
The technical staff in the technical field of the invention when introducing time-domain equalizer 100 it is understood that previously describe Various operation changes can also be applied to the control method in Fig. 2, and details repeats no more.
It should be noted that Mathematical representation herein is illustrating principle relevant with the embodiment of the present invention and patrol Volume, unless there are situation about specializing, otherwise scope of the invention is not construed as limiting.Skill in the technical field of the invention Art personnel are it is understood that can realize the physical manifestation corresponding to these mathematical expressions there are many technology.
Although the present invention is disclosed as above with preferred embodiment, however, it is not to limit the invention, any this field skill Art personnel, without departing from the spirit and scope of the present invention, when can make a little modification and it is perfect, therefore the present invention protection model It encloses to work as and is subject to what claims were defined.

Claims (12)

1. a kind of time-domain equalizer, to eliminate the echo-signal in a reception signal, which includes an original letter Number and the echo-signal, the time-domain equalizer include:
One time delay estimator finds out the retardation that a cost function is enabled to be maximized, opposite as the echo-signal One in the original signal estimates retardation;
One Amplitude amplification multiplying power estimator, according to the estimation retardation, to determine the echo-signal relative to the original signal One estimation Amplitude amplification multiplying power;And
One phase pushing figure estimator, according to the estimation retardation, to determine the echo-signal relative to the original signal One estimation phase offset;
Wherein the cost function is:
Wherein, symbol y represents the reception signal, and k represents a sampling index, and signal y [k+ τ] represents the reception signal by length For generated after the time delay of τ one delay after signal, y*[k+ τ] represents the conjugated signal of signal after the delay.
2. time-domain equalizer as described in claim 1, which is characterized in that the Amplitude amplification multiplying power estimator is according to following fortune Formula determines the estimation Amplitude amplification multiplying power:
Wherein k ∈ GI represent the sampling knot chosen in the protection interval (guard interval) corresponding to the original signal Fruit,The estimation retardation of time delay estimator generation is represented, μ represents the length of a Fast Fourier Transform.
3. time-domain equalizer as described in claim 1, which is characterized in that the phase pushing figure estimator finds out operation resultPhase angle, as the estimation phase offset,Represent the estimation retardation of retardation estimator generation.
4. time-domain equalizer as described in claim 1, which is characterized in that the retardation estimator is used to:
Multiple candidate delay amounts are substituted into the cost function respectively, to generate multiple cost function operation results;And
According to multiple cost function operation result, selection can generate the candidate delay amount of a maximum cost function operation result, As the estimation retardation.
5. time-domain equalizer as described in claim 1, which is characterized in that using retardation τ as partial derivative to the cost function It is to be provided previously to impose a partial differential function caused by partial differential;The retardation estimator is used to:
Multiple candidate delay amounts are substituted into the partial differential function respectively, to generate multiple partial differential operation results;And
According to multiple partial differential operation result, selection can generate the candidate delay amount closest to zero partial differential operation result, As the estimation retardation.
6. time-domain equalizer as described in claim 1, which is characterized in that using retardation τ as partial derivative to the cost function It is to be provided previously to impose a partial differential function caused by partial differential;The retardation estimator is used to:
Multiple candidate delay amounts are substituted into the cost function respectively, to generate multiple cost function operation results;
According to multiple cost function operation result, selection can generate the candidate delay amount of a maximum cost function operation result, As a retardation according to a preliminary estimate;
By this, retardation substitutes into the partial differential function according to a preliminary estimate, to generate one first partial differential result;
According to the sign of the first partial differential result, retardation is referred to from multiple candidate delay amount selection one;
This is substituted into the partial differential function with reference to retardation, to generate one second partial differential result;And
The estimation retardation is generated according to the first partial differential result and the second partial differential result interpolation.
7. a kind of control method for being applied to a time-domain equalizer, which is one eliminated in a reception signal Echo-signal, the reception signal include an original signal and the echo-signal, which includes:
(a) retardation that a cost function can be enabled to be maximized is found out, as the echo-signal relative to the original signal One estimation retardation;
(b) according to the estimation retardation, determine the echo-signal relative to the original signal an estimation Amplitude amplification multiplying power with One estimation phase offset;And
(c) according to the estimation retardation, the estimation amplitude multiplying power and the estimation phase offset, setting the time-domain equalizer will apply In a filter condition of the reception signal;
Wherein the cost function is:
Wherein, symbol y represents the reception signal, and k represents a sampling index, and signal y [k+ τ] represents the reception signal by length For generated after the time delay of τ one delay after signal, y*[k+ τ] represents the conjugated signal of signal after the delay.
8. control method as claimed in claim 7, which is characterized in that step (b) according to following arithmetic expression comprising determining that this is estimated Count Amplitude amplification multiplying power:
Wherein k ∈ GI represent the sampling knot chosen in the protection interval (guard interval) corresponding to the original signal Fruit,The estimation retardation of step (a) generation is represented, μ represents the length of a Fast Fourier Transform.
9. control method as claimed in claim 7, which is characterized in that step (b) includes:
Find out operation resultPhase angle, as the estimation phase offset,Represent the estimation delay of step (a) generation Amount.
10. control method as claimed in claim 7, which is characterized in that step (a) includes:
Multiple candidate delay amounts are substituted into the cost function respectively, to generate multiple cost function operation results;And
According to multiple cost function operation result, selection can generate the candidate delay amount of a maximum cost function operation result, As the estimation retardation.
11. control method as claimed in claim 7, which is characterized in that applied using retardation τ as partial derivative to the cost function It is to be provided previously with a partial differential function caused by partial differential, step (a) includes:
Multiple candidate delay amounts are substituted into the partial differential function respectively, to generate multiple partial differential operation results;And
According to multiple partial differential operation result, selection can generate the candidate delay amount closest to zero partial differential operation result, As the estimation retardation.
12. control method as claimed in claim 7, which is characterized in that applied using retardation τ as partial derivative to the cost function It is to be provided previously with a partial differential function caused by partial differential, step (a) includes:
Multiple candidate delay amounts are substituted into the cost function respectively, to generate multiple cost function operation results;
According to multiple cost function operation result, selection can generate the candidate delay amount of a maximum cost function operation result, As a retardation according to a preliminary estimate;
By this, retardation substitutes into the partial differential function according to a preliminary estimate, to generate one first partial differential result;
According to the sign of the first partial differential result, retardation is referred to from multiple candidate delay amount selection one;
This is substituted into the partial differential function with reference to retardation, to generate one second partial differential result;And
The estimation retardation is generated according to the first partial differential result and the second partial differential result interpolation.
CN201611232713.6A 2016-12-28 2016-12-28 Time domain equalizer and control method thereof Expired - Fee Related CN108259399B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1602594A (en) * 2000-06-01 2005-03-30 艾利森电话股份有限公司 Frequency domain echo canceller
CN101277406A (en) * 2007-03-31 2008-10-01 索尼德国有限责任公司 Demodulator, method and receiver for demodulation
CN101471688A (en) * 2007-12-25 2009-07-01 安国国际科技股份有限公司 Apparatus and method for estimating and compensating sampling frequency offset
WO2014076606A1 (en) * 2012-11-15 2014-05-22 Novelsat Ltd. Echo cancellation in communication transceivers

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1602594A (en) * 2000-06-01 2005-03-30 艾利森电话股份有限公司 Frequency domain echo canceller
CN101277406A (en) * 2007-03-31 2008-10-01 索尼德国有限责任公司 Demodulator, method and receiver for demodulation
CN101471688A (en) * 2007-12-25 2009-07-01 安国国际科技股份有限公司 Apparatus and method for estimating and compensating sampling frequency offset
WO2014076606A1 (en) * 2012-11-15 2014-05-22 Novelsat Ltd. Echo cancellation in communication transceivers

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