CN108258930B - Circuit for obtaining Q-switched high-voltage pulse - Google Patents
Circuit for obtaining Q-switched high-voltage pulse Download PDFInfo
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- CN108258930B CN108258930B CN201711456196.5A CN201711456196A CN108258930B CN 108258930 B CN108258930 B CN 108258930B CN 201711456196 A CN201711456196 A CN 201711456196A CN 108258930 B CN108258930 B CN 108258930B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
- H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device
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Abstract
According to the circuit for obtaining the Q-switched high-voltage pulse, the voltage of the high-voltage charging circuit is amplified by the voltage doubling circuit, and the externally input Q-switched signal is shaped and filtered by the signal processing circuit, so that a pulse driving signal is obtained to drive the positive and negative high-voltage pulse signal generating circuit to output the high-voltage pulse with opposite positive and negative according to the amplified voltage; compared with the traditional high-voltage pulse circuit, when the high-voltage pulse with the same size is obtained, the voltage value of the high-voltage pulse is only half of that of the traditional high-voltage pulse, the risk that the circuit is easily ignited due to overhigh voltage is effectively avoided, and the safety of the circuit is guaranteed; meanwhile, the size of the induced voltage of the transformer of the high-voltage charging circuit is related to the oscillation time of the transformer, so that the oscillation time of the transformer can be controlled by adjusting the duty ratio of the PWM wave, and the voltage output by the transformer is the stable voltage required by the voltage doubling circuit.
Description
Technical Field
The invention belongs to the technical field of photoelectricity, and particularly relates to a circuit for acquiring a Q-switched high-voltage pulse.
Background
The working principle of the Q-switched crystal is as follows: energy laser light generated by the semiconductor laser crystal is emitted to the Q-switched crystal and absorbed, and the energy laser light is collected in the Q-switched crystal. When a high-voltage pulse signal is loaded on the Q-switched crystal, the Q-switched crystal releases the gathered energy laser instantly under the excitation of the high-voltage pulse, so that a laser beam is formed and emitted, and when the high-voltage pulse is not excited, the laser is gathered in the Q-switched crystal and cannot be released. Therefore, Q-switching requires the acquisition of high voltage pulses.
Although the laser electro-optic Q-switching technology on the current market in China is mature day by day, the size, the weight and the cost are not satisfactory, and the design requirements, the thinking and the like are unchanged. The existing semiconductor laser power supply circuit generally has the problems that the output high-voltage pulse amplitude is easily influenced by the environmental temperature, the range of the required power supply voltage is narrow, the normal operation cannot be realized when the power supply is severe, and the like. In addition, the voltage value of the high-voltage pulse output by the conventional semiconductor laser power supply circuit is often too large, which is not favorable for circuit safety.
Disclosure of Invention
In order to solve the above problems, the present invention provides a circuit for obtaining a Q-switched high voltage pulse, which can effectively reduce the voltage carried by the circuit and ensure the safety of the circuit.
A circuit for obtaining Q-switched high-voltage pulse comprises a signal processing circuit 1, a high-voltage charging circuit 2, a voltage doubling circuit 3, a positive high-voltage pulse signal generating circuit 4 and a negative high-voltage pulse signal generating circuit 5;
the signal processing circuit 1 shapes and filters an externally input Q-switched signal, so as to obtain pulse driving signals provided for the positive high-voltage pulse signal generating circuit 4 and the negative high-voltage pulse signal generating circuit 5; the high-voltage charging circuit 2 controls the oscillation time of a transformer thereof by adjusting the duty ratio of the PWM wave, thereby providing stable voltage for the voltage doubling circuit 3; the voltage doubling circuit 3 amplifies the voltage by a set multiple and provides the amplified voltage to the positive high-voltage pulse signal generating circuit 4 and the negative high-voltage pulse signal generating circuit 5; the positive high-voltage pulse signal generating circuit 4 and the negative high-voltage pulse signal generating circuit 5 respectively generate positive and negative high-voltage pulses which are opposite to each other according to the voltage amplified by the set multiple under the driving of the pulse driving signal, and output the positive and negative high-voltage pulses.
Optionally, the signal processing circuit 1 includes a driving chip U3, MOS transistors U1, U2, diodes DZ1, DZ2, D1, capacitors C1 to C5, resistors R1, R3, R4, R5, R7, and coils L2, L6;
two input pins IN A and IN B of the U3 are respectively connected with a Q-switched signal, a power supply pin VCC is grounded through C5 after being connected with a set voltage, a ground pin GND is grounded, two output pins OUT A and OUT B respectively output signals with the amplitude of the set voltage and enter C3 for filtering and shaping, the signals which are subjected to filtering and shaping are connected to the grid of the U2, meanwhile, the grid of the U2 is grounded through R7, and the source is grounded; the drain of the U2 is connected to a general power supply through series-connected R4 and R3, the drain is also connected with one end of a C1, the other end of the C1 is connected with the anode of a D1 and then grounded, and the other end of the C1 is connected with L2 and L6 which are connected in parallel and then grounded; the current signals in L2 and L6 are pulse driving signals of the positive high-voltage pulse signal generating circuit 4 and the negative high-voltage pulse signal generating circuit 5; the base electrode of the U1 is grounded through the DZ1, the emitter electrode is connected with a set voltage, and the collector electrode is connected with the R3 in series and is connected with a general power supply; one end of R1 is connected with the grid of U1, and the other end is connected with the collector of U1; one end of the C2 is connected with the collector of the U1, and the other end is grounded; one end of R5 is connected with the collector of U1, and the other end is connected with a Q-switched signal; one end of the DZ2 and the C4 which are connected in parallel is grounded, and the other end is connected with a Q-switched signal.
Optionally, the signal processing circuit 1 further includes a general interface J1, and the general power supply and the Q-switched signal enter the signal processing circuit 1 through the general interface J1.
Optionally, the high-voltage charging circuit 2 includes a PWM voltage type control chip U4, resistors R11 to R14, capacitors C8, C9, C10, C14, C15, a MOS transistor U5, and a transformer T1;
one end of each of the C8 and the C9 is connected to a general power supply, and the other end of each of the C8 and the C9 is grounded; one end of the primary coil of the T1 is connected with a general power supply, and the other end is connected with the drain electrode of the U5; a PWM wave output pin VO of the U4 outputs a PWM wave which is connected with a grid electrode of the U5 after being limited by R11; the PWM wave controls the connection and disconnection of a grid electrode and a drain electrode of the U5 to enable a primary coil of the T1 to oscillate, and the induced voltage of a secondary coil of the T1 provides voltage for the voltage doubling circuit 3; one end of R14 is connected with the source of U5, and the other end is grounded; the primary coil of the T1 is fed back to the current sampling input pin ICS of the U4 via R13 by oscillating the current and voltage generated at R14; one end of the C14 is connected with a current sampling input pin ICS of the U4, and the other end of the C14 is grounded; the ground pin GND of U4 is grounded; the U4 power supply pin VI is connected with 15V and is grounded to C10; the two ends of R12 are connected to the reference voltage VREF and oscillation frequency input pin RT/CT of U4, and the oscillation frequency input pin RT/CT of U4 is connected to ground C15.
Optionally, the voltage doubling circuit 3 includes diodes D2 to D5, capacitors C6, C7, C11, and C12;
the D2-D5 are connected in series, and the anode of D5 and the C6 are respectively connected with two ends of the T1 secondary coil; the induced voltage of the secondary coil of T1 is charged to C6 through D5, the voltage at C6 is charged to C11 through D3, the voltage at C11 is charged to C7 through D4, and the voltage at C7 is charged to C12 through D2, so that the amplified high voltage HighV is obtained at the negative electrode of D2.
Optionally, the high-voltage charging circuit 2 further includes resistors R8, R9, Rt1, a resistor R10, and a capacitor C13;
the R8, the R9 and the Rt1 are mutually connected in series to divide the high voltage HighV obtained by the voltage doubling circuit 3, the divided voltage is filtered and limited by the C13 and the R10 which are mutually connected in parallel, and then the divided voltage is respectively connected to a comparison voltage input pin and a reference voltage feedback input pin of the U4.
Optionally, the positive high-voltage pulse generating circuit 4 includes a capacitor C16, MOS transistors Q1 to Q3, resistors R15 to R20, R24 to R27, coils L21 to L23, and diodes DZ3 to DZ 5;
the L21-L23 and the L2 of the signal processing circuit 1 are wound on the same magnetic ring together, wherein L2 is a primary coil, and L21-L23 are secondary coils; when a current signal is generated in L2, the secondary coils of L21-L23 induce corresponding current signals, the induced current signals flow through R24-R26 to generate voltage signals, and the voltage signals are shaped by R18-R20 and DZ 3-DZ 5 to drive the grid electrodes and the drain electrodes of Q1-Q3 to be conducted; the R15-R17 and the R27 are connected in series, one end of the series connection is connected with the high voltage HighV obtained by the voltage doubling circuit 3, and the other end of the series connection is grounded; the serial junction J2 of R27 and R17 is used to output a positive high voltage pulse.
Optionally, the negative high-voltage pulse generating circuit 5 includes a capacitor C17, MOS transistors Q4 to Q6, resistors R28 to R35, R39 to R41, coils L36 to L38, and diodes DZ6 to DZ 8;
the L36-L38 and the L6 of the signal processing circuit 1 are wound on the same magnetic ring together, wherein L6 is a primary coil, and L36-L38 are secondary coils; when a current signal is generated in L6, the secondary coils of L36-L38 induce corresponding current signals, the induced current flows through R39-R41 to generate voltage signals, and the voltage signals are shaped by R33-R35 and DZ 6-DZ 8 to drive the grid electrodes and the drain electrodes of Q4-Q6 to be conducted; the R29-R32 are connected in series, one end of the series connection is connected with the high voltage HighV obtained by the voltage doubling circuit 3, and the other end of the series connection is grounded; one end of the C17 is connected with the drain electrode of the Q4, and the other end of the C17 is used as the output end J3 of the negative high-voltage pulse.
Optionally, the general power supply is 20-48V.
Optionally, the set voltage is an operating voltage of the PWM voltage type control chip U4.
Has the advantages that:
1. according to the circuit for obtaining the Q-switched high-voltage pulse, the voltage of the high-voltage charging circuit is amplified by the voltage doubling circuit, and the externally input Q-switched signal is shaped and filtered by the signal processing circuit, so that a pulse driving signal is obtained to drive the positive and negative high-voltage pulse signal generating circuit to output the high-voltage pulse with opposite positive and negative according to the amplified voltage; compared with the traditional high-voltage pulse circuit, when the high-voltage pulse with the same size is obtained, the voltage value of the high-voltage pulse is only half of that of the traditional high-voltage pulse, the risk that the circuit is easily ignited due to overhigh voltage is effectively avoided, and the safety of the circuit is guaranteed;
meanwhile, the size of the induced voltage of the transformer of the high-voltage charging circuit is related to the oscillation time of the transformer, so that the oscillation time of the transformer can be controlled by adjusting the duty ratio of the PWM wave, and the voltage output by the transformer is the stable voltage required by the voltage doubling circuit.
2. According to the circuit for obtaining the Q-switched high-voltage pulse, the high voltage HighV can be indirectly obtained through the voltage division on the voltage input pin and the reference voltage feedback input pin of the PWM voltage type control chip U4; meanwhile, the PWM voltage type control chip U4 can determine the duty ratio of PWM waves jointly according to the current sampled by the current sampling input pin ICS and the size of the high-voltage HighV, so that the conduction time of the U5 is controlled, the oscillation of the T1 primary coil is controlled, a closed loop feedback is formed, and the stable high-voltage HighV output is finally obtained, so that the amplitude of the high-voltage pulse output by the circuit for obtaining the Q-switching high-voltage pulse is hardly influenced by the environment temperature, and the circuit can normally operate when a power supply is severe.
3. According to the circuit for obtaining the Q-switched high-voltage pulse, the externally input signal is a universal power supply and a Q-switched signal, the number of interfaces can be effectively reduced, the control is simple and convenient, and the logic redundancy of the circuit is appropriate.
Drawings
Fig. 1 is a schematic block diagram of a circuit for obtaining a Q-switched high voltage pulse according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a circuit for obtaining a Q-switched high voltage pulse according to an embodiment of the present disclosure.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
Example one
Referring to fig. 1, the schematic block diagram of a circuit for obtaining a Q-switched high voltage pulse according to an embodiment of the present application is shown.
A circuit for obtaining Q-switched high-voltage pulse comprises a signal processing circuit, a high-voltage charging circuit, a voltage doubling circuit, a positive high-voltage pulse signal generating circuit and a negative high-voltage pulse signal generating circuit;
the signal processing circuit carries out shaping and filtering on an externally input Q-switched signal so as to obtain pulse driving signals provided for the positive high-voltage pulse signal generating circuit and the negative high-voltage pulse signal generating circuit; the high-voltage charging circuit controls the oscillation time of a transformer of the high-voltage charging circuit by adjusting the duty ratio of a PWM wave, so that stable voltage is provided for the voltage doubling circuit; the voltage doubling circuit amplifies the voltage by a set multiple and provides the amplified voltage to the positive high-voltage pulse signal generating circuit and the negative high-voltage pulse signal generating circuit; the positive high-voltage pulse signal generating circuit and the negative high-voltage pulse signal generating circuit respectively generate positive and negative high-voltage pulses for output according to the voltage amplified by the set multiple under the driving of the pulse driving signal.
Optionally, the set multiple is four times.
It should be noted that, the circuit for obtaining the high-voltage pulse with the Q-switched function provided by the embodiment of the application compares with the traditional high-voltage pulse circuit, and when obtaining the high-voltage pulse with the same size, the voltage value of the high-voltage pulse of the application only needs to be half of the voltage value of the traditional high-voltage pulse, so that the risk that the circuit is easily ignited due to overhigh voltage is effectively avoided, and the safety of the circuit is guaranteed. Meanwhile, the magnitude of the induced voltage of the transformer of the high-voltage charging circuit is related to the oscillation time of the transformer, so that the oscillation time of the transformer T1 is controlled and controlled by adjusting the duty ratio of the PWM wave, and stable voltage can be provided for the voltage doubling circuit.
For example, the Q-switched crystal needs 6KV high voltage pulse, the traditional high voltage pulse circuit often provides 6KV high voltage pulse directly, and the voltage carried by the circuit is too high at this time, which easily causes problems of ignition, short circuit, etc.; the high-voltage pulse circuit provided by the embodiment of the application can meet the requirement of the Q-switched crystal 6KV high-voltage pulse only by outputting the positive high-voltage pulse plus 3KV and the negative high-voltage pulse minus 3 KV; therefore, the voltage borne by the circuit can be obviously reduced, and the safety of the circuit is guaranteed.
Example two
The existing semiconductor laser power supply circuit generally has the problems that the output high-voltage pulse amplitude is easily influenced by the environmental temperature, the range of the required power supply voltage is narrow, the normal operation cannot be realized when the power supply is severe, and the like. Therefore, the embodiment of the application provides a high-voltage pulse circuit which outputs a high-voltage pulse with an amplitude hardly affected by the ambient temperature and can normally operate even when the power supply is bad.
Referring to fig. 2, the schematic diagram of a circuit for obtaining a Q-switched high voltage pulse according to an embodiment of the present application is shown.
A circuit for obtaining Q-switched high-voltage pulse comprises a signal processing circuit 1, a high-voltage charging circuit 2, a voltage doubling circuit 3, a positive high-voltage pulse signal generating circuit 4 and a negative high-voltage pulse signal generating circuit 5;
the signal processing circuit 1 comprises a driving chip U3, MOS tubes U1 and U2, diodes DZ1, DZ2 and D1, filter capacitors C1, C2, C3, C4 and C5, current-limiting resistors R1, R3, R4, R5 and R7, and coils L2 and L6;
an input pin IN A and an input pin IN B of the U3 are respectively connected with a Q-switched signal, a power supply pin VCC is grounded through C5 after being connected with 15V, a ground pin GND is grounded, an output pin OUT A and an output pin OUT B respectively output signals with the amplitude of 15V and enter C3 for filtering and shaping, the signals which are subjected to filtering and shaping are connected to the grid of the U2, meanwhile, the grid of the U2 is grounded through R7, and the source is grounded; the drain of U2 is connected to 28V through series-connected R4, R3, the drain of U2 can produce 28V signal and is connected to one end of C1, another end of C1 is connected to the positive pole of D1 and then grounded, and is connected to L2 and L6 which are connected in parallel and then grounded, wherein, the interior of L2 and L6 can produce current, the current signal in L2 and L6 is the pulse driving signal of the positive high-voltage pulse signal generating circuit 4 and the negative high-voltage pulse signal generating circuit 5; the base of U1 is grounded through DZ1, the emitter is connected with 15V, and the collector is connected with R3 in series and is connected with 28V; one end of R1 is connected with the grid of U1, and the other end is connected with the collector of U1; one end of the C2 is connected with the collector of the U1, and the other end is grounded; one end of the R5 is connected with the collector of the U1, and the other end is connected with the Q-switched signal so as to increase the driving capability of the Q-switched signal; one end of the DZ2 and the C4 which are connected in parallel is grounded, and the other end of the DZ2 and the C4 which are connected in parallel is connected with a Q-switched signal; one end of the DZ2 and the C4 which are connected in parallel is grounded, and the other end of the DZ2 and the C4 are connected with a Q-switched signal so as to filter and shape the Q-switched signal.
It should be noted that the driving chip U3 may be a two-way power driver chip.
Optionally, the signal processing circuit 1 further comprises a general interface J1, and the 28V and Q-switched signals enter the signal processing circuit 1 through a general interface J1.
When the Q-switched signal is input to the signal processing circuit 1 through the universal interface J1, the ground line signal of the Q-switched signal is used as the Q-switched signal grounded—Signal, live wire of Q-switched signal as the Q-switched signal really input to the signal processing circuit 1+A signal. Alternatively, the Q-switched signal is a TTL level signal, and after being processed by the signal processing circuit 1, the Q-switched signal becomes a sharp pulse signal with a positive amplitude to drive the coils L2 and L6, so that currents are generated in the coils L2 and L6, wherein the currents can be used as pulse driving signals of the positive high-voltage pulse signal generating circuit 4 and the negative high-voltage pulse signal generating circuit 5.
The high-voltage charging circuit 2 comprises a PWM voltage type control chip U4, current-limiting resistors R11, R12, R13 and R14, filter capacitors C8, C9, C10, C14 and C15, an MOS tube U5 and a transformer T1;
one end of each of the C8 and the C9 is connected to 28V, and the other end of each of the C8 and the C9 is grounded, so that 28V is filtered; one end of the primary coil of T1 is connected to 28V, and the other end is connected to the drain of U5; a PWM wave output pin VO of the U4 outputs a PWM wave which is connected with a grid electrode of the U5 after being limited by R11; the PWM wave controls the connection and disconnection of a grid electrode and a drain electrode of the U5 to enable a primary coil of the T1 to oscillate, and the induced voltage of a secondary coil of the T1 provides voltage for the voltage doubling circuit 3; one end of R14 is connected with the source of U5, and the other end is grounded; the PWM wave controls the conduction time of the U5, the U5 controls the primary coil of the T1 to oscillate the current and the voltage generated in the R14, and the current and the voltage are fed back to a current sampling input pin ICS of the U4 through the R13, wherein the magnitude of the current sampled by the current sampling input pin ICS can be used as one of determination conditions of the magnitude of the duty ratio of the PWM wave; one end of the C14 is connected with a current sampling input pin ICS of the U4, and the other end of the C14 is grounded; the ground pin GND of U4 is grounded; the U4 power supply pin VI is connected with 15V and is grounded to C10; the two ends of the R12 are respectively connected with a reference voltage pin VREF and an oscillation frequency input pin RT/CT of the U4, the U4 oscillation frequency input pin RT/CT is grounded with the C15, and the capacitance value of the C15 and the resistance value of the R12 determine the frequency of the PWM wave output by the PWM wave output pin VO.
In the embodiment of the present application, the PWM voltage type control chip U4 is used as a main control device of the high-voltage charging circuit 2 to form a closed-loop oscillating circuit, and the magnitude of the induced voltage of the secondary winding of the transformer T1 is related to the oscillating time thereof, so that the on-time of the transformer T1 is controlled by adjusting the duty ratio of the PWM wave to control the on-time of the U5, and the oscillating time of the transformer T1 is controlled, and finally, the output of the high-voltage HighV can be stabilized.
The voltage doubling circuit 3 comprises unidirectional-conduction rectifier diodes D2, D3, D4 and D5, and energy storage capacitors C6, C7, C11 and C12;
the D2, the D3, the D4 and the D5 are connected in series, and the anode of the D5 and the C6 are respectively connected with two ends of the T1 secondary coil; the induced voltage of the secondary coil of T1 is charged to C6 through D5, the voltage at C6 is charged to C11 through D3, the voltage at C11 is charged to C7 through D4, and the voltage at C7 is charged to C12 through D2, so that the amplified high voltage HighV is obtained at the negative electrode of D2.
It should be noted that the charging process of the energy storage capacitors C6, C7, C11, and C12 is an amplification process of the induced voltage of the secondary coil of T1. Optionally, the high voltage HighV ranges from 2.2KV to 3 KV. In the present example, the high voltage HighV is four times the voltage at C16, twice the voltage at C11, and 1.75 times the voltage at C7.
Optionally, one connection mode of the voltage doubling circuit is as follows: the positive electrode of the D5 and the C6 are respectively connected with two ends of the T1 secondary coil, and the negative electrode of the D5 is connected with the other end of the C6; the D5, the D3, the D4 and the D2 are connected in series in sequence; c7 is connected in parallel at two ends of D3 and D4; c11 is connected in parallel at two ends of D5 and D3; c12 is connected in parallel with D4; d2 is used as the output of high voltage HighV.
The high-voltage charging circuit 2 further comprises resistors R8, R9 and Rt1, a resistor R10 and a capacitor C13;
the R8, R9, and Rt1 are connected in series to divide the high voltage HighV obtained by the voltage doubling circuit 3, and the divided voltage is filtered and limited by the C13 and R10 connected in parallel, and then respectively connected to the comparison voltage input pin VCOMP and the reference voltage feedback input pin VFD of the U4.
It should be noted that, in the embodiment of the present application, the magnitude of the high voltage HighV may be indirectly obtained through the voltage division on the voltage input pin VCOMP and the reference voltage feedback input pin VFD, and the U4 determines the magnitude of the duty ratio of the PWM wave according to the obtained magnitude of the high voltage HighV.
It should be noted that, U4 may also determine the duty ratio of the PWM wave together with the magnitude of the current sampled by the current sampling input pin ICS and the magnitude of the high voltage HighV indirectly through internal logic, so as to control the on-time of U5, further control the oscillation of the T1 primary coil, and finally obtain the stable high voltage HighV output. For example, if the HighV is low, the duty ratio of the PWM wave is increased to prolong the on-time of U5, so that the time for the T1 primary coil to oscillate is increased, and the HighV is increased and finally remains stable.
The positive high-voltage pulse generating circuit 4 comprises an energy storage capacitor C16, MOS transistors Q1-Q3, current limiting resistors R15, R16, R17, R18, R19, R20, R24, R25, R26, R27, coils L21, L22 and L23, rectifier diodes DZ3, DZ4 and DZ 5;
the L21-L23 and the L2 of the signal processing circuit 1 are wound on the same magnetic ring together, wherein L2 is a primary coil, and L21-L23 are secondary coils; when a current signal is generated in L2, the secondary coils of L21-L23 induce corresponding current signals, the induced current signals flow through R24-R26 to generate voltage signals, and the voltage signals are shaped by R18-R20 and DZ 3-DZ 5 to drive the grid electrodes and the drain electrodes of Q1-Q3 to be conducted; the R15-R17 and the R27 are connected in series, one end of the series connection is connected with the high voltage HighV obtained by the voltage doubling circuit 3, and the other end of the series connection is grounded; the serial junction J2 of R27 and R17 is used to output a positive high voltage pulse.
When there is no current signal in the secondary coils of L21, L22, and L23, the J2 output is low; when current signals are generated in secondary coils of L21, L22 and L23, Q1, Q2 and Q3 are immediately driven, a grid electrode and a drain electrode are all conducted, high voltage HighV is directly transmitted to J2, and positive high voltage pulse is immediately output; the width of the positive high voltage pulse depends on the current signal width in the secondary coils of L21, L22 and L23.
The negative high-voltage pulse generating circuit 5 comprises a coupling capacitor C17, MOS transistors Q4-Q6, current-limiting resistors R28, R29, R30, R31, R32, R33, R34, R35, R39, R40 and R41, coils L36, L37 and L38, rectifier diodes DZ6, DZ7 and DZ 8;
the L36-L38 and the L6 of the signal processing circuit 1 are wound on the same magnetic ring together, wherein L6 is a primary coil, and L36-L38 are secondary coils; when a current signal is generated in L6, the secondary coils of L36-L38 induce corresponding current signals, the induced current flows through R39-R41 to generate voltage signals, and the voltage signals are shaped by R33-R35 and DZ 6-DZ 8 to drive the grid electrodes and the drain electrodes of Q4-Q6 to be conducted; the R29-R32 are connected in series, one end of the series connection is connected with the high voltage HighV obtained by the voltage doubling circuit 3, and the other end of the series connection is grounded; one end of the C17 is connected with the drain electrode of the Q4, and the other end of the C17 is used as the output end J3 of the negative high-voltage pulse.
When there is no current signal in the secondary coils L36, L37, and L38, the J3 output is low; when current signals are generated in secondary coils of L36, L37 and L38, Q4, Q5 and Q6 are driven, a grid electrode and a drain electrode are all conducted, high voltage at one end of C17 is pulled down instantly, a corresponding high-voltage pulse is induced at the other end of C17, and a negative high-voltage pulse is output through J3; the width of the negative high-voltage pulse depends on the current signal width in the secondary coils of L36, L37 and L38.
It should be noted that the general power supply may be 20 to 48V, and the circuit for acquiring the Q-switched high-voltage pulse provided in the embodiment of the present application is also applicable to general power supplies under other values, and the embodiment of the present application is not described herein again.
It should be noted that, in order to ensure that U4 can operate stably, the set voltage is an operating voltage of the PWM voltage-type control chip U4. Except for the PWM voltage type control chip U4 with the working voltage of 15V adopted in the embodiment of the present application, other PWM voltage type control chips may also be adopted, which is not described in detail in the embodiment of the present application.
The embodiment of the application provides a circuit for obtaining Q-switched high-voltage pulse, positive high-voltage pulse generating circuit 4, negative high-voltage pulse generating circuit 5 can obtain stable positive, negative high-voltage pulse and output to the Q-switched crystal, so that the Q-switched crystal releases the energy laser of inside gathering under the excitation of high-voltage pulse, and a laser beam is formed and emitted.
It should be noted that the Q-switched crystal applied in the embodiment of the present application is a laser crystal made of lithium niobate or other chemical materials.
The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it will be understood by those skilled in the art that various changes and modifications may be made herein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (9)
1. A circuit for obtaining Q-switched high-voltage pulse is characterized by comprising a signal processing circuit (1), a high-voltage charging circuit (2), a voltage doubling circuit (3), a positive high-voltage pulse signal generating circuit (4) and a negative high-voltage pulse signal generating circuit (5);
the signal processing circuit (1) shapes and filters an externally input Q-switched signal so as to obtain pulse driving signals provided for the positive high-voltage pulse signal generating circuit (4) and the negative high-voltage pulse signal generating circuit (5); the high-voltage charging circuit (2) controls the oscillation time of a transformer of the high-voltage charging circuit by adjusting the duty ratio of a PWM wave, so that stable voltage is provided for the voltage doubling circuit (3); the voltage doubling circuit (3) amplifies the voltage by a set multiple and provides the amplified voltage to the positive high-voltage pulse signal generating circuit (4) and the negative high-voltage pulse signal generating circuit (5); the positive high-voltage pulse signal generating circuit (4) and the negative high-voltage pulse signal generating circuit (5) respectively generate high-voltage pulses with opposite positive and negative polarities according to the voltages amplified by the set times under the driving of the pulse driving signals and output the high-voltage pulses;
the signal processing circuit (1) comprises a driving chip U3, MOS tubes U1 and U2, diodes DZ1, DZ2 and D1, capacitors C1-C5, resistors R1, R3, R4, R5 and R7, and coils L2 and L6;
two input pins IN A and IN B of the U3 are respectively connected with a Q-switched signal, a power supply pin VCC is grounded through C5 after being connected with a set voltage, a ground pin GND is grounded, two output pins OUT A and OUT B respectively output signals with the amplitude of the set voltage and enter C3 for filtering and shaping, the signals which are subjected to filtering and shaping are connected to the grid of the U2, meanwhile, the grid of the U2 is grounded through R7, and the source is grounded; the drain of the U2 is connected to a general power supply through series-connected R4 and R3, the drain is also connected with one end of a C1, the other end of the C1 is connected with the anode of a D1 and then grounded, and the other end of the C1 is connected with L2 and L6 which are connected in parallel and then grounded; the current signals in L2 and L6 are pulse driving signals of a positive high-voltage pulse signal generating circuit (4) and a negative high-voltage pulse signal generating circuit (5); the base electrode of the U1 is grounded through the DZ1, the emitter electrode is connected with a set voltage, and the collector electrode is connected with the R3 in series and is connected with a general power supply; one end of R1 is connected with the grid of U1, and the other end is connected with the collector of U1; one end of the C2 is connected with the collector of the U1, and the other end is grounded; one end of R5 is connected with the collector of U1, and the other end is connected with a Q-switched signal; one end of the DZ2 and the C4 which are connected in parallel is grounded, and the other end is connected with a Q-switched signal.
2. The circuit for obtaining a high-voltage pulse with Q-switched according to claim 1, wherein the signal processing circuit (1) further comprises a general interface J1, and the general power supply and the Q-switched signal enter the signal processing circuit (1) through the general interface J1.
3. The circuit for obtaining the Q-switched high-voltage pulse as claimed in claim 1, wherein the high-voltage charging circuit (2) comprises a PWM voltage type control chip U4, resistors R11-R14, capacitors C8, C9, C10, C14 and C15, a MOS tube U5 and a transformer T1;
one end of each of the C8 and the C9 is connected to a general power supply, and the other end of each of the C8 and the C9 is grounded; one end of the primary coil of the T1 is connected with a general power supply, and the other end is connected with the drain electrode of the U5; a PWM wave output pin VO of the U4 outputs a PWM wave which is connected with a grid electrode of the U5 after being limited by R11; the PWM wave controls the connection and disconnection of a grid electrode and a drain electrode of the U5 to enable a primary coil of the T1 to oscillate, and the induced voltage of a secondary coil of the T1 provides voltage for the voltage doubling circuit (3); one end of R14 is connected with the source of U5, and the other end is grounded; the primary coil of the T1 is fed back to the current sampling input pin ICS of the U4 via R13 by oscillating the current and voltage generated at R14; one end of the C14 is connected with a current sampling input pin ICS of the U4, and the other end of the C14 is grounded; the ground pin GND of U4 is grounded; the U4 power supply pin VI is connected with 15V and is grounded to C10; the two ends of R12 are connected to the reference voltage VREF and oscillation frequency input pin RT/CT of U4, and the oscillation frequency input pin RT/CT of U4 is connected to ground C15.
4. The circuit for obtaining the Q-switched high-voltage pulse according to claim 3, wherein the voltage doubling circuit (3) comprises diodes D2-D5, capacitors C6, C7, C11 and C12;
the D2-D5 are connected in series, and the anode of D5 and the C6 are respectively connected with two ends of the T1 secondary coil; the induced voltage of the secondary coil of T1 is charged to C6 through D5, the voltage at C6 is charged to C11 through D3, the voltage at C11 is charged to C7 through D4, and the voltage at C7 is charged to C12 through D2, so that the amplified high voltage HighV is obtained at the negative electrode of D2.
5. The circuit for obtaining the Q-switched high-voltage pulse according to claim 4, wherein the high-voltage charging circuit (2) further comprises resistors R8, R9, Rt1, a resistor R10, a capacitor C13;
the R8, the R9 and the Rt1 are mutually connected in series to divide the high voltage HighV obtained by the voltage doubling circuit (3), the divided voltage is filtered and limited by the C13 and the R10 which are mutually connected in parallel, and then the divided voltage is respectively connected to a comparison voltage input pin and a reference voltage feedback input pin of the U4.
6. The circuit for obtaining the Q-switched high-voltage pulse as claimed in claim 4, wherein the positive high-voltage pulse generating circuit (4) comprises a capacitor C16, MOS transistors Q1-Q3, resistors R15-R20, R24-R27, coils L21-L23, diodes DZ 3-DZ 5;
the L21-L23 and the L2 of the signal processing circuit (1) are jointly wound on the same magnetic ring, wherein L2 is a primary coil, and L21-L23 are secondary coils; when a current signal is generated in L2, the secondary coils of L21-L23 induce corresponding current signals, the induced current signals flow through R24-R26 to generate voltage signals, and the voltage signals are shaped by R18-R20 and DZ 3-DZ 5 to drive the grid electrodes and the drain electrodes of Q1-Q3 to be conducted; the R15-R17 and the R27 are connected in series, one end of the series connection is connected with a high voltage HighV obtained by the voltage doubling circuit (3), and the other end of the series connection is grounded; the serial junction J2 of R27 and R17 is used to output a positive high voltage pulse.
7. The circuit for obtaining the Q-switched high-voltage pulse as claimed in claim 4, wherein the negative high-voltage pulse generating circuit (5) comprises a capacitor C17, MOS transistors Q4-Q6, resistors R28-R35, R39-R41, coils L36-L38, diodes DZ 6-DZ 8;
the L36-L38 and the L6 of the signal processing circuit (1) are jointly wound on the same magnetic ring, wherein L6 is a primary coil, and L36-L38 are secondary coils; when a current signal is generated in L6, the secondary coils of L36-L38 induce corresponding current signals, the induced current flows through R39-R41 to generate voltage signals, and the voltage signals are shaped by R33-R35 and DZ 6-DZ 8 to drive the grid electrodes and the drain electrodes of Q4-Q6 to be conducted; the R29-R32 are connected in series, one end of the series connection is connected with a high voltage HighV obtained by the voltage doubling circuit (3), and the other end of the series connection is grounded; one end of the C17 is connected with the drain electrode of the Q4, and the other end of the C17 is used as the output end J3 of the negative high-voltage pulse.
8. The circuit for obtaining the Q-switched high-voltage pulse as claimed in any one of claims 1 to 7, wherein the general power supply is 20-48V.
9. The circuit for obtaining Q-switched high voltage pulse as claimed in any of claims 1-7, wherein the set voltage is the operating voltage of the PWM voltage-type control chip U4.
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| CN109831186A (en) * | 2018-12-27 | 2019-05-31 | 西南技术物理研究所 | A kind of electric-optically Q-switched circuit of micro integrated low-power consumption |
| CN110233577B (en) * | 2019-07-02 | 2024-04-09 | 中国电子科技集团公司第四十三研究所 | Controllable high-voltage power pulse generation circuit and control method |
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| JP2002289950A (en) * | 2001-03-26 | 2002-10-04 | Nichicon Corp | Pulse laser power source |
| CN202621424U (en) * | 2012-01-18 | 2012-12-26 | 北京工业大学 | Portable high-voltage multiple-pulse ultrasonic transmitting device |
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| CN2456340Y (en) * | 2000-12-29 | 2001-10-24 | 中国科学院安徽光学精密机械研究所 | Voltage regulating power supply for laser regulating Q value |
| CN102629838A (en) * | 2012-01-18 | 2012-08-08 | 北京工业大学 | Portable high-voltage multiple-pulse ultrasonic wave transmitting device |
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