CN108234375B - Method and device for transmitting single carrier data - Google Patents

Method and device for transmitting single carrier data Download PDF

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CN108234375B
CN108234375B CN201611156147.5A CN201611156147A CN108234375B CN 108234375 B CN108234375 B CN 108234375B CN 201611156147 A CN201611156147 A CN 201611156147A CN 108234375 B CN108234375 B CN 108234375B
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data
dds
sine
offset adjustment
frequency offset
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CN108234375A (en
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何轲
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Leadcore Technology Co Ltd
Datang Semiconductor Design Co Ltd
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Leadcore Technology Co Ltd
Datang Semiconductor Design Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
    • H04L27/2627—Modulators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
    • H04L27/2627—Modulators
    • H04L27/2637—Modulators with direct modulation of individual subcarriers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0018—Arrangements at the transmitter end

Abstract

The invention relates to the field of communication, and discloses a method and a device for transmitting single carrier data. In the embodiment of the invention, first data to be transmitted is modulated to obtain single carrier data to be transmitted; adding a cyclic prefix with a preset length to the single carrier data to obtain second data; performing subcarrier mapping and frequency offset adjustment on the second data through a digital synthesizer DDS; and performing pulse shaping filtering on the data after the frequency offset adjustment, and transmitting the filtered data. According to the embodiment of the invention, the single carrier data added with the cyclic prefix with the preset length is subjected to subcarrier mapping and frequency offset adjustment through the DDS, so that the complexity and the calculated amount of the traditional method for completing subcarrier mapping and frequency offset adjustment by using IFFT and corresponding frequency offset adjustment are greatly reduced, the requirements and the power consumption of a chip for realizing the calculation are reduced, and the power consumption of the terminal equipment is further reduced.

Description

Method and device for transmitting single carrier data
Technical Field
The present invention relates to the field of communications, and in particular, to a method and an apparatus for transmitting single carrier data.
Background
NB-IoT (Narrow Band Internet of Things) is a latest Narrow-Band Internet of Things protocol specifically for the Internet of Things, which is newly proposed by 3GPP (3rd generation Partnership Project) organization, and is based on a mature LTE (Long Term Evolution) system, and based on the communication characteristics of the Internet of Things, the protocol layer and the physical layer are greatly tailored in terms of functions and performance, so that the NB-IoT terminal can better achieve the goals of wide coverage, low power consumption, low cost, large connection, and the like.
According to the 3GPP protocol, NB-IoT uplink has two format definitions, one is a single carrier format including two cases of subcarrier spacing of 3.75kHz and 15kHz, and the other is a multi-carrier format including subcarrier spacing of 15kHz, where the number of configurable subcarriers is 1, 3, 6, 12, etc., respectively, while NB-IoT downlink has only one format, i.e., a case of subcarrier spacing of 15 kHz. The NB-IoT system bandwidth is 180kHz, and for the case of subcarrier spacing of 3.75kHz, there may be 48 subcarrier configurations according to resource scheduling and configuration, and for the case of subcarrier spacing of 15kHz, there may be 12 subcarrier configurations according to resource scheduling and configuration, and subcarrier spacing and corresponding cyclic prefix length for both cases of 3.75kHz and 15kHz, as shown in expression 1, where, when the subcarrier spacing is 3.75kHz, the length of one slot is 61440Ts, i.e. 2ms, and when the subcarrier spacing is 15kHz, the length of one slot is 15360Ts, i.e. 0.5ms, and the slot structure of single carrier data is shown in fig. 1.
Figure BDA0001180729250000021
TABLE 1
In a hardware implementation process, in order to reduce the computational complexity and reduce power consumption, for different bandwidths and sampling frequencies, FFT (Fast Fourier transform) with different points are used for computation. According to the protocol parameters of the NB-IoT, the system can adopt 1.92MHz sampling frequency and 128-point FFT to calculate, namely, 16 times of point reduction processing is carried out on the number of FFT points. When the subcarrier spacing is 3.75kHz, the length of the cyclic prefix is 4 according to table 1, and when the subcarrier spacing is 15kHz, the length of the cyclic prefix is 10 (corresponding to the first slot symbol) and 9 (corresponding to the second to seventh slot symbols), respectively. Since the number of cyclic prefixes is still integer, the length of an OFDM (Orthogonal Frequency Division Multiplexing) symbol can be guaranteed to meet the symbol length and the frame length defined by the NB-IoT protocol by using the sampling Frequency, the transmission process by using the conventional method is shown in fig. 2, and the reception process is shown in fig. 3. For the transmitter, after being modulated and mapped, channel data to be transmitted is converted to a time domain through IFFT (inverse fast Fourier transform), because a single carrier form in an NB-IoT protocol only uses 1 subcarrier to perform data transmission, only 1 actually transmitted data among 128 data subjected to IFFT conversion and the remaining 127 are zero, the position of the actually transmitted data refers to table 1 and can be configured by the system, then according to table 1, cyclic prefixes with corresponding lengths are added for different subcarrier intervals of 3.75kHz and 15kHz to form a time slot, and then, 1/2 subcarrier frequency offset adjustment and pulse shaping filtering processing are performed on the generated data in the single carrier format, so that transmission can be performed. For a receiver, it is necessary to search a frame header and perform timing adjustment according to received data, remove a cyclic prefix according to a protocol, perform 128-point FFT on the data, and select 1 data from the transformed data to obtain transmitted channel data.
However, in the process of implementing the present invention, the inventors of the present application find that, in the transmission processing of the above-mentioned conventional method, in order to implement subcarrier mapping, IFFT operation needs to be performed, a large amount of invalid data is added for occupation, which brings huge computational complexity to the transmitter of the terminal, increases the computational complexity of the terminal and the requirements of the chip for implementing the above operation, thereby increasing the cost and power consumption of the terminal.
Disclosure of Invention
The invention aims to provide a method and a device for transmitting single carrier data, which finish subcarrier mapping and frequency offset adjustment processing through a DDS (direct digital synthesizer), thereby replacing the calculation of an IFFT (inverse fast Fourier transform) and a corresponding frequency offset adjustment module in the traditional method, greatly reducing the calculation complexity and the calculation amount when terminal equipment transmits the single carrier data, reducing the requirements and the power consumption of a chip for realizing the calculation, and further reducing the cost and the power consumption of the terminal equipment.
In order to solve the above technical problem, an embodiment of the present invention provides a method for transmitting single carrier data, including:
modulating first data to be transmitted to obtain single carrier data to be transmitted;
adding a cyclic prefix with a preset length to the single carrier data to obtain second data;
performing subcarrier mapping and frequency offset adjustment on the second data through a digital synthesizer DDS;
and performing pulse shaping filtering on the data after the frequency offset adjustment, and transmitting the filtered data.
The embodiment of the invention also provides a single carrier data transmitting device, which comprises:
the modulation mapper is used for modulating first data to be transmitted to obtain single carrier data to be transmitted;
a cyclic prefix adder for adding a cyclic prefix of a preset length to the single carrier data to obtain second data;
a digital synthesizer DDS for performing subcarrier mapping and frequency offset adjustment on the second data;
the pulse shaping filter is used for carrying out pulse shaping filtering on the data after the frequency offset adjustment;
and a transmitter for transmitting the filtered data.
Compared with the prior art, the embodiment of the invention modulates the first data to be transmitted to obtain the single carrier data to be transmitted, thereby generating the single carrier frequency domain data to be transmitted according to the general process of transmitting data by the terminal; adding a cyclic prefix with a preset length to the single-carrier data to obtain second data, so as to generate single-carrier frequency domain data with the length according with the protocol; through a digital synthesizer DDS, subcarrier mapping and frequency offset adjustment are carried out on the second data, pulse forming filtering is carried out on the data after the frequency offset adjustment, and the filtered data are transmitted, so that single carrier data are transmitted, subcarrier mapping and frequency offset adjustment are carried out on single carrier data added with a cyclic prefix with a preset length through the DDS, not only is the calculation complexity and the calculation amount greatly reduced when the single carrier data are transmitted by terminal equipment, but also the requirement and the power consumption of a chip for realizing the calculation are reduced, and further the power consumption of the terminal equipment is reduced.
In addition, the performing, according to the digital synthesizer DDS, subcarrier mapping and frequency offset adjustment on the second data specifically includes: the DDS generates sine signals and cosine signals with required frequency; and performing complex multiplication on the sine signal and the cosine signal and the second data respectively to obtain data after subcarrier mapping and frequency offset adjustment. The data after subcarrier mapping and frequency offset adjustment can be obtained by multiplying the sine signal and the cosine signal of the required frequency with the simple complex number of the second data respectively, thereby greatly reducing the complexity and the calculated amount for completing subcarrier mapping and frequency offset adjustment by using IFFT and a corresponding frequency offset adjustment module in the traditional method.
In addition, theThe DDS generates a sine signal and a cosine signal of a desired frequency, and specifically includes: according to fDDS(k +1/2) Δ f, calculating the desired frequency fDDSWherein, Δ f is the subcarrier interval, and k is the subcarrier mapping position; according to fDDSCalculating a target phase increment of the DDS
Figure BDA0001180729250000041
According to the above
Figure BDA0001180729250000042
And searching a preset sine and cosine lookup table to obtain the sine signal and the cosine signal. The sine signal and the cosine signal are obtained by searching the sine and cosine lookup table, the method is simple and easy to implement, and the calculation complexity is further reduced.
In addition, said according to said fDDSCalculating a target phase increment of the DDS
Figure BDA0001180729250000051
The method specifically comprises the following steps: according to
Figure BDA0001180729250000052
Calculating the number N of bits of the phase accumulator of the DDS, wherein delta is the resolution of the DDS, fclkThe working frequency of the DDS is shown, and N is a positive integer; according to fDDSThe above-mentioned fclkCalculating an initial phase increment, Δ θ, of the DDS with the N, wherein,
Figure BDA0001180729250000053
accumulating the delta theta of a preset time L according to the phase accumulator to obtain the delta theta
Figure BDA0001180729250000054
Wherein L is a positive integer such that
Figure BDA0001180729250000055
The calculation process is simple and easy to realize.
Drawings
Fig. 1 is a schematic diagram of a timeslot structure of single carrier data in the prior art;
FIG. 2 is a diagram illustrating a prior art transmission process for single carrier data;
FIG. 3 is a diagram illustrating a prior art single carrier data receiving process;
fig. 4 is a flowchart of a single carrier data transmission method according to a first embodiment of the present invention;
fig. 5 is a flowchart of a single carrier data transmission method according to a second embodiment of the present invention;
fig. 6 is a schematic structural diagram of a single carrier data transmitting apparatus according to a third embodiment of the present invention;
fig. 7 is a schematic structural diagram of a single carrier data transmitting apparatus according to a fourth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
The first embodiment of the present invention relates to a method for transmitting single carrier data. The specific flow is shown in fig. 4.
In step 401, modulation is performed.
Specifically, the first data to be transmitted is modulated to obtain single carrier data to be transmitted, which is the same as the prior art and is not described herein again.
In step 402, a cyclic prefix is added.
Specifically, a cyclic prefix with a preset length is added to single carrier data to be transmitted to obtain second data, where the length of the cyclic prefix is associated with the type of the adopted subcarrier spacing, specifically referring to table 1, when the frequency of the baseband is 1.92MHz and the subcarrier spacing is 3.75KHz, the corresponding cyclic prefix length is 4, and when the frequency of the baseband is 1.92MHz and the subcarrier spacing is 15KHz, the corresponding cyclic prefix lengths are 10 (corresponding to the first slot symbol) and 9 (corresponding to the second to seventh slot symbols), respectively. Further, since the mapping of the single carrier data is performed in the frequency domain, the mapped data is still the frequency domain data, and therefore the cyclic prefix is the single carrier frequency domain data added to the data to be transmitted in the frequency domain.
In step 403, the desired frequency f is calculatedDDS。
Specifically, the IFFT calculation process in the conventional method for transmitting single carrier data is as shown in formula (1), when performing an IFFT operation with M being 128 points, since there is only one valid data (the data at this point is set to x (k)), and the other 127 points are zero, then formula (1) can be simplified to formula (2), where the essence of formula (2) is to transform the IFFT operation into a complex multiplication of data with a sine signal and a cosine signal, that is, to perform a frequency offset operation on the data, and formula (1) and formula (2) are respectively as follows:
Figure BDA0001180729250000061
Figure BDA0001180729250000071
according to the formula (2) and the protocol requirement, the frequencies of the sine signal and the cosine signal are at least integer times of 3.75KHz and 1/2 subcarrier offset, so that DDS and f can be passedDDS(k +1/2) Δ f, calculate the desired frequency fDDSAnd further generating a sine signal and a cosine signal of the required frequency, where Δ f is a subcarrier interval, k is a subcarrier frequency domain position, and a specific value of k is configured by the system according to table 1, and when a subcarrier interval of 3.75KHz is adopted, that is, Δ f is 3.75KHz, the value of k may be-24, -23, 22,23, that is, there are 48 subcarrier configuration situations, that is, there are 48 required frequencies to be generated in total, and when a subcarrier interval of 15KHz is adopted, that is, Δ f is 15KHz, the value of k may be-64,5, i.e. there are 12 subcarrier configurations, i.e. there are 12 required frequencies to generate.
In step 404, the number of bits of the phase accumulator is calculated.
In particular, according to
Figure BDA0001180729250000072
Calculating the number N of bits of the phase accumulator of the DDS, where Δ is the resolution of the DDS, fclkIs the operating frequency of DDS, N is a positive integer, let fclkThe number of bits N required for the phase accumulator is 16 at 100 MHz.
In step 405, an initial phase increment Δ θ is calculated.
In particular, according to fDDS、fclkAnd N, calculating an initial phase increment, delta theta, of the DDS, wherein,
Figure BDA0001180729250000073
according to different values of k, fDDSDifferent values can be obtained, so that the delta theta can also be obtained, the delta theta calculated each time is stored in the register in sequence, and the delta theta can be directly called subsequently, so that the calculation amount is further reduced.
Furthermore, according to the configuration of the parameter k and the requirements of the protocol in table 1, there are several required frequencies that need to be generated, and thus each required frequency necessarily has a corresponding initial phase increment Δ θ, and during implementation, the calculated Δ θ can be stored, and then according to the configuration of the parameter k, the stored Δ θ can be directly called, and repeated calculation is not needed again, thereby further reducing the calculation amount.
In step 406, a target phase increment is calculated
Figure BDA0001180729250000081
Specifically, the target phase increment is obtained by accumulating delta theta of a preset time L through a phase accumulator
Figure BDA0001180729250000082
Wherein, L is a positive integer,
Figure BDA0001180729250000083
the calculation process is simple and easy to realize.
In step 407, obtain
Figure BDA0001180729250000084
The high order significant bit of (a).
In particular, according to
Figure BDA0001180729250000085
In practical application, when the number of bits N is 16, 8 bits, 5 bits, 10 bits or other required bits may be sequentially taken out as the upper significant bits from the leftmost, and when the number of bits N is 32, 16 bits, 10 bits, 20 bits or other required bits may be sequentially taken out as the upper significant bits from the leftmost.
In step 408, a sine signal and a cosine signal are acquired.
Specifically, a preset sine and cosine lookup table is searched according to the high-order significant bits to obtain corresponding sine signals and cosine signals, wherein the sine signals and the cosine signals are
Figure BDA0001180729250000086
n is the number of sampling points, the required sine or cosine depth is 16 bits for a complete waveform, and the storage only needs to store the quarter wavelength in consideration of the symmetry of sine and cosine waveforms, namely the stored address depth is 14 bits. The sine signal and the cosine signal are obtained by searching the sine and cosine lookup table, the method is simple and easy to implement, and the calculation complexity is further reduced.
In step 409, a complex multiplication is performed.
Specifically, complex multiplication is respectively carried out on a sine signal and a cosine signal and second data to realize subcarrier mapping and frequency offset adjustment of the second data, complex multiplication is respectively carried out on a real part and an imaginary part of the sine signal, the cosine signal and the second data, and data after subcarrier mapping and frequency offset adjustment can be obtained through simple complex multiplication of the sine signal and the cosine signal with required frequencies and the second data, so that the complexity and the calculation amount of the traditional method for completing subcarrier mapping and frequency offset adjustment by using an IFFT and a corresponding frequency offset adjustment module are greatly reduced.
In step 410, pulse shaping filtering is performed.
Specifically, pulse shaping filtering is performed on the data after the frequency offset adjustment, so as to avoid aliasing of signals, which is the same as that in the prior art and is not described herein again.
In step 411, the pulse-shaping filtered data is transmitted.
Specifically, the data after the pulse shaping filtering is transmitted through the transmitting antenna of the terminal device, and this step is the same as the prior art and is not described herein again.
It should be noted that the receiving end of the base station can still adopt the traditional method to perform receiving and demodulation, and does not need to make any adjustment or change, so that the terminal computing complexity is reduced, and meanwhile, better applicability and compatibility can be ensured, and the method has great practical application value. Further, taking M-128-point IFFT as an example, the complexity of transmitting single carrier data by using the conventional method in which complex multiplication is performed for 128-point IFFT operation and the complexity of using the technique in the embodiment of the present invention are briefly analyzed
Figure BDA0001180729250000095
The complex addition is N × log2N times 896 times, and the complex multiplication for 1/2 subcarrier frequency offset operation is 128 times, that is, 576 complex multiplications and 896 complex additions are required in total, and only 128 complex multiplications are required in the embodiment of the present invention.
Compared with the prior art, in the embodiment, f is firstly determinedDDSCalculating the required frequency f (k +1/2) Δ fDDSThen according to
Figure BDA0001180729250000091
Calculating the number N of bits of the DDS phase accumulator, then according to fDDS、fclkAnd N, calculating the initial DDSThe phase increment delta theta is accumulated for the preset times L to obtain the target phase increment
Figure BDA0001180729250000092
So that
Figure BDA0001180729250000093
Has simple calculation process and easy realization, and is obtained from
Figure BDA0001180729250000094
The method is simple and easy to implement, further reduces the calculation complexity, finally performs complex multiplication on the sine signal and the cosine signal respectively with second data to obtain data after frequency adjustment, and obtains data after subcarrier mapping and frequency offset adjustment through simple complex multiplication operation of the sine signal and the cosine signal with required frequency respectively with the second data, thereby greatly reducing the complexity and the calculation amount of completing subcarrier mapping and frequency offset adjustment by using IFFT and a corresponding frequency offset adjustment module in the traditional method.
The second embodiment of the present invention relates to a method for transmitting single carrier data. The second embodiment is further improved on the basis of the first embodiment, and the main improvement is that: in the second embodiment of the present invention, amplitude attenuation is performed on the data after frequency offset adjustment, so that the data after frequency offset adjustment meets the requirement of pulse shaping filtering, and further the data symbol transmission requirement is met, and the specific flow is shown in fig. 5.
In step 501, modulation is performed.
In step 502, a cyclic prefix is added.
In step 503, the desired frequency f is calculatedDDS。
In step 504, the number of bits of the phase accumulator is calculated.
In step 505, an initial phase increment Δ θ is calculated.
In step 506, a target phase increment is calculated
Figure BDA0001180729250000102
In step 507, obtain
Figure BDA0001180729250000101
The high order significant bit of (a).
In step 508, a sine signal and a cosine signal are acquired.
In step 509, complex multiplication is performed.
In step 510, amplitude attenuation is performed.
Specifically, amplitude attenuation is performed on the data after frequency offset adjustment, so that amplitude attenuation in the IFFT process is generated, that is, the amplitude of the data after frequency offset adjustment is consistent with the amplitude of the data after IFFT in the conventional method, and the data meets the transmission requirement.
In step 511, pulse shaping filtering is performed.
Specifically, the amplitude attenuated data is pulse-shaped filtered.
In step 512, the pulse-shaping filtered data is transmitted.
In this embodiment, amplitude attenuation is performed on the data after frequency offset adjustment, so that the data after frequency offset adjustment meets the requirement of pulse shaping filtering, and further, the data symbol emission requirement is met.
The steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, so long as the steps contain the same logical relationship, which is within the protection scope of the present patent; it is within the scope of the patent to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
A third embodiment of the present invention relates to a single carrier data transmission apparatus, as shown in fig. 6, including: a modulation mapper 61, a cyclic prefix adder 62, a digital synthesizer 63, a pulse shaping filter 64, and a transmitter 65, wherein the digital synthesizer 63 specifically includes: the sine and cosine signal generator 631 and the complex multiplier 632, wherein the sine and cosine signal generator 631 specifically includes: the frequency calculator 6311, the target phase increment calculator 6312, and the first finder 6313, where the target phase increment calculator 6312 specifically includes: the bit calculator 63121, the initial phase increment calculator 63122, and the accumulator 63123, wherein the first finder 6313 specifically includes: a high significance interceptor 63131 and a second finder 63132.
The modulator 61 is configured to modulate first data to be transmitted to obtain single carrier data to be transmitted.
And a cyclic prefix adder 62, configured to add a cyclic prefix with a preset length to the single-carrier data to obtain second data.
And a digital synthesizer 63, configured to perform subcarrier mapping and frequency offset adjustment on the second data.
A sine and cosine signal generator 631 for generating a sine signal and a cosine signal of a desired frequency.
A frequency calculator 6311 for calculating the frequency according to fDDS(k +1/2) Δ f, calculate the desired frequency fDDSWhere Δ f is the subcarrier spacing and k is the subcarrier mapping position.
A target phase increment calculator 6312 for calculating the target phase increment according to fDDSCalculating a target phase increment of the DDS
Figure BDA0001180729250000111
A bit number calculator 63121 for calculating a bit number based on
Figure BDA0001180729250000112
Calculating the number N of bits of the phase accumulator of the DDS, where Δ is the resolution of the DDS, fclkIs the working frequency of the DDS, and N is a positive integer.
An initial phase increment calculator 63122 for calculating the initial phase increment according to fDDS、fclkAnd N, calculating an initial phase increment, delta theta, of the DDS, wherein,
Figure BDA0001180729250000121
an accumulator 63123 for accumulating Δ θ of the preset times L to obtain
Figure BDA0001180729250000122
Wherein L is a positive integer.
A first finder 6313 for determining
Figure BDA0001180729250000123
And searching a preset sine and cosine lookup table to obtain a sine signal and a cosine signal.
A high order significant bit interceptor 63131 for
Figure BDA0001180729250000124
The bits of (2) are taken out in sequence from the leftmost as high-order significant bits.
The second finder 63132 is configured to find a preset sine and cosine lookup table according to the high-order significant bits to obtain a sine signal and a cosine signal.
A complex multiplier 632, configured to perform complex multiplication on the sine signal and the cosine signal respectively with the second data of the cyclic prefix adder 62, so as to obtain data after subcarrier mapping and frequency adjustment.
And the pulse shaping filter 64 is used for performing pulse shaping filtering on the data subjected to the subcarrier mapping and the frequency offset adjustment.
A transmitter 65 for transmitting the filtered data.
It should be understood that this embodiment is a system example corresponding to the first embodiment, and may be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the first embodiment.
It should be noted that each module referred to in this embodiment is a logical module, and in practical applications, one logical unit may be one physical unit, may be a part of one physical unit, and may be implemented by a combination of multiple physical units. In addition, in order to highlight the innovative part of the present invention, elements that are not so closely related to solving the technical problems proposed by the present invention are not introduced in the present embodiment, but this does not indicate that other elements are not present in the present embodiment.
A fourth embodiment of the present invention relates to a single carrier data transmission device. The fourth embodiment is further improved on the basis of the third embodiment, and the main improvement lies in that: in the fourth embodiment of the present invention, an amplitude attenuator 66 is further included, as shown in fig. 7.
The modulator 61 is configured to modulate first data to be transmitted to obtain single carrier data to be transmitted.
And a cyclic prefix adder 62, configured to add a cyclic prefix with a preset length to the single-carrier data to obtain second data.
And a digital synthesizer 63, configured to perform subcarrier mapping and frequency offset adjustment on the second data.
A sine and cosine signal generator 631 for generating a sine signal and a cosine signal of a desired frequency.
A frequency calculator 6311 for calculating the frequency according to fDDS(k +1/2) Δ f, calculate the desired frequency fDDSWhere Δ f is the subcarrier spacing and k is the subcarrier mapping position.
A target phase increment calculator 6312 for calculating the target phase increment according to fDDSCalculating a target phase increment of the DDS
Figure BDA0001180729250000133
A bit number calculator 63121 for calculating a bit number based on
Figure BDA0001180729250000131
Calculating the number N of bits of the phase accumulator of the DDS, where Δ is the resolution of the DDS, fclkIs the working frequency of the DDS, and N is a positive integer.
An initial phase increment calculator 63122 for calculating the initial phase increment according to fDDS、fclkAnd N, calculating the initial DDSThe phase increment, delta theta, where,
Figure BDA0001180729250000132
an accumulator 63123 for accumulating Δ θ of the preset times L to obtain
Figure BDA0001180729250000135
Wherein L is a positive integer.
A first finder 6313 for determining
Figure BDA0001180729250000134
And searching a preset sine and cosine lookup table to obtain a sine signal and a cosine signal.
A high order significant bit interceptor 63131 for
Figure BDA0001180729250000136
The bits of (2) are taken out in sequence from the leftmost as high-order significant bits.
The second finder 63132 is configured to find a preset sine and cosine lookup table according to the high-order significant bits to obtain a sine signal and a cosine signal.
A complex multiplier 632, configured to perform complex multiplication on the sine signal and the cosine signal respectively with the second data of the cyclic prefix adder 62, so as to obtain data after subcarrier mapping and frequency adjustment.
And the amplitude attenuator 66 is used for performing amplitude attenuation on the data subjected to the subcarrier mapping and the frequency offset adjustment.
The pulse shaping filter 64 performs pulse shaping filtering on the amplitude-attenuated data (i.e., the data after the frequency offset adjustment).
A transmitter 65 for transmitting the filtered data.
Since the second embodiment corresponds to the present embodiment, the present embodiment can be implemented in cooperation with the second embodiment. The related technical details mentioned in the second embodiment are still valid in this embodiment, and the technical effects that can be achieved in the second embodiment can also be achieved in this embodiment, and are not described herein again in order to reduce the repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the second embodiment.
Those skilled in the art can understand that all or part of the steps in the method of the foregoing embodiments may be implemented by a program to instruct related hardware, where the program is stored in a storage medium and includes several instructions to enable a device (which may be a single chip, a chip, etc.) or a processor (processor) to execute all or part of the steps of the method described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in practice.

Claims (6)

1. A single carrier data transmitting method is applied to terminal equipment based on a narrowband Internet of things protocol, and comprises the following steps:
modulating first data to be transmitted to obtain single carrier data to be transmitted;
adding a cyclic prefix with a preset length to the single carrier data to obtain second data;
performing subcarrier mapping and frequency offset adjustment on the second data through a digital synthesizer DDS; the method specifically comprises the following steps:
according to fDDS(k +1/2) Δ f, calculate the desired frequency fDDSWherein, Δ f is the subcarrier interval, and k is the subcarrier mapping position;
according to
Figure FDA0002520092360000011
Calculating the number N of bits of a phase accumulator of the DDS, wherein delta is the resolution of the DDS, fclkIs the operating frequency of the DDS and,n is a positive integer;
according to fDDSThe above-mentioned fclkCalculating an initial phase increment, delta theta, of the DDS, with said N, wherein,
Figure FDA0002520092360000012
accumulating the delta theta of preset times L through the phase accumulator to obtain the target phase increment of the DDS
Figure FDA0002520092360000013
Wherein L is a positive integer;
according to the above
Figure FDA0002520092360000014
Searching a preset sine and cosine lookup table to obtain a sine signal and a cosine signal;
the sine signal and the cosine signal are respectively multiplied by the second data in a complex number mode to obtain corresponding data after subcarrier mapping and frequency offset adjustment;
and performing pulse shaping filtering on the data after the frequency offset adjustment, and transmitting the filtered data.
2. The method of claim 1, wherein the transmitting is based on the data on a single carrier
Figure FDA0002520092360000015
Searching a preset sine and cosine lookup table to obtain the sine signal and the cosine signal, specifically comprising:
according to the above
Figure FDA0002520092360000021
The bits of (1) are taken out from the leftmost side in sequence to be used as high-order effective bits;
and searching a preset sine and cosine lookup table according to the high-order effective bit to obtain the sine signal and the cosine signal.
3. The method of claim 1, wherein after the complex multiplication of the sine signal and the cosine signal with the second data is performed to obtain data after subcarrier mapping and frequency offset adjustment, the method further comprises:
carrying out amplitude attenuation on the data after the frequency offset adjustment;
the pulse shaping filtering is performed on the data after the frequency offset adjustment, and specifically includes: and performing pulse shaping filtering on the data after amplitude attenuation.
4. The method of claim 1, wherein said f is determined according to said fDDSThe above-mentioned fclkAfter calculating the initial phase increment Δ θ of the DDS, the method further includes: storing the delta theta.
5. The utility model provides a transmitting device of single carrier data which characterized in that, is applied to the terminal equipment based on narrowband thing networking protocol, includes:
the modulation mapper is used for modulating first data to be transmitted to obtain single carrier data to be transmitted;
a cyclic prefix adder for adding a cyclic prefix of a preset length to the single carrier data to obtain second data;
a digital synthesizer DDS for performing subcarrier mapping and frequency offset adjustment on the second data;
the digital synthesizer DDS specifically includes: a sine and cosine signal generator and a complex multiplier; the sine and cosine signal generator is used for generating sine signals and cosine signals with required frequencies; the complex multiplier is used for respectively carrying out complex multiplication on the sine signal and the cosine signal and the second data to obtain data after subcarrier mapping and frequency offset adjustment;
the sine and cosine signal generator specifically comprises: the device comprises a frequency calculator, a target phase increment calculator and a first finder; the frequency calculator is used for calculating the frequency according to fDDS＝(k+1/2) Δ f, calculating the desired frequency fDDSWherein, Δ f is the subcarrier interval, and k is the subcarrier mapping position; a target phase increment calculator for calculating a target phase increment according to the fDDSCalculating a target phase increment of the DDS
Figure FDA0002520092360000031
A first finder for finding out a first search result based on the first search result
Figure FDA0002520092360000032
Searching a preset sine and cosine lookup table to obtain the sine signal and the cosine signal;
the target phase increment calculator specifically includes: a digit calculator, an initial phase increment calculator and an accumulator; the bit counter is used for counting according to
Figure FDA0002520092360000033
Calculating the number N of bits of the phase accumulator of the DDS, wherein delta is the resolution of the DDS, fclkThe working frequency of the DDS is shown, and N is a positive integer; the initial phase increment calculator is used for calculating the initial phase increment according to the fDDSThe above-mentioned fclkCalculating an initial phase increment, Δ θ, of the DDS with the N, wherein,
Figure FDA0002520092360000034
the accumulator is used for accumulating the delta theta of preset times L to obtain the delta theta
Figure FDA0002520092360000035
Wherein L is a positive integer;
the pulse shaping filter is used for carrying out pulse shaping filtering on the data after the frequency offset adjustment;
and a transmitter for transmitting the filtered data.
6. The apparatus for transmitting single-carrier data according to claim 5, wherein the first searcher specifically includes: the high-order effective bit interceptor and the second finder;
a high-order significant bit interceptor for based on
Figure FDA0002520092360000036
The bits of (1) are taken out from the leftmost side in sequence to be used as high-order effective bits;
and the second finder is used for finding a preset sine and cosine lookup table according to the high-order effective bit to obtain the sine signal and the cosine signal.
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CN103685128A (en) * 2013-12-27 2014-03-26 湖北民族学院科技学院 Orthogonal Frequency Division Multiplexing (OFDM) transmitter based Inverse Fast Fourier Transform (IFFT) processor and IFFT implementation method

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CN1781271A (en) * 2003-02-28 2006-05-31 Rgb网络有限公司 Cost-effective multi-channel quadrature amplitude modulation
CN1838539A (en) * 2006-04-24 2006-09-27 南京东大宽带通信技术有限公司 Application method for frequency synthesizer in OFDM system
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