CN108228440A - The detection method and device of CPU program pointers - Google Patents
The detection method and device of CPU program pointers Download PDFInfo
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- CN108228440A CN108228440A CN201611147998.3A CN201611147998A CN108228440A CN 108228440 A CN108228440 A CN 108228440A CN 201611147998 A CN201611147998 A CN 201611147998A CN 108228440 A CN108228440 A CN 108228440A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3624—Software debugging by performing operations on the source code, e.g. via a compiler
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/366—Software debugging using diagnostics
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Abstract
The invention discloses a kind of detection method and device of CPU program pointers, wherein, method is used in the embedded system for including multiple CPU, and method includes the following steps：For each CPU, when the program for monitoring current CPU goes to predeterminated position, current CPU is controlled to send preset instructions to the first CPU matched with current CPU, so that the first CPU performs predetermined registration operation according to preset instructions；Judge whether current CPU receives the implementing result of the first CPU returns；If not, it is determined that the program pointer of the first CPU is abnormal.The detection method of the CPU program pointers of the embodiment of the present invention, by the mutual detection between CPU realize CPU program pointers whether abnormal purpose, reduce and the burden that monitoring module is brought to embedded system be separately provided in board used in embedded system.
Description
Technical field
The present invention relates to field of communication technology more particularly to a kind of detection methods and device of CPU program pointers.
Background technology
Central processor CPU (Central Processing Unit) is the core of an embedded system, therefore right
CPU is monitored to ensure that its normal execution code is the most important thing of an embedded system security.The failure of usual CPU
It is generally divided into：The types such as arithmetic error, bit operating mistake, comparison error, logic error, control mistake, time-out error.
For CPU, a common irreversible permanent fault is program pointer by external electromagnetic field interference etc.
Reason is out of control to be either suspended so as to which CPU performs unknown command or accesses unknown memory headroom.
In general, in order to monitor and detect the abnormal behaviour of program pointer, traditional way is the external house dog outside CPU
Module, CPU specific positions within each program loop export pulse to watchdog module, in this way if program fleet or
After some segment of program is absorbed in endless loop, the main program of CPU can not just export pulse to watchdog module, and house dog will
Come terminator or reset in one pulse to CPU pins of output..
However, by way of whether this program pointer watchdog module detection CPU is abnormal, at least there are following skills
Art problem：External watchdog module increases the power consumption of system, meanwhile, house dog is often an individual module, for embedding
For embedded system, hardware board move it is then tens thousand of, it is expensive and rare.It is special mark one piece of board do house dog increase it is whole
The cost of a system.
Invention content
The purpose of the present invention is intended to solve one of the technical issues of above-mentioned at least to a certain extent.
For this purpose, first purpose of the present invention is to propose a kind of detection method of CPU program pointers, this method passes through
Mutual detection between CPU realize CPU program pointers whether abnormal purpose, reduce in plate used in embedded system
The burden that monitoring module is brought to embedded system is separately provided in card.
Second object of the present invention is to propose a kind of detection device of CPU program pointers.
To achieve these goals, the detection method of the CPU program pointers of first aspect present invention embodiment, the method
For including in the embedded system of multiple CPU, the described method comprises the following steps：It is current monitoring for each CPU
When the program of CPU goes to predeterminated position, current CPU is controlled to send default refer to the first CPU with the current CPU pairings
It enables, so that the first CPU performs predetermined registration operation according to the preset instructions；It is described to judge whether the current CPU receives
The implementing result that first CPU is returned；If not, it is determined that the program pointer of the first CPU is abnormal.
The detection method of the CPU program pointers of the embodiment of the present invention, for each CPU, in the program for monitoring current CPU
When going to predeterminated position, preset instructions are sent to the first CPU matched with current CPU, so that the first CPU is according to preset instructions
Perform predetermined registration operation；Judge whether current CPU receives the implementing result of the first CPU returns；If not, it is determined that the first CPU's
Program pointer is abnormal.As a result, by the mutual detection between CPU realize CPU program pointers whether abnormal purpose, reduce
The burden that monitoring module is brought to embedded system is separately provided in board used in embedded system.
In one embodiment of the invention, it is described to judge whether the current CPU receives what the first CPU was returned
Implementing result, including：Judge whether the current CPU receives the implementing result that the first CPU is returned in preset time.
In one embodiment of the invention, the preset instructions are time delay command, and the predetermined registration operation is delay operation.
In one embodiment of the invention, the embedded system includes two CPU.
To achieve these goals, the detection device of the CPU program pointers of second aspect of the present invention embodiment, described device
For including in the embedded system of multiple CPU, described device includes：Sending module for being directed to each CPU, is monitoring
When the program of current CPU goes to predeterminated position, preset instructions are sent to the first CPU with the current CPU pairings, so that institute
It states the first CPU and performs predetermined registration operation according to the preset instructions；Judgment module, for judging whether the current CPU receives
The implementing result that first CPU is returned；Determining module, for judging that the current CPU is not receive the first CPU
During the implementing result of return, determine that the program pointer of the first CPU is abnormal.
The detection device of the CPU program pointers of the embodiment of the present invention, for each CPU, in the program for monitoring current CPU
When going to predeterminated position, preset instructions are sent to the first CPU matched with current CPU, so that the first CPU is according to preset instructions
Perform predetermined registration operation；Judge whether current CPU receives the implementing result of the first CPU returns；If not, it is determined that the first CPU's
Program pointer is abnormal.As a result, by the mutual detection between CPU realize CPU program pointers whether abnormal purpose, reduce
The burden that monitoring module is brought to embedded system is separately provided in board used in embedded system.
In one embodiment of the invention, the judgment module, is specifically used for：Judge the current CPU when default
The interior implementing result for whether receiving the first CPU and returning.
In one embodiment of the invention, the preset instructions are time delay command, and the predetermined registration operation is delay operation.
In one embodiment of the invention, the embedded system includes two CPU.
The additional aspect of the present invention and advantage will be set forth in part in the description, and will partly become from the following description
It obtains significantly or is recognized by the practice of the present invention.
Description of the drawings
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments
Significantly and it is readily appreciated that, wherein,
Fig. 1 is the flow chart of the detection method of CPU program pointers according to an embodiment of the invention；
Fig. 2 is the flow chart of the detection method of CPU program pointers in accordance with another embodiment of the present invention；
Fig. 3 is the structure diagram of the detection device of CPU program pointers according to an embodiment of the invention.
Specific embodiment
The embodiment of the present invention is described below in detail, the example of the embodiment is shown in the drawings, wherein from beginning to end
Same or similar label represents same or similar element or the element with same or like function.Below with reference to attached
The embodiment of figure description is exemplary, it is intended to for explaining the present invention, and is not considered as limiting the invention.
Below with reference to the accompanying drawings the detection method and device of the CPU program pointers of the embodiment of the present invention are described.
Fig. 1 is the flow chart of the detection method of CPU program pointers according to an embodiment of the invention.
Wherein, it should be noted that the detection method of the CPU program pointers of the embodiment is applied to the insertion of multiple CPU
In formula system.As shown in Figure 1, the detection method of the CPU program pointers includes：
S11, for each CPU, when the program for monitoring current CPU goes to predeterminated position, control current CPU to
First CPU of current CPU pairings sends preset instructions, so that the first CPU performs predetermined registration operation according to preset instructions.
In one embodiment of the invention, in the embedded system comprising multiple CPU, for the journey to each CPU
Whether sequence pointer, which is abnormal, is detected, and reduces the cost of system, can be corresponding to determine by the mutual detection between CPU
Whether the program pointer of CPU is abnormal.
Wherein, predeterminated position refers to the specific position of each program loop, for example, predeterminated position is in each program loop
End at.
For example, for current CPU, it is assumed that the program performed by current CPU includes N+1 program instruction,
If setting predeterminated position between program instruction N and program instruction N+1 in advance, in the mistake that current CPU is executed program instructions
Cheng Zhong has performed program instruction N in current CPU, that is, the program of current CPU goes to predeterminated position, control current CPU to
Its CPU matched sends preset instructions, so as to perform predetermined registration operation according to preset instructions with the CPU that it is matched.
Wherein, it is to be understood that for including the embedded system of multiple CPU, can be each CPU setting it is identical or
Different predeterminated positions, the embodiment are not construed as limiting this.
Wherein, preset instructions are pre-set instructions, for example, preset instructions can be operational order, read or write to post
Storage instruction, time delay command etc..
Wherein, it should be noted that predetermined registration operation is corresponding with preset instructions, for example, preset instructions are time delay command, it is corresponding
Ground, predetermined registration operation are delay operation.
Wherein, it is to be understood that predetermined registration operation is to need to use the operation of program pointer in the process of implementation.
As a kind of illustrative embodiment, current CPU can be sent by serial line interface to the first CPU matched with it
Preset instructions.
S12, judges whether current CPU receives the implementing result of the first CPU returns.
In one embodiment of the invention, in current CPU after the first CPU matched with it sends preset instructions, such as
The program pointer of the first CPU of fruit does not occur exception, then the first CPU will perform predetermined registration operation according to preset instructions, and pre- performing
If the backward current CPU of operation returns to implementing result.
In an embodiment of the invention, it can determine whether current CPU receives holding for the first CPU returns in preset time
Row result.
Wherein, preset time is to perform predetermined registration operation according to the first CPU and return to the implementing result required time to preset
Setting.
Wherein, it is to be understood that preset time is more than required for the first CPU performs predetermined registration operation and returns to implementing result
Time.
S13, if not, it is determined that the program pointer of the first CPU is abnormal.
In addition, if it is judged that current CPU receives the implementing result of the first CPU returns, it is determined that the program of the first CPU
Pointer is normal.
It in one embodiment of the invention, can be according to pre-set after the program pointer exception for determining the first CPU
Troubleshooting strategy carries out troubleshooting, with the CPU pointers in timely processing embedded system it is abnormal the problem of, and then may be such that
The fast quick-recovery of program operation of embedded system is normal, ensures system stable operation, improves the safety of operation.
The detection method of the CPU program pointers of the embodiment of the present invention, for each CPU, in the program for monitoring current CPU
When going to predeterminated position, preset instructions are sent to the first CPU matched with current CPU, so that the first CPU is according to preset instructions
Perform predetermined registration operation；Judge whether current CPU receives the implementing result of the first CPU returns；If not, it is determined that the first CPU's
Program pointer is abnormal.As a result, by the mutual detection between CPU realize CPU program pointers whether abnormal purpose, reduce
The burden that monitoring module is brought to embedded system is separately provided in board used in embedded system.
Fig. 2 is the flow chart of the detection method of CPU program pointers in accordance with another embodiment of the present invention.Wherein, the reality
Example is applied to have in light rail embedded system there are two CPU, and preset instructions are time delay command, predetermined registration operation is for delay operation
It is described, for the convenience of description, the embodiment represents the two CPU with CPU1 and CPU2.Wherein, it should be noted that this
Two CPU run identical program, and a CPU is host CPU in the two CPU, another CPU is from CPU.
As shown in Fig. 2, the detection method of the CPU program pointers includes：
S21, when the program for monitoring current CPU goes to predeterminated position, control CPU1 is instructed to CPU2 forward delay intervals.
Wherein, predeterminated position refers to the specific position of each program loop, for example, predeterminated position is in each program loop
End at.
For example, for CPU1, it is assumed that the program performed by CPU1 includes N+1 program instruction, if in advance
First predeterminated position is set between program instruction N and program instruction N+1, then during CPU1 is executed program instructions,
CPU1 has performed program instruction N, that is, the program of CPU1 goes to predeterminated position, and control CPU1 sends pre- to the CPU matched with it
If instruction, so as to perform predetermined registration operation according to preset instructions with the CPU that it is matched.
S22, judges whether CPU1 receives the implementing result of CPU2 returns in preset time.
In one embodiment of the invention, after the time delay command for receiving that CPU1 is sent in CPU2, if the program of CPU2
Pointer is normal, then CPU2 will perform preset delay operation according to time delay command, and is returned to CPU1 and perform preset delay behaviour
The implementing result of work.
Wherein, the time of CPU2 delays is pre-set in preset delay operation.
For example, when pre-setting CPU2 and receiving the time delay command of CPU1, the delay operation performed by CPU2 is：
CPU2 is delayed 0.5 second.Predeterminated position is gone in the program of CPU1, when CPU1 is instructed to CPU2 forward delay intervals, if CPU2
Program pointer it is normal, CPU2 will be delayed 0.5 second according to time delay command, and return to CPU1 and to perform preset delay operation and holding
Row result.
In addition, if the program pointer of CPU2 is abnormal, for example, the program pointer failure of CPU2, then CPU2 is not carried out pre-
If delay operation and return implementing result.
Wherein, it is to be understood that when CPU1 is controlled to be instructed to CPU2 forward delay intervals, timing can be started simultaneously at, and sentence
Break and the implementing result of CPU2 returns whether is received before timing time reaches preset time.
S23, if so, determining that the program pointer of CPU2 is normal.
S24, if not, it is determined that the program pointer of CPU2 is abnormal.
It in one embodiment of the invention, can be according to pre-set event after the program pointer exception of CPU2 is determined
Barrier processing strategy carries out troubleshooting, with the CPU pointers in timely processing light rail embedded system it is abnormal the problem of, and then can make
The fast quick-recovery of program operation for obtaining light rail embedded system is normal, ensures system stable operation, improves the safety of operation.
Wherein, it should be noted that preset instructions are sent to CPU1 by CPU2, whether to detect the program pointer of CPU1
Abnormal process, similar with detection process shown in FIG. 1, details are not described herein again.
It in summary it can be seen, the detection method of the CPU program pointers of the embodiment passes through two in light rail embedded system
The mutual detection of CPU detects CPU program pointers, hereby it is achieved that CPU program pointers whether abnormal purpose, reduce
The burden that monitoring module is brought to embedded system is separately provided in board used in embedded system.
Wherein, it is to be understood that the probability that the program pointer of two CPU breaks down simultaneously is almost nil, therefore, should
Be the light rail embedded system of embodiment security and stability it is higher.
The detection method of the CPU program pointers of the embodiment of the present invention, by light rail embedded system two CPU it is mutual
Detection detects CPU program pointers, hereby it is achieved that CPU program pointers whether abnormal purpose, reduce in embedded system
The burden that monitoring module is brought to embedded system is separately provided in used board.
In order to realize above-described embodiment, the invention also provides a kind of detection devices of CPU program pointers.
Fig. 3 is the structure diagram of the detection device of CPU program pointers according to an embodiment of the invention.Wherein, it needs
Illustrate, device is used in the embedded system for including multiple CPU, as shown in figure 3, the detection device of the CPU program pointers
It can also include sending module 110, judgment module 120 and determining module 130, wherein：
Sending module 110 is used for for each CPU, when the program for monitoring current CPU goes to predeterminated position, to
First CPU of current CPU pairings sends preset instructions, so that the first CPU performs predetermined registration operation according to preset instructions.
Wherein, predeterminated position refers to the specific position of each program loop, for example, predeterminated position is in each program loop
End at.
For example, for current CPU, it is assumed that the program performed by current CPU includes N+1 program instruction,
If setting predeterminated position between program instruction N and program instruction N+1 in advance, in the mistake that current CPU is executed program instructions
Cheng Zhong has performed program instruction N in current CPU, that is, the program of current CPU goes to predeterminated position, control current CPU to
Its CPU matched sends preset instructions, so as to perform predetermined registration operation according to preset instructions with the CPU that it is matched.
Judgment module 120 is used to judge the implementing result whether current CPU receives the first CPU returns.
Determining module 130 is used to, when it is not receive implementing result that the first CPU is returned to judge current CPU, determine the
The program pointer of one CPU is abnormal.
In one embodiment of the invention, judgment module 120 is specifically used for：Judge current CPU is in preset time
The no implementing result for receiving the first CPU returns.
In one embodiment of the invention, preset instructions are time delay command, and predetermined registration operation is delay operation.
In one embodiment of the invention, embedded system includes two CPU.
Wherein, it should be noted that the explanation of the aforementioned detection method embodiment to CPU program pointers is also applied for
The detection device of the CPU program pointers of the embodiment, realization principle is similar, and details are not described herein again.
The detection device of the CPU program pointers of the embodiment of the present invention, for each CPU, in the program for monitoring current CPU
When going to predeterminated position, preset instructions are sent to the first CPU matched with current CPU, so that the first CPU is according to preset instructions
Perform predetermined registration operation；Judge whether current CPU receives the implementing result of the first CPU returns；If not, it is determined that the first CPU's
Program pointer is abnormal.As a result, by the mutual detection between CPU realize CPU program pointers whether abnormal purpose, reduce
The burden that monitoring module is brought to embedded system is separately provided in board used in embedded system.
In the description of this specification, reference term " one embodiment ", " example ", " is specifically shown " some embodiments "
The description of example " or " some examples " etc. means specific features, structure, material or the spy for combining the embodiment or example description
Point is contained at least one embodiment of the present invention or example.In the present specification, schematic expression of the above terms are not
It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office
It is combined in an appropriate manner in one or more embodiments or example.In addition, without conflicting with each other, the skill of this field
Art personnel can tie the different embodiments or examples described in this specification and the feature of different embodiments or examples
It closes and combines.
In addition, term " first ", " second " are only used for description purpose, and it is not intended that instruction or hint relative importance
Or the implicit quantity for indicating indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include at least one this feature.In the description of the present invention, " multiple " are meant that at least two, such as two, three
It is a etc., unless otherwise specifically defined.
Any process described otherwise above or method description are construed as in flow chart or herein, represent to include
Module, segment or the portion of the code of the executable instruction of one or more the step of being used to implement specific logical function or process
Point, and the range of the preferred embodiment of the present invention includes other realization, wherein can not press shown or discuss suitable
Sequence, including according to involved function by it is basic simultaneously in the way of or in the opposite order, to perform function, this should be of the invention
Embodiment person of ordinary skill in the field understood.
Expression or logic and/or step described otherwise above herein in flow charts, for example, being considered use
In the order list for the executable instruction for realizing logic function, may be embodied in any computer-readable medium, for
Instruction execution system, device or equipment (such as computer based system, including the system of processor or other can be held from instruction
The system of row system, device or equipment instruction fetch and execute instruction) it uses or combines these instruction execution systems, device or set
It is standby and use.For the purpose of this specification, " computer-readable medium " can any can be included, store, communicate, propagate or pass
Defeated program is for instruction execution system, device or equipment or the dress used with reference to these instruction execution systems, device or equipment
It puts.The more specific example (non-exhaustive list) of computer-readable medium is including following：Electricity with one or more wiring
Connecting portion (electronic device), portable computer diskette box (magnetic device), random access memory (RAM), read-only memory
(ROM), erasable edit read-only storage (EPROM or flash memory), fiber device and portable optic disk is read-only deposits
Reservoir (CDROM).In addition, computer-readable medium can even is that the paper that can print described program on it or other are suitable
Medium, because can be for example by carrying out optical scanner to paper or other media, then into edlin, interpretation or when necessary with it
His suitable method is handled electronically to obtain described program, is then stored in computer storage.
It should be appreciated that each section of the present invention can be realized with hardware, software, firmware or combination thereof.Above-mentioned
In embodiment, software that multiple steps or method can in memory and by suitable instruction execution system be performed with storage
Or firmware is realized.If for example, with hardware come realize in another embodiment, can be under well known in the art
Any one of row technology or their combination are realized：With for the logic gates to data-signal realization logic function
Discrete logic, have suitable combinational logic gate circuit application-specific integrated circuit, programmable gate array (PGA), scene
Programmable gate array (FPGA) etc..
Those skilled in the art are appreciated that realize all or part of step that above-described embodiment method carries
Suddenly it is that relevant hardware can be instructed to complete by program, the program can be stored in a kind of computer-readable storage medium
In matter, the program when being executed, one or a combination set of the step of including embodiment of the method.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing module, it can also
That each unit is individually physically present, can also two or more units be integrated in a module.Above-mentioned integrated mould
The form that hardware had both may be used in block is realized, can also be realized in the form of software function module.The integrated module is such as
Fruit is realized in the form of software function module and is independent product sale or in use, can also be stored in a computer
In read/write memory medium.
Storage medium mentioned above can be read-only memory, disk or CD etc..Although it has been shown and retouches above
The embodiment of the present invention is stated, it is to be understood that above-described embodiment is exemplary, it is impossible to be interpreted as the limit to the present invention
System, those of ordinary skill in the art can be changed above-described embodiment, change, replace and become within the scope of the invention
Type.
Claims (8)
1. a kind of detection method of CPU program pointers, which is characterized in that the method is used for the embedded system for including multiple CPU
In system, it the described method comprises the following steps：
For each CPU, when the program for monitoring current CPU goes to predeterminated position, control current CPU to it is described current
First CPU of CPU pairings sends preset instructions, so that the first CPU performs predetermined registration operation according to the preset instructions；
Judge whether the current CPU receives the implementing result that the first CPU is returned；
If not, it is determined that the program pointer of the first CPU is abnormal.
2. the method as described in claim 1, which is characterized in that described to judge whether the current CPU receives described first
The implementing result that CPU is returned, including：
Judge whether the current CPU receives the implementing result that the first CPU is returned in preset time.
3. the method as described in claim 1, which is characterized in that the preset instructions are time delay command, and the predetermined registration operation is
Delay operation.
4. such as claim 1-3 any one of them methods, which is characterized in that the embedded system includes two CPU.
5. a kind of detection device of CPU program pointers, which is characterized in that described device is used for the embedded system for including multiple CPU
In system, described device includes：
Sending module for being directed to each CPU, when the program for monitoring current CPU goes to predeterminated position, is worked as to described
First CPU of preceding CPU pairings sends preset instructions, so that the first CPU performs predetermined registration operation according to the preset instructions；
Judgment module, for judging whether the current CPU receives the implementing result that the first CPU is returned；
Determining module, for when it is not receive the implementing result of the first CPU returns to judge the current CPU, determining
The program pointer of first CPU is abnormal.
6. device as claimed in claim 5, which is characterized in that the judgment module is specifically used for：
Judge whether the current CPU receives the implementing result that the first CPU is returned in preset time.
7. device as claimed in claim 5, which is characterized in that the preset instructions are time delay command, and the predetermined registration operation is
Delay operation.
8. such as claim 5-7 any one of them devices, which is characterized in that the embedded system includes two CPU.
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