CN108198856B - Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device - Google Patents

Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device Download PDF

Info

Publication number
CN108198856B
CN108198856B CN201810168886.9A CN201810168886A CN108198856B CN 108198856 B CN108198856 B CN 108198856B CN 201810168886 A CN201810168886 A CN 201810168886A CN 108198856 B CN108198856 B CN 108198856B
Authority
CN
China
Prior art keywords
metal layer
ohmic contact
layer
gan
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810168886.9A
Other languages
Chinese (zh)
Other versions
CN108198856A (en
Inventor
崔玉兴
谭永亮
樊帆
毕胜赢
胡泽先
张力江
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hebei Zhongci Electronic Technology Co ltd Shijiazhuang High Tech Branch
Original Assignee
CETC 13 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 13 Research Institute filed Critical CETC 13 Research Institute
Priority to CN201810168886.9A priority Critical patent/CN108198856B/en
Publication of CN108198856A publication Critical patent/CN108198856A/en
Application granted granted Critical
Publication of CN108198856B publication Critical patent/CN108198856B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/452—Ohmic electrodes on AIII-BV compounds
    • H01L29/454—Ohmic electrodes on AIII-BV compounds on thin film AIII-BV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

The invention is suitable for the technical field of semiconductors, and provides a manufacturing method of an ohmic contact electrode of a GaN HEMT device, the electrode and the HEMT device, wherein the method comprises the following steps: forming ohmic contact metal layers on the upper surface of the barrier layer of the GaN wafer and corresponding parts of the source electrode region and the drain electrode region respectively, wherein the ohmic contact metal layers sequentially comprise a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer from bottom to top; the GaN wafer sequentially comprises a substrate, a GaN epitaxial layer and a barrier layer from bottom to top; and carrying out rapid thermal annealing treatment on the GaN wafer on which the ohmic contact metal layer is formed to form an ohmic contact electrode. The invention can make the metal surface of the ohmic contact metal layer smooth and the edge smooth and tidy after the high-temperature annealing process, thereby improving the stability and the reliability of the device.

Description

Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a manufacturing method of an ohmic contact electrode of a GaN HEMT device, the electrode and the HEMT device.
Background
The wide-bandgap semiconductor GaN has the advantages of large bandgap width, high breakdown field strength, high electron saturation drift velocity and the like, and has great potential in the field of high-temperature and microwave power device manufacturing. Among them, GaN HEMTs (High electron mobility transistors) have significant advantages in microwave High power and High temperature applications, and have become one of the current research hotspots. A large number of experimental results and theoretical analysis show that the good ohmic contact electrode can not only improve the performance of the device, but also is beneficial to improving the service life and the reliability of the device. The traditional ohmic contact metal has the defects of rough metal surface appearance and irregular metal edge after annealing, so that the stability of the GaN HEMT device is poor and the reliability is reduced.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method for manufacturing an ohmic contact electrode of a GaN HEMT device, an electrode and a HEMT device, so as to solve the problems of poor stability and low reliability of the GaN HEMT device in the prior art.
The first aspect of the embodiments of the present invention provides a method for manufacturing an ohmic contact electrode of a GaN HEMT device, including:
forming ohmic contact metal layers on the upper surface of the barrier layer of the GaN wafer and corresponding parts of the source electrode region and the drain electrode region respectively, wherein the ohmic contact metal layers sequentially comprise a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer from bottom to top; the GaN wafer sequentially comprises a substrate, a GaN epitaxial layer and a barrier layer from bottom to top;
and carrying out rapid thermal annealing treatment on the GaN wafer on which the ohmic contact metal layer is formed to form an ohmic contact electrode.
Optionally, the thickness of the Ti metal layer is 10 nm to 30 nm, the thickness of the Al metal layer is 100 nm to 300 nm, the thickness of the Ta metal layer is 10 nm to 50 nm, the thickness of the Mo metal layer is 10 nm to 60 nm, and the thickness of the Au metal layer is 15 nm to 100 nm.
Optionally, the forming an ohmic contact metal layer on the upper surface of the barrier layer of the GaN wafer and at the portions corresponding to the source electrode region and the drain electrode region respectively includes:
coating a photoresist layer on the upper surface of the barrier layer at a part corresponding to a first region, wherein the first region is a region of the GaN wafer except the source electrode region and the drain electrode region;
depositing an ohmic contact metal layer on the upper surface of the GaN wafer coated with the photoresist layer;
and removing the photoresist layer.
Optionally, the process conditions of the rapid thermal annealing process are as follows: the annealing temperature is 500 ℃ to 900 ℃, the annealing time is 10 seconds to 120 seconds, and the annealing atmosphere is nitrogen.
Optionally, the thickness of the GaN epitaxial layer is 1.5 to 2.5 micrometers; the barrier layer has a thickness of 10 to 30 nanometers.
Optionally, the substrate is a SiC substrate, a Si substrate, a sapphire substrate, or a diamond substrate.
The second aspect of the embodiment of the invention provides an ohmic contact electrode of a GaN HEMT device, wherein ohmic contact metal layers are respectively arranged on parts, corresponding to a source electrode region and a drain electrode region, of the upper surface of a barrier layer of a GaN wafer, and the ohmic contact metal layers sequentially comprise a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer from bottom to top; the ohmic contact metal layer and the GaN wafer form ohmic contact; the GaN wafer sequentially comprises a substrate, a GaN epitaxial layer and a barrier layer from bottom to top.
The third aspect of the embodiments of the present invention provides a GaN HEMT device, including a GaN HEMT device body formed on a GaN wafer, the GaN HEMT device body being provided with an ohmic contact electrode of the GaN HEMT device according to the second aspect of the embodiments of the present invention.
Compared with the prior art, the embodiment of the invention has the following beneficial effects: according to the embodiment of the invention, the composite layer of the Ti metal layer, the Al metal layer, the Ta metal layer, the Mo metal layer and the Au metal layer is used as the ohmic contact metal layer, and the Ta metal layer and the Mo metal layer are refractory metals, so that the ohmic contact metal can be smooth in surface and smooth and neat in edge after an annealing process, and the stability and reliability of a device can be improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic flow chart illustrating an implementation of a method for manufacturing an ohmic contact electrode of a GaN HEMT device according to an embodiment of the present invention;
fig. 2 is a schematic structural view of a method for manufacturing an ohmic contact electrode of a GaN HEMT device according to a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of an ohmic contact electrode according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
Example one
Referring to fig. 1, a method for fabricating an ohmic contact electrode of a GaN HEMT device includes:
step S101, ohmic contact metal layers are respectively formed on the upper surface of a barrier layer of the GaN wafer and corresponding parts of a source electrode area and a drain electrode area, and the ohmic contact metal layers sequentially comprise a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer from bottom to top; the GaN wafer sequentially comprises a substrate, a GaN epitaxial layer and a barrier layer from bottom to top.
In the embodiment of the present invention, referring to (1) in fig. 2, a GaN wafer includes, from bottom to top, a substrate 201, a GaN epitaxial layer 202, and a barrier layer 203. The thickness of the GaN epitaxial layer 202 is 1.5 to 2.5 micrometers, and the thickness of the barrier layer 203 is 10 to 30 nanometers. The substrate 201 is a substrate formed of a wide bandgap or ultra-wide bandgap semiconductor material, including but not limited to a SiC substrate, a Si substrate, a sapphire substrate, or a diamond substrate. A two-dimensional electron gas is formed between the GaN epitaxial layer 202 and the barrier layer 203, and the barrier layer 203 includes an AlN epitaxial layer and an AlGaN epitaxial layer on the upper surface of the AlN epitaxial layer, and the AlN epitaxial layer is generally thin. The material of the barrier layer 203 may be other materials capable of forming a two-dimensional electron gas with the GaN epitaxial layer 202, and is not limited herein. The GaN wafer is a wafer that is conventional in semiconductor processes, and may include an AlN buffer layer between the substrate 201 and the GaN epitaxial layer 202, in addition to the substrate 201, the GaN epitaxial layer 202, and the barrier layer 203.
It should be understood that other necessary structures for forming HEMT devices are also provided on the GaN wafer, including but not limited to gate electrodes, sub-gate dielectric layers, passivation protection layers. These structures are not taken as improvements of the embodiments of the present invention, and are not described herein again.
Referring to fig. 3, the ohmic contact metal layer sequentially includes a Ti metal layer 2041, an Al metal layer 2042, a Ta metal layer 2043, a Mo metal layer 2044, and an Au metal layer 2045 from bottom to top. The thickness of the Ti metal layer 2041 is 10 nm to 30 nm, the thickness of the Al metal layer 2042 is 100 nm to 300 nm, the thickness of the Ta metal layer 2043 is 10 nm to 50 nm, the thickness of the Mo metal layer 2044 is 10 nm to 60 nm, and the thickness of the Au metal layer 2045 is 15 nm to 100 nm. The Ti metal layer 2041 is a barrier layer and an adhesion layer, and reacts with the GaN wafer in a subsequent rapid annealing process to form an N vacancy, so that donor doping is formed on the GaN wafer, and the probability that electrons pass through the barrier layer to reach the AlGaN/GaN two-dimensional electron gas channel is increased, so that ohmic contact is formed.
The Al metal layer 2042 serves as a capping layer, and plays a catalytic role, enhancing the solid phase reaction of N atoms with barrier layer metal atoms. The Ta metal layer 2043 and the Mo metal layer 2044 are diffusion barrier layers for preventing the Au metal layer 2045 from undergoing diffusion reaction with the Al metal layer 2042 and the Ti metal layer 2041 at high temperature to deteriorate ohmic contact and alloy between metals. Au metal layer 2045 is a capping metal layer to reduce surface contact resistance and prevent oxidation of the underlying metal. The thickness of each layer of metal in the ohmic contact metal layer 204 is set according to actual requirements, for example, the ohmic contact metal layer 204 sequentially includes, from bottom to top, a Ti metal layer 2041 with a thickness of 10 nm, an Al metal layer 2042 with a thickness of 100 nm, a Ta metal layer 2043 with a thickness of 10 nm, a Mo metal layer 2044 with a thickness of 10 nm, and an Au metal layer 2045 with a thickness of 15 nm, or the ohmic contact metal layer 204 sequentially includes, from bottom to top, a Ti metal layer 2041 with a thickness of 30 nm, an Al metal layer 2042 with a thickness of 300 nm, a Ta metal layer 2043 with a thickness of 50 nm, a Mo metal layer 2044 with a thickness of 60 nm, and an Au metal layer 2045 with a thickness of 100 nm.
Optionally, the specific implementation manner of step S101 is: coating a photoresist layer on the upper surface of the barrier layer at a part corresponding to a first region, wherein the first region is a region of the GaN wafer except the source electrode region and the drain electrode region; depositing a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer on the upper surface of the GaN wafer coated with the photoresist layer in sequence; and removing the photoresist layer.
In the embodiment of the present invention, referring to (2) to (4) in fig. 2, firstly, a photoresist layer with a thickness of 0.5 to 2 microns is coated on the upper surface of the barrier layer 203, and is subjected to exposure, development and film hardening processes to form a photoresist layer 205, where the photoresist layer 205 only covers a first region, i.e., a region of the GaN wafer except for a source electrode region and a drain electrode region, where the source electrode region is a region for preparing a source electrode and the drain electrode region is a region for preparing a drain electrode. Then, a Ti metal layer 2041, an Al metal layer 2042, a Ta metal layer 2043, a Mo metal layer 2044, and an Au metal layer 2045 are sequentially deposited on the surface of the GaN wafer by an electron beam evaporation process or a sputtering process as the ohmic contact metal layer 204. Finally, the GaN wafer is placed in an organic solvent to be soaked, and the photoresist layer 205 is removed, so that the ohmic contact metal layer 204 on the upper surface of the photoresist layer 205 is removed.
And S102, performing rapid thermal annealing treatment on the GaN wafer on which the ohmic contact metal layer is formed to form an ohmic contact electrode.
In the embodiment of the invention, the GaN wafer after the ohmic contact metal layer 204 is formed is subjected to rapid thermal annealing treatment, the annealing temperature is 500-900 ℃, the annealing time is 10-120 seconds, and the annealing atmosphere is nitrogen, so that an ohmic contact electrode is formed.
In the embodiment of the invention, the composite layer of the Ti metal layer 2041, the Al metal layer 2042, the Ta metal layer 2043, the Mo metal layer 2044 and the Au metal layer 2045 is used as the ohmic contact metal layer 204, and the Ta metal and the Mo metal are refractory metals, so that the ohmic contact metal layer 204 can have a flat metal surface and smooth and neat edges after a high-temperature annealing process, and the stability and reliability of the device can be improved.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
Example two
Referring to (4) in fig. 2 and fig. 3, an ohmic contact electrode of a GaN HEMT device includes ohmic contact metal layers 204 respectively disposed on portions of an upper surface of a barrier layer 203 of a GaN wafer corresponding to a source electrode region and a drain electrode region, and the ohmic contact metal layers sequentially include a Ti metal layer 2041, an Al metal layer 2042, a Ta metal layer 2043, a Mo metal layer 2044, and an Au metal layer 2045 from bottom to top; the ohmic contact metal layer forms ohmic contact with the barrier layer 203; the GaN wafer sequentially comprises a substrate 201, a GaN epitaxial layer 202 and a barrier layer 203 from bottom to top.
The ohmic contact electrode of the GaN HEMT device provided by the embodiment of the invention is manufactured by the method provided by the first embodiment of the invention and has the beneficial effects of the first embodiment of the invention.
EXAMPLE III
A GaN HEMT device comprises a GaN HEMT device body formed on a GaN wafer, wherein the GaN HEMT device body is provided with the ohmic contact electrode of the GaN HEMT device according to the second embodiment of the invention, and the GaN HEMT device has the beneficial effects of the second embodiment of the invention.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (7)

1. A manufacturing method of an ohmic contact electrode of a GaN HEMT device is characterized by comprising the following steps:
forming ohmic contact metal layers on the upper surface of the barrier layer of the GaN wafer and corresponding parts of the source electrode region and the drain electrode region respectively, wherein the ohmic contact metal layers sequentially comprise a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer from bottom to top; the GaN wafer sequentially comprises a substrate, a GaN epitaxial layer and a barrier layer from bottom to top; the thickness of the Ti metal layer is 10-30 nanometers, the thickness of the Al metal layer is 100-300 nanometers, the thickness of the Ta metal layer is 10-50 nanometers, the thickness of the Mo metal layer is 10-60 nanometers, and the thickness of the Au metal layer is 15-100 nanometers; the Ti metal layer is an adhesion layer, and the Ta metal layer and the Mo metal layer are diffusion barrier layers;
and carrying out rapid thermal annealing treatment on the GaN wafer on which the ohmic contact metal layer is formed to form an ohmic contact electrode.
2. The method of claim 1, wherein the forming ohmic contact metal layers on the upper surface of the barrier layer of the GaN wafer at portions corresponding to the source electrode region and the drain electrode region respectively comprises:
coating a photoresist layer on the upper surface of the barrier layer at a part corresponding to a first region, wherein the first region is a region of the GaN wafer except the source electrode region and the drain electrode region;
depositing an ohmic contact metal layer on the upper surface of the GaN wafer coated with the photoresist layer;
and removing the photoresist layer.
3. The method for manufacturing the ohmic contact electrode of the GaN HEMT device of claim 1, wherein the process conditions of the rapid thermal annealing process are as follows: the annealing temperature is 500 ℃ to 900 ℃, the annealing time is 10 seconds to 120 seconds, and the annealing atmosphere is nitrogen.
4. The method of fabricating an ohmic contact electrode of a GaN HEMT device according to claim 1, wherein the GaN epitaxial layer has a thickness of 1.5 to 2.5 microns; the barrier layer has a thickness of 10 to 30 nanometers.
5. The method of fabricating an ohmic contact electrode for a GaN HEMT device according to claim 1, wherein said substrate is a SiC substrate, a Si substrate, a sapphire substrate or a diamond substrate.
6. An ohmic contact electrode of a GaN HEMT device is characterized in that ohmic contact metal layers are respectively arranged on the parts, corresponding to a source electrode region and a drain electrode region, of the upper surface of a barrier layer of a GaN wafer, and the ohmic contact metal layers sequentially comprise a Ti metal layer, an Al metal layer, a Ta metal layer, a Mo metal layer and an Au metal layer from bottom to top; the thickness of the Ti metal layer is 10-30 nanometers, the thickness of the Al metal layer is 100-300 nanometers, the thickness of the Ta metal layer is 10-50 nanometers, the thickness of the Mo metal layer is 10-60 nanometers, and the thickness of the Au metal layer is 15-100 nanometers; the Ti metal layer is an adhesion layer, and the Ta metal layer and the Mo metal layer are diffusion barrier layers; the ohmic contact metal layer and the GaN wafer form ohmic contact; the GaN wafer sequentially comprises a substrate, a GaN epitaxial layer and a barrier layer from bottom to top; the thickness of the GaN epitaxial layer is 1.5-2.5 microns; the barrier layer has a thickness of 10 to 30 nanometers.
7. A GaN HEMT device comprising a GaN HEMT device body formed on a GaN wafer, wherein said GaN HEMT device body is provided with the GaN HEMT device ohmic contact electrode of claim 6.
CN201810168886.9A 2018-02-28 2018-02-28 Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device Active CN108198856B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810168886.9A CN108198856B (en) 2018-02-28 2018-02-28 Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810168886.9A CN108198856B (en) 2018-02-28 2018-02-28 Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device

Publications (2)

Publication Number Publication Date
CN108198856A CN108198856A (en) 2018-06-22
CN108198856B true CN108198856B (en) 2020-07-07

Family

ID=62594631

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810168886.9A Active CN108198856B (en) 2018-02-28 2018-02-28 Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device

Country Status (1)

Country Link
CN (1) CN108198856B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110112068B (en) * 2019-05-23 2022-09-27 厦门市三安集成电路有限公司 Gallium nitride device manufacturing method and gallium nitride device
CN111403281A (en) * 2020-03-23 2020-07-10 南方科技大学 Manufacturing method of semiconductor device electrode and semiconductor ohmic contact structure
CN112614918A (en) * 2020-12-01 2021-04-06 木昇半导体科技(苏州)有限公司 Epitaxial material growth method with high internal quantum rate
CN112992675B (en) * 2021-02-05 2022-12-27 中国电子科技集团公司第十三研究所 Preparation method of porous diamond substrate for terahertz Schottky diode

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102484067A (en) * 2009-06-26 2012-05-30 康奈尔大学 Method for forming iii-v semiconductor structures including aluminum-silicon nitride passivation
US9299821B2 (en) * 2010-06-23 2016-03-29 Cornell University Gated III-V semiconductor structure and method
US9543391B2 (en) * 2011-10-19 2017-01-10 Samsung Electronics Co., Ltd. High electron mobility transistor having reduced threshold voltage variation and method of manufacturing the same

Also Published As

Publication number Publication date
CN108198856A (en) 2018-06-22

Similar Documents

Publication Publication Date Title
CN108198856B (en) Manufacturing method of GaN HEMT device ohmic contact electrode, electrode and HEMT device
JP5621006B2 (en) Contact structure comprising alternating layers of metal and silicon and method of forming related devices
US9331155B2 (en) Semiconductor device and manufacturing method
JP2008124262A (en) AlGaN/GaN-HEMT MANUFACTURING METHOD USING SELECTION-REGROWTH
US9934978B2 (en) Method of fabricating an electrical contact for use on a semiconductor device
CN101414629B (en) Source field plate transistor with high electron mobility
CN109037050B (en) Preparation method of GaN-based HEMT gold-free ohmic contact electrode based on TiN
KR20140124273A (en) Nitride semiconductor and method thereof
CN107393969A (en) A kind of gallium nitride based schottky diode semiconductor devices and manufacture method
CN103928511A (en) Ohmic contact system suitable for gallium nitride component
JP2003059946A (en) Garium nitride semiconductor device
CN106449773B (en) GaN-based Schottky diode structure and manufacturing method thereof
CN108447788B (en) Preparation method of enhanced high electron mobility transistor
JP2005311028A (en) Nitride semiconductor device and manufacturing method therefor
CN101414626A (en) Insulated gate type gate-leakage composite field plate power device
CN104465403A (en) Enhanced AlGaN/GaN HEMT device preparation method
CN111128710A (en) Preparation method of GaN HEMT gold-free low-roughness ohmic contact electrode
CN111128709A (en) Preparation method of Cu-based GaN HEMT gold-free ohmic contact electrode
CN116344601A (en) Manufacturing method of ohmic contact of gallium nitride device
CN116093143A (en) Gallium nitride Schottky diode integrating MISFET gate control function and field plate function and manufacturing method thereof
JP2013214625A (en) Formation method of ohmic contact region with nitride semiconductor
JP2004273658A (en) Method of manufacturing nitride semiconductor element
JP2003197645A (en) Heterojunction field effect transistor and its manufacturing method
CN207818573U (en) GaN HEMT devices Ohm contact electrode and GaN HEMT devices
CN110718584B (en) MIS-HEMT device based on GaN or GaAs and preparation method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20230817

Address after: No. 113 Hezuo Road, High tech Zone, Shijiazhuang City, Hebei Province, 050000

Patentee after: Hebei Zhongci Electronic Technology Co.,Ltd. Shijiazhuang High tech Branch

Address before: 050051 cooperation Road 113, Xinhua District, Hebei, Shijiazhuang

Patentee before: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY Group Corp.