CN108183715B - 400KHz channel machine based on software digital processing - Google Patents
400KHz channel machine based on software digital processing Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
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- H04B—TRANSMISSION
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- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
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- H04L27/12—Modulator circuits; Transmitter circuits
- H04L27/122—Modulator circuits; Transmitter circuits using digital generation of carrier signals
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- H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
- H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
- H04L27/152—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements
- H04L27/1525—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements using quadrature demodulation
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Abstract
The invention provides a 400KHz channel machine based on software digital processing, which is connected with a main control unit through a secondary development interface and is used for operating the 400KHz channel machine; the main control unit is connected with the FPGA radio frequency modulation and demodulation unit through a UART interface, the FPGA radio frequency modulation and demodulation unit is connected with the radio frequency signal receiving and transmitting unit, the radio frequency signal receiving and transmitting unit is connected with the transmitting power control detection unit and the antenna interface, and the transmitting power control detection unit is connected with the main control unit through an IIC interface; the main control unit is connected with the temperature detection unit through a UART interface, and the temperature detection unit is used for monitoring the temperature in the 400KHz channel machine. The invention is based on radio frequency signal software modulation and demodulation technology, adopts a high-speed FPGA chip and a digital oscillator, and realizes the digital processing of radio frequency signals of a channel machine and the decoding functions of sub-audio signals and MSK signals.
Description
Technical Field
The invention relates to the technical field of railway communication, in particular to a 400KHz channel machine based on software digital processing.
Background
The 400KHz wireless train dispatching communication adopts an induction type communication mode, in the application of a railway communication system, a railway contact net wire is used as a wave wire, and the synchronous operation communication of locomotive coordinated operation is realized through a wireless-wired-wireless switching mode, so that the communication plays an important role in the railway communication system, is an important communication mode for guaranteeing driving safety, and plays an important role in railway transportation and safety. Particularly, under the condition of complicated topography in mountain areas, the electrified railway signal coverage quality is poor, and the 400KHz wireless communication technology is adopted, so that the investment is less, the maintenance is simple and convenient, the communication quality is good, and the method is an important guarantee for realizing the requirements of railway safety, high efficiency and heavy load development in a new period.
The traditional 400KHz channel machine adopts the design of analog discrete components, and has the problems of complex production and debugging, poor consistency of equipment batch, poor performance index, low reliability and the like. The existing digital radio station basically adopts a baseband digitizing scheme and an intermediate frequency digitizing scheme, so that up-down conversion of radio frequency signals is needed, and the problem of unstable performance indexes is also existed.
Disclosure of Invention
In order to solve the above-mentioned shortcomings of the prior art, the present invention aims to provide a 400KHz channel engine based on software digital processing, so as to overcome the shortcomings of the prior art.
In order to achieve the above purpose, the invention provides a 400KHz channel machine based on software digital processing, which comprises a secondary development interface, a main control unit, an FPGA radio frequency modulation demodulation unit, a radio frequency signal receiving and transmitting unit, a transmitting power control detection unit, a temperature detection unit and a power supply unit; the secondary development interface is connected with the main control unit and is used for operating the 400KHz channel machine; the main control unit is connected with the FPGA radio frequency modulation and demodulation unit through a UART interface, the FPGA radio frequency modulation and demodulation unit is connected with the radio frequency signal receiving and transmitting unit, the radio frequency signal receiving and transmitting unit is connected with the transmitting power control detection unit and the antenna interface, and the transmitting power control detection unit is connected with the main control unit through an IIC interface; the main control unit is connected with the temperature detection unit through a UART interface, and the temperature detection unit is used for monitoring the temperature in the 400KHz channel machine; the power supply unit is externally connected with a DC13.8V power supply through a power supply interface and is used for converting DC13.8V power supply into DC 3.3V power supply to provide working voltage for the 400KHz channel machine.
As a further explanation of the 400KHz channel engine of the present invention, preferably, the FPGA radio frequency modulation and demodulation unit includes a modulation module and a demodulation module, which modulate or demodulate the audio digital signal, the sub-audio digital signal, and the MSK data digital signal through a digital oscillator.
As a further explanation of the 400KHz channel engine of the present invention, preferably, the modulation module includes a differential encoder having one input and one output, a serial-parallel conversion chip having one input and two outputs, a first digitally controlled oscillator, a second digitally controlled oscillator, four and gates having two inputs and one output, and an exclusive or gate having two inputs and one output; the output of the differential encoder is connected with the serial-parallel conversion chip, the two outputs of the serial-parallel conversion chip are respectively connected with one input of the first and second AND gates, the other inputs of the first and second AND gates are connected with the first digital control oscillator, the output of the first AND gate is connected with one input of the third AND gate, the output of the second AND gate is connected with one input of the fourth AND gate, the other inputs of the third AND gate and the fourth AND gate are connected with the second digital control oscillator, and one output of the third AND gate and the fourth AND gate is connected with the first exclusive-OR gate to realize that audio, sub-audio and MSK data digital signals are modulated on digital 400KHz carrier frequency signals.
As a further explanation of the 400KHz channel engine of the present invention, preferably, the demodulation module includes a third digitally controlled oscillator, a fourth digitally controlled oscillator, a first low pass filter, a second low pass filter, a loop filter, a first integral decision circuit, a second integral decision circuit, a first delay circuit, five and gates having two inputs and one output, and an exclusive or gate having two inputs and one output; the output of the eighth AND gate is connected with the second exclusive-or gate through the second integral decision circuit and the first delay circuit, so as to realize the down-conversion demodulation of the audio, sub-audio and MSK data digital signals by the digital 400KHz carrier frequency signals; the output of the seventh AND gate and the eighth AND gate are also connected to a ninth AND gate, and the output of the ninth AND gate is connected with the third numerical control oscillator and the fourth numerical control oscillator through a loop filter so as to realize carrier synchronization.
As a further explanation of the 400KHz channel engine according to the present invention, it is preferable that the radio frequency signal transceiving unit includes a radio frequency signal generating module and a radio frequency signal demodulating module that generate or demodulate radio frequency signals through a digital oscillator.
As a further illustration of the 400KHz channel engine of the present invention, preferably, the radio frequency signal generating module includes a fifth digitally controlled oscillator, an FM digital modulator, and a phase accumulator; the frequency modulation input signal is input to FM digital modulation and is used for realizing frequency presetting and adjustment of a carrier frequency digital signal; FM digital modulation is output to a phase accumulator so as to enable an input signal to be added with a static frequency control word, wherein one path of the FM digital modulation is output to a waveform memory to generate corresponding waveform data, and the other path of FM digital modulation is output to a fifth numerical control oscillator to generate two paths of orthogonal digital carrier signals by adopting a CORDIC algorithm, so that the generation of a 400KHz radio frequency signal is realized.
As a further explanation of the 400KHz channel engine of the present invention, preferably, the radio frequency signal demodulation module includes a sixth digitally controlled oscillator, a first decimation filter, a second decimation filter, a third decimation filter, a fourth decimation filter, a first channel filter, a second delay circuit, a third delay circuit, an output filter, four and gates having two inputs and one output, and an exclusive or gate having two inputs and one output; wherein, the sixth numerical control oscillator is respectively connected with one input of an eleventh AND gate and one input of a twelfth AND gate, one output of the eleventh AND gate sequentially passes through the first decimation filter, the third decimation filter and the first channel filter, one input of the first channel filter is respectively connected with a thirteenth AND gate and a second delay circuit, and the second delay circuit is connected with a fourteenth AND gate; one output of the twelfth AND gate sequentially passes through a second decimation filter, a fourth decimation filter and a second channel filter, one input of the second channel filter is respectively connected with the fourteenth AND gate and a third delay circuit, and the third delay circuit is connected with the thirteenth AND gate; the thirteenth AND gate and the fourteenth AND gate are connected with a third exclusive-OR gate, and the third exclusive-OR gate is connected with an output filter so as to realize demodulation of the 400KHz radio-frequency signal.
The invention is based on radio frequency signal software modulation and demodulation technology, adopts a high-speed FPGA chip and a digital oscillator, and realizes the digital processing of radio frequency signals of a channel machine and the decoding functions of sub-audio signals and MSK signals.
Drawings
FIG. 1 is a schematic block diagram of a 400KHz channel engine of the present invention;
FIG. 2 is a schematic block diagram of the modulation of digital signals of audio, sub-audio, MSK data onto digital 400KHz carrier frequency signals according to the present invention;
FIG. 3 is a schematic block diagram of a digital signal of audio, sub-audio and MSK data obtained by down-conversion demodulation of a digital 400KHz carrier frequency signal according to the present invention;
FIG. 4 is a schematic block diagram of 400KHz radio frequency signal generation of the present invention;
fig. 5 is a schematic block diagram of demodulation of a 400KHz radio frequency signal in accordance with the present invention.
Detailed Description
For a further understanding of the structure, features, and other objects of the invention, reference should now be made in detail to the accompanying drawings of the preferred embodiments of the invention, which are illustrated in the accompanying drawings and are for purposes of illustrating the concepts of the invention and not for limiting the invention.
As shown in fig. 1, fig. 1 is a schematic block diagram of a 400KHz channel engine of the present invention; the 400KHz channel machine comprises a secondary development interface 1, a main control unit 2, an FPGA radio frequency modulation demodulation unit 3, a radio frequency signal receiving and transmitting unit 4, a transmitting power control detection unit 5, a temperature detection unit 6 and a power supply unit 7; the secondary development interface 1 is connected with the main control unit 2, and the secondary development interface 1 is used for operating the 400KHz channel machine; the main control unit 2 is connected with the FPGA radio frequency modulation and demodulation unit 3 through a UART interface, the FPGA radio frequency modulation and demodulation unit 3 is connected with the radio frequency signal receiving and transmitting unit 4, the radio frequency signal receiving and transmitting unit 4 is connected with the transmitting power control detection unit 5 and the antenna interface, and the transmitting power control detection unit 5 is connected with the main control unit 2 through an IIC interface; the main control unit 2 is connected with the temperature detection unit 6 through a UART interface, and the temperature detection unit 6 is used for monitoring the temperature in the 400KHz channel machine; the power supply unit 7 is externally connected with a DC13.8V power supply through a power supply interface and is used for converting DC13.8V power supply into DC 3.3V power supply to provide working voltage for the 400KHz channel machine.
The main control unit is a central hub of the channel machine and is responsible for connecting each component unit of the equipment, and communicating with each component unit according to a specified protocol interface; analyzing and processing voice and data information transmitted by a communication link, and forwarding according to a set function; responding to the control instruction acquired by the secondary development interface, and the like.
The main control unit is constructed based on an ARM Cortex-M4 kernel microprocessor, has the efficiency of 1.25DMIPS/MHz, is provided with a 3-level pipeline, a plurality of 32-bit bus interfaces and a clock rate of up to 200MHz, has saturated operation and SIMD instructions optimized especially for processing DSP algorithm, has rich expansion functions, is an embedded microprocessor with high speed and low power consumption, and is especially suitable for embedded development and application environments.
The main functions of the main control unit are as follows:
1) Based on UART interface, realize the serial port data communication with the master control board of the locomotive radio station, realize functions such as receiving and dispatching of MSK data, parameter inquiry and setting, etc.; the serial port data communication with the frequency transmission software is realized, the parameter inquiry and the setting of the channel machine are realized, and the functions of upgrading the channel machine software and the like are realized.
2) Based on the GPIO interface, the communication with the main control board of the locomotive radio station is realized, the emission of the control channel machine of the main control board of the locomotive radio station is realized, and the sub-audio frequency is generated by the control channel machine; the function that the channel machine receives carrier frequency and sub-audio frequency to inform the main control board of the locomotive radio station is realized.
3) Based on the DSP audio frequency analog-digital-analog processing technology, the function of converting analog voice of the main control board of the receiving locomotive radio station into digital voice signals and sending the digital voice signals to the FPGA radio frequency modulation-demodulation unit is realized, and the function of converting digital voice signals demodulated by the FPGA radio frequency modulation-demodulation unit into analog voice signals and sending the analog voice signals to the main control board of the locomotive radio station is realized.
4) Based on UART interface, realize with FPGA radio frequency modulation demodulation unit communication, realize the modulation demodulation function of digital signal such as pronunciation, sub-audio frequency and MSK data.
Based on the high-speed ARM data processing technology, digital signals such as voice, sub-audio frequency, MSK data and the like generated by the main control unit are sent to the FPGA radio frequency modulation demodulation unit for modulation, and wireless transmission is carried out.
Based on DSP audio digital processing technology, audio digital signals demodulated by the FPGA radio frequency modulation demodulation unit are sent to the locomotive radio station main control unit for processing through the secondary development interface after analog-digital conversion, so that the conversation function between the locomotive radio station and wireless terminal equipment such as the locomotive radio station and the station radio station is realized.
Based on the Goretzel algorithm, the subaudio digital signals demodulated by the FPGA radio frequency modulation demodulation unit are sent to the main control unit for subaudio identification, so that the high-efficiency and rapid subaudio signal software decoding function is realized, the requirement of higher subaudio decoding bandwidth precision is met, the manufacturing cost of equipment is reduced, the reliability of subaudio communication is improved, and the requirements of signaling calls among locomotive radio stations, among station radio stations and other wireless terminal equipment are met.
Based on a 1Bit differential MSK signal software decoding technology, an accurate MSK signal decoding function is realized. MSK data decoded by the main control unit is sent to a main control board of a locomotive radio station for processing through a UART serial interface of the secondary development interface. MSK data communication meets the communication requirement of the safety protection device at the tail of the railway train.
5) Based on the IIC interface, the self-protection device realizes communication with a transmitting power control detecting unit, realizes functions of channel machine transmitting power adjustment and real-time transmitting power detection, and realizes a self-protection function of stopping transmitting when the transmitting power of the channel machine is abnormal.
6) Based on UART interface, realize with temperature detection unit's communication, realize the monitoring to the built-in temperature of channel machine, when realizing that the temperature is too high, stop the self-protection function of transmission.
The FPGA radio frequency modulation-demodulation unit 3 includes a modulation module and a demodulation module, which modulate or demodulate the audio digital signal, the sub-audio digital signal, and the MSK data digital signal through a digital oscillator. The radio frequency signal transceiver unit 4 includes a radio frequency signal generating module and a radio frequency signal demodulating module, which generate or demodulate radio frequency signals through a digital oscillator.
Referring to fig. 2, fig. 2 is a schematic block diagram of the audio, sub-audio, MSK data digital signal modulated onto a digital 400KHz carrier frequency signal according to the present invention; the modulation module comprises a differential encoder 31 with one input and one output, a serial-parallel conversion chip 32 with one input and two outputs, a first numerical control oscillator 33, a second numerical control oscillator 34, four AND gates with two inputs and one output, and an exclusive-OR gate with two inputs and one output; one output of the differential encoder 31 is connected to the serial-parallel conversion chip 32, two outputs of the serial-parallel conversion chip 32 are respectively connected to one input of the first and second and gates, the other inputs of the first and second and gates are connected to the first digital controlled oscillator 33, the output of the first and gate is connected to one input of the third and gate, the output of the second and gate is connected to one input of the fourth and gate, the other inputs of the third and fourth and gate are connected to the second digital controlled oscillator 34, and one output of the third and fourth and gate is connected to the first exclusive-or gate to realize modulation of audio, sub-audio and MSK data digital signals to digital 400KHz carrier frequency signals.
Digital signals such as audio, sub-audio, MSK data and the like are subjected to digital signal compression coding by adopting differential coding so as to improve the transmission efficiency of the digital signals. The differential coding method is to recode by using the difference between the current data bit and the previous data bit, i.e. input b k Output a k The previous data bit output a k -1,a k -1 over a sampling period T s Delayed and current input b k Exclusive-or is carried out to obtain the current output a k I.e. a k ＝a k -1⊕b k 。
The serial-parallel conversion realizes that each sampling period Ts carries out alternating assignment on the two channels I and Q, namely digital signals such as audio, sub-audio, MSK data and the like are respectively divided into two paths of signals, and the two paths of signals are respectively modulated with two paths of orthogonal carrier frequency signals. I is in-phase and Q is quadrature.
Based on the CORDIC algorithm, the NCO circuit generates two paths of orthogonal sine and cosine carrier frequency digital signals. The two paths of audio, sub-audio and MSK data digital signals are respectively modulated with the two paths of orthogonal carrier frequency signals twice.
Finally, the I, Q signals are combined into one path through exclusive OR logic circuits and the like and sent to the radio frequency receiving and transmitting unit for wireless transmission, so that the reliability of communication is improved.
Referring to fig. 3, fig. 3 is a schematic block diagram of a digital 400KHz carrier frequency signal down-conversion demodulation to obtain audio, sub-audio, MSK data digital signals according to the present invention; the demodulation module comprises a third numerically controlled oscillator 35, a fourth numerically controlled oscillator 36, a first low-pass filter 37, a second low-pass filter 38, a loop filter 39, a first integral decision circuit 310, a second integral decision circuit 311, a first delay circuit 312, five AND gates with two inputs and one output, and an exclusive-OR gate with two inputs and one output; the third numerically controlled oscillator 35 is connected with one input of a fifth and sixth and gate respectively, the output of the fifth and gate is connected with the first low-pass filter 37, the first low-pass filter 37 is connected with one input of a seventh and gate, the output of the sixth and gate is connected with the second low-pass filter 38, the second low-pass filter 38 is connected with one input of an eighth and gate, the other inputs of the seventh and eighth and gate are connected with the fourth numerically controlled oscillator 36, the output of the seventh and gate is connected with the second exclusive-OR gate through the first integration decision circuit 310, the output of the eighth and gate is connected with the second exclusive-OR gate through the second integration decision circuit 311 and the first delay circuit 312, so as to realize down-conversion demodulation of audio, sub-audio and MSK data digital signals by digital 400KHz carrier frequency signals; the outputs of the seventh and eighth and gates are also connected to a ninth and gate, the output of which is connected to the third and fourth numerically controlled oscillators 35, 36 through a loop filter 39 to achieve carrier synchronization.
The carrier frequency signal received by the radio frequency signal receiving and transmitting unit is converted into a digital signal by the ADC circuit, and then the digital frequency modulation input signal is generated.
The digital frequency modulation input signal is demodulated with two paths of orthogonal carrier frequency digital signals twice. And filtering is carried out between the two carrier frequency digital signals by adopting an Equiripple digital FIR low-pass filter, so that high-frequency interference signals in the digital frequency modulation input signals are removed, and the down-conversion demodulation of the digital frequency modulation input signals is realized through twice carrier frequency demodulation, thereby obtaining sampling signals of digital signals such as audio, sub-audio, MSK data and the like.
The integration decision is divided into an integrator and a decision device, and the integrator integrates each data bit in a complete sampling period to obtain a complete data bit signal. The decision device adopts a zero crossing judgment mode to realize the judgment of each bit of digital signal 1 or 0. The Q paths of digital signals are subjected to delay of one sampling period and are subjected to exclusive OR combination with the I paths of digital signals to form one path of output, so that demodulation output of digital signals such as audio, sub-audio, MSK data and the like is realized.
The loop filter is adopted, and the dynamic balance of a demodulation loop is realized by carrying out high-frequency error component attenuation on the output end signal of the carrier frequency numerical control oscillator, so that stable and reliable synchronous output of the 400KHz carrier wave is realized.
Referring to fig. 4, fig. 4 is a schematic block diagram of 400KHz radio frequency signal generation in accordance with the present invention; the radio frequency signal generating module comprises a fifth numerical control oscillator 41, an FM digital modulator 42 and a phase accumulator 43; the FM digital modulation 42 is input to the FM digital input signal, and the modulation index of the FM digital modulation is k=1.67, so as to realize frequency presetting and adjustment of the carrier frequency digital signal. The FM digital modulation 42 is output to the phase accumulator 43, the phase accumulator adds the input signal and the static frequency control word under the control of the system clock, the obtained signal is fed back to the accumulator input on one hand, and output to the waveform memory on the other hand to generate corresponding waveform data, the signal obtained by the phase accumulator is output to the fifth digital controlled oscillator 41, and the fifth digital controlled oscillator adopts the CORDIC algorithm to generate two paths of orthogonal digital carrier signals, so as to realize the generation of the 400KHz radio frequency signal.
The 400KHz digital channel machine adopts FM digital modulation mode, and realizes the functions of improving communication capacity, reducing antenna size and improving signal anti-interference capability.
The FPGA generates a frequency modulated input signal with a sampling frequency fs=48 KHz. The frequency modulated input signal is sent to FM modulation for frequency modulation digital processing, and the frequency modulation index k=Δfm/f=1.67, i.e. the ratio of the maximum frequency offset Δfm to the frequency F of the modulated signal is 1.67.
After FM modulation, the signal is sent to a phase accumulator, the phase accumulator adds the initial phase and the frequency control word under the control of the system clock, the added result is sent to the input end of the phase accumulator, the phase accumulator feeds back the new phase data generated after the previous clock period to the input end of the phase accumulator, and the phase accumulator continues to add with the frequency control word under the next clock, and on the other hand, the value is sent to a waveform memory as a sampling address, and the waveform memory outputs corresponding waveform data according to the address. The waveform data is sent to a digital waveform generator based on a CORDIC algorithm to generate two orthogonal sine and cosine output data sequences, namely two orthogonal carrier frequency digital signals.
The sampling frequency of carrier frequency digital signals generated by the FPGA is fs=1536KHz, and the signals are converted into analog 400KHz signals by the DAC circuit of the radio frequency signal receiving and transmitting unit for wireless transmission.
Referring to fig. 5, fig. 5 is a schematic block diagram of demodulation of a 400KHz radio frequency signal according to the present invention; the rf signal demodulation module includes a sixth digitally controlled oscillator 44, a first decimation filter 45, a second decimation filter 46, a third decimation filter 47, a fourth decimation filter 48, a first channel filter 49, a second channel filter 410, a second delay circuit 411, a third delay circuit 412, an output filter 413, four and gates having two inputs and one output, and an exclusive or gate having two inputs and one output; the sixth numerically controlled oscillator 44 is connected to one input of an eleventh and twelfth and gates, respectively, one output of the eleventh and gate sequentially passes through the first decimation filter 45, the third decimation filter 47, and the first channel filter 49, one input of the first channel filter 49 is connected to the thirteenth and gate and the second delay circuit 411, respectively, and the second delay circuit 411 is connected to the fourteenth and gate; one output of the twelfth AND gate sequentially passes through the second decimation filter 46, the fourth decimation filter 48 and the second channel filter 410, one input of the second channel filter 410 is respectively connected with the fourteenth AND gate and the third delay circuit 412, and the third delay circuit 412 is connected with the thirteenth AND gate; the thirteenth and fourteenth AND gates are connected with a third exclusive-or gate, which is connected with an output filter 413 to realize demodulation of the 400KHz radio frequency signal.
The carrier frequency signal received by the radio frequency signal receiving and transmitting unit is converted into a digital signal by the ADC circuit, and then the digital carrier frequency signal with the sampling period of fs=1536KHz is generated.
An NCO circuit is adopted to divide an input digital carrier frequency signal into two orthogonal signals for demodulation. The two paths of signals are filtered and extracted by two stages of extraction filters respectively, and then carrier frequency signals with sampling period of Fs=48 KHz are obtained. The decimation multiples of the two-stage decimation filter are 4 times and 8 times respectively. The extraction filter adopts an equipple digital FIR filter, the amplitude-frequency response of the filter is equal ripple in the pass band and the stop band, the ripple amplitude of the pass band and the stop band can be controlled respectively, the minimization of the carrier frequency signal weighting error ripple amplitude is realized, and the filter is a low-pass digital filter with excellent performance.
And a channel filter is adopted, the passband bandwidth of the filter is 8KHz, and the amplitude-frequency characteristic is 0.1db, so that the function of filtering out-of-band interference signals is realized.
Both signals adopt one path of carrier frequency digital signal and the other path of carrier frequency digital signal delayed by one sampling period Ts for AND operation. The two paths of signals are combined into one path through exclusive or operation, carrier frequency digital signals with sampling frequency of Fs=48 KHz are demodulated, the signals are filtered by an output filter again, and finally the demodulation of the carrier frequency digital signals is realized.
The FPGA demodulates the carrier frequency digital signal, then carries out identification, and informs the main control unit CPU of the identification result.
Reception and transmission of audio signals
Analog audio signals input by the secondary development interface are subjected to ADC sampling processing through the main control unit, namely, after the audio signals are digitized, the audio signals are modulated onto 400KHz frequency points through an NCO of the FPGA radio frequency modulation demodulation unit, then DAC processing is performed through a high-speed DAC chip of the radio frequency transceiver unit to obtain radio frequency signals, and the radio frequency signals are output to the radio frequency power amplifier to be subjected to transmitting power adjustment and then are transmitted to the 400KHz antenna to be wirelessly transmitted.
The 400KHz radio frequency signal received by the antenna is subjected to ADC sampling by the radio frequency transceiver unit, then is sent to the FPGA radio frequency modulation and demodulation unit for digital down-conversion processing, a digital audio signal is obtained after demodulation, is sent to the main control unit for DAC processing, an analog audio signal is obtained, and the analog audio signal is sent to the secondary development interface for audio output.
Receiving and transmitting sub-audio signals
The user presets the sub-audio frequency sent and received by the 400KHz digital channel machine through UART serial data communication of the secondary development interface. The method comprises the steps of generating a sub-audio digital signal by a main control unit of a 400KHz digital channel machine through a sub-audio control transmitting end of a control secondary development interface, modulating the sub-audio digital signal to a 400KHz frequency point through an NCO of an FPGA radio frequency modulation demodulation unit, performing DAC processing through a high-speed DAC chip of a radio frequency receiving and transmitting unit to obtain a radio frequency signal, outputting the radio frequency signal to a radio frequency power amplifier to adjust transmitting power, and then transmitting the radio frequency signal to a 400KHz antenna to perform wireless transmission.
And after the 400KHz radio frequency signal received by the antenna is subjected to ADC sampling by the radio frequency receiving and transmitting unit, the signal is sent to the FPGA radio frequency modulation and demodulation unit for digital down-conversion treatment, a digital sub-audio signal is obtained after demodulation, the signal is sent to the main control unit and is calculated by the Goretzel algorithm, whether the received sub-audio frequency is the preset sub-audio frequency is identified, and if the received sub-audio frequency is the preset sub-audio frequency, a user is informed by the sub-audio receiving detection end of the secondary development interface.
Reception and transmission of MSK signal data
The train tail command data generated by the locomotive radio station is sent to the main control unit through a UART serial port of the secondary development interface, the main control unit generates corresponding MSK digital signals, the MSK digital signals are modulated onto 400KHz frequency points through an NCO of the FPGA radio frequency modulation demodulation unit, then DAC processing is carried out through a high-speed DAC of the radio frequency receiving and sending unit to obtain radio frequency signals, the radio frequency signals are output to a radio frequency power amplifier to carry out transmitting power adjustment, and then the radio frequency signals are sent to a 400KHz antenna to carry out wireless transmission.
After the 400KHz radio frequency signal received by the antenna is subjected to ADC sampling by the radio frequency receiving and transmitting unit, the signal is sent to the FPGA radio frequency modulation demodulation unit for digital down conversion, an MSK digital signal is generated, the signal is sent to the main control unit for 1Bit differential MSK signal software decoding, and after the signal is decoded by the UART serial port of the secondary development interface, the train tail response data is sent to the main control board of the locomotive radio station for processing.
In summary, the invention adopts a high-speed FPGA chip based on the radio frequency signal software modulation and demodulation technology to realize the digital processing of the radio frequency signals of the channel machine, improves the anti-interference capability of communication, improves the communication efficiency of the channel machine, and is particularly suitable for the communication requirement of heavy-duty trains in complex environments; based on Goretzel algorithm, a stable and reliable ARM chip is adopted to realize the efficient and rapid sub-audio signal software decoding function. The requirement of call signaling decoding in railway communication is met. The Goretzel algorithm simultaneously meets the higher requirement of sub-audio decoding bandwidth precision, and a special sub-audio encoding and decoding chip is not needed, so that the cost of equipment is greatly reduced, and the calling success rate is improved; based on a 1Bit differential MSK signal software decoding technology, a stable and reliable ARM chip is adopted to realize an accurate MSK signal decoding function and meet the communication requirement of a safety protection device at the tail of a railway train.
It should be noted that the foregoing summary and the detailed description are intended to demonstrate practical applications of the technical solution provided by the present invention, and should not be construed as limiting the scope of the present invention. Various modifications, equivalent alterations, or improvements will occur to those skilled in the art, and are within the spirit and principles of the invention. The scope of the invention is defined by the appended claims.
Claims (4)
1. The 400KHz channel machine based on software digital processing is characterized by comprising a secondary development interface (1), a main control unit (2), an FPGA radio frequency modulation demodulation unit (3), a radio frequency signal receiving and transmitting unit (4), a transmitting power control detection unit (5), a temperature detection unit (6) and a power supply unit (7); wherein,
the secondary development interface (1) is connected with the main control unit (2), and the secondary development interface (1) is used for operating the 400KHz channel machine;
the main control unit (2) is connected with the FPGA radio frequency modulation and demodulation unit (3) through a UART interface, the FPGA radio frequency modulation and demodulation unit (3) is connected with the radio frequency signal receiving and transmitting unit (4), the radio frequency signal receiving and transmitting unit (4) is respectively connected with the transmitting power control detection unit (5) and the antenna interface, and the transmitting power control detection unit (5) is connected with the main control unit (2) through an IIC interface;
the main control unit (2) is connected with the temperature detection unit (6) through a UART interface, and the temperature detection unit (6) is used for monitoring the temperature in the 400KHz channel machine;
the power supply unit (7) is externally connected with a DC13.8V power supply through a power supply interface and is used for converting DC13.8V power supply into DC 3.3V power supply to provide working voltage for the 400KHz channel machine;
the FPGA radio frequency modulation and demodulation unit (3) comprises a modulation module and a demodulation module;
the modulation module comprises a differential encoder (31) with one input and one output, a serial-parallel conversion chip (32) with one input and two outputs, a first numerical control oscillator (33), a second numerical control oscillator (34), four AND gates with two inputs and one output and an exclusive-OR gate with two inputs and one output; one output of the differential encoder (31) is connected with a serial-parallel conversion chip (32), two outputs of the serial-parallel conversion chip (32) are respectively connected with one input of a first AND gate and one input of a second AND gate, the other inputs of the first AND gate and the second AND gate are connected with a first numerical control oscillator (33), the output of the first AND gate is connected with one input of a third AND gate, the output of the second AND gate is connected with one input of a fourth AND gate, the other inputs of the third AND gate and the fourth AND gate are connected with a second numerical control oscillator (34), and one output of the third AND gate and the fourth AND gate is connected with a first exclusive-OR gate so as to realize audio, sub-audio and MSK data digital signals to be modulated on digital 400KHz carrier frequency signals;
the demodulation module comprises a third numerical control oscillator (35), a fourth numerical control oscillator (36), a first low-pass filter (37), a second low-pass filter (38), a loop filter (39), a first integral decision circuit (310), a second integral decision circuit (311), a first delay circuit (312), five AND gates with two inputs and one output, and an exclusive-OR gate with two inputs and one output; the third numerical control oscillator (35) is respectively connected with one input of a fifth AND gate and one input of a sixth AND gate, the output of the fifth AND gate is connected with a first low-pass filter (37), the first low-pass filter (37) is connected with one input of a seventh AND gate, the output of the sixth AND gate is connected with a second low-pass filter (38), the second low-pass filter (38) is connected with one input of an eighth AND gate, the other inputs of the seventh AND gate and the eighth AND gate are connected with a fourth numerical control oscillator (36), the output of the seventh AND gate is connected with a second exclusive-OR gate through a first integral decision circuit (310), and the output of the eighth AND gate is connected with the second exclusive-OR gate through a second integral decision circuit (311) and a first delay circuit (312) so as to realize down-conversion demodulation of digital 400KHz carrier frequency signals into audio, sub-audio and MSK data digital signals; the output of the seventh AND gate and the eighth AND gate are also connected to a ninth AND gate, and the output of the ninth AND gate is connected with a third numerical control oscillator (35) and a fourth numerical control oscillator (36) through a loop filter (39) so as to realize carrier synchronization.
2. The 400KHz channel machine of claim 1, in which the radio frequency signal transceiving unit (4) comprises a radio frequency signal generating module and a radio frequency signal demodulating module that generate or demodulate radio frequency signals via a digital oscillator.
3. The 400KHz channel machine of claim 2, in which the radio frequency signal generation module comprises a fifth digitally controlled oscillator (41), an FM digital modulation (42) and a phase accumulator (43); the frequency modulation input signal is input to an FM digital modulator (42) for realizing frequency presetting and adjustment of a carrier frequency digital signal; the FM digital modulation (42) is output to the phase accumulator (43) so as to enable the input signal to be added with the static frequency control word, one path of the FM digital modulation is output to the waveform memory to generate corresponding waveform data, and the other path of FM digital modulation is output to the fifth numerical control oscillator (41) to generate two paths of orthogonal digital carrier signals by adopting a CORDIC algorithm, so that the generation of the 400KHz radio frequency signal is realized.
4. The 400KHz channel machine of claim 2, the radio frequency signal demodulation module comprising a sixth digitally controlled oscillator (44), a first decimation filter (45), a second decimation filter (46), a third decimation filter (47), a fourth decimation filter (48), a first channel filter (49), a second channel filter (410), a second delay circuit (411), a third delay circuit (412), an output filter (413), four and gates having two inputs and one output, and an exclusive or gate having two inputs and one output; the sixth numerical control oscillator (44) is respectively connected with one input of an eleventh AND gate and one input of a twelfth AND gate, one output of the eleventh AND gate sequentially passes through the first decimation filter (45), the third decimation filter (47) and the first channel filter (49), one input of the first channel filter (49) is respectively connected with the thirteenth AND gate and the second delay circuit (411), and the second delay circuit (411) is connected with the fourteenth AND gate; one output of the twelfth AND gate sequentially passes through a second decimation filter (46), a fourth decimation filter (48) and a second channel filter (410), one input of the second channel filter (410) is respectively connected with the fourteenth AND gate and a third delay circuit (412), and the third delay circuit (412) is connected with the thirteenth AND gate; the thirteenth AND gate and the fourteenth AND gate are connected with a third exclusive-OR gate, and the third exclusive-OR gate is connected with an output filter (413) to realize demodulation of the 400KHz radio-frequency signal.
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| CN109495420B (en) * | 2019-01-03 | 2024-03-08 | 泉州市铁通电子设备有限公司 | Digital channel machine with CSBK transmission function |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101610095A (en) * | 2009-05-12 | 2009-12-23 | 北京航空航天大学 | A kind of ultra-wideband radio frequency digital receiver device and its implementation based on FPGA |
| CN201499172U (en) * | 2009-04-15 | 2010-06-02 | 北京北广科技股份有限公司 | Frequency modulation digital exciter based on FPGA |
| CN102195666A (en) * | 2011-04-14 | 2011-09-21 | 西安烽火电子科技有限责任公司 | VHF/UHF-band broadband high-speed data transmission platform |
| CN202491816U (en) * | 2011-12-23 | 2012-10-17 | 河南蓝信科技有限公司 | Safety protection system for railway shunting service |
| CN204304936U (en) * | 2014-12-31 | 2015-04-29 | 陕西烽火电子股份有限公司 | A kind of rf power amplifier circuit being applied to ultrashort wave radio set |
| CN107508617A (en) * | 2017-09-26 | 2017-12-22 | 洪清喜 | A kind of cab integrated radio communication of 450MHz DA compatibilities |
| CN207835433U (en) * | 2018-03-02 | 2018-09-07 | 泉州市铁通电子设备有限公司 | A kind of 400KHz channel devices based on software digital processing |
-
2018
- 2018-03-02 CN CN201810174453.4A patent/CN108183715B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201499172U (en) * | 2009-04-15 | 2010-06-02 | 北京北广科技股份有限公司 | Frequency modulation digital exciter based on FPGA |
| CN101610095A (en) * | 2009-05-12 | 2009-12-23 | 北京航空航天大学 | A kind of ultra-wideband radio frequency digital receiver device and its implementation based on FPGA |
| CN102195666A (en) * | 2011-04-14 | 2011-09-21 | 西安烽火电子科技有限责任公司 | VHF/UHF-band broadband high-speed data transmission platform |
| CN202491816U (en) * | 2011-12-23 | 2012-10-17 | 河南蓝信科技有限公司 | Safety protection system for railway shunting service |
| CN204304936U (en) * | 2014-12-31 | 2015-04-29 | 陕西烽火电子股份有限公司 | A kind of rf power amplifier circuit being applied to ultrashort wave radio set |
| CN107508617A (en) * | 2017-09-26 | 2017-12-22 | 洪清喜 | A kind of cab integrated radio communication of 450MHz DA compatibilities |
| CN207835433U (en) * | 2018-03-02 | 2018-09-07 | 泉州市铁通电子设备有限公司 | A kind of 400KHz channel devices based on software digital processing |
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|---|---|
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