CN108182155A - It is a kind of reduce cost manage M.2 back plate design method - Google Patents
It is a kind of reduce cost manage M.2 back plate design method Download PDFInfo
- Publication number
- CN108182155A CN108182155A CN201810099602.5A CN201810099602A CN108182155A CN 108182155 A CN108182155 A CN 108182155A CN 201810099602 A CN201810099602 A CN 201810099602A CN 108182155 A CN108182155 A CN 108182155A
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- CN
- China
- Prior art keywords
- design method
- back plate
- reduce cost
- plate design
- mainboard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
Abstract
The present invention relates to hardware circuit design field, more particularly to it is a kind of reduce cost manage M.2 back plate design method.M.2 backboard takes the improved design method that electricity is taken from mainboard for this, saves independent Power input interfaces and two groups of DC DC conversion lines, reduces cost;To M.2SSD communicate simultaneously by POWER/SIGNAL integrated interfaces in Energy Saving Control signal/I2C signals (containing M.2 signal/alarm signal/temperature information in place/M.2 producer's model etc.) with mainboard PCH and BMC, M.2SSD state instruction/temperature monitoring/Energy Saving Control/asset management information such as indicates at the management functions for realization.
Description
Technical field
The present invention relates to hardware circuit design field, more particularly to it is a kind of reduce cost manage M.2 back plate design side
Method.
Background technology
M.2 interface is the interface specification of new generation that Intel is released, and can support the number of SATA 6G and PCIE Gen3 8G
According to transmission, extensive use is able to due to it has many advantages, such as that small, transmission rate is fast.
M.2 the hard disk of interface is typically used as system disk, relative to traditional mechanical hard disk, is based on SATA or PCIE technologies
Transmission system running speed is greatly promoted.
Usually, M.2 back plate design has three categories signal to need to consider:Power powers, SATA/PCIE high-speed datas
M.2, line manages/controls signal (sideband signals and I2C signals).In current design, Power power supplies, which generally use, independently to be connect
Mouthful, it is introduced by cable from Power conversion board, because these power interfaces are commonly designed for powering to SAS backboards, therefore is usually
P12V and P5V outputs.And M.2 two groups of power supplies of demand are P3V3 and P1V8, if using this power supply mode, are needed M.2
P12V (or P5V) is converted to by P3V3 and P1V8 by DC-DC circuits on backboard, i.e., needed on M.2 backboard 1 it is independent
Power input interface (being connect by cable with power panel) and P12V (or P5V) are converted to the VR circuits of P3V3 and P1V8.This
Kind scheme is relative complex and Material Cost is higher, structure space exclusive board small particularly to size, undoubtedly will be very big
Increase design difficulty.
Description of the drawings
M.2 back plate design block diagram before Fig. 1 improvement
The improved design frame charts of Fig. 2
The improved integrated interface Pin definition of Fig. 3
Invention content
The present invention, which proposes a kind of cost that reduces, can simultaneously manage the back plate design method of M.2 port, by changing backboard
The input mode of power simplifies design, achievees the purpose that reduce cost.Meanwhile the backboard supports management characteristic, is advised in technology
It is suitable with similar backboard in terms of lattice.In addition, the program has stronger versatility, available for other, M.2 port number backboard is set
Meter.
The scheme of the invention is be achieved, it is a kind of reduce cost manage M.2 back plate design method, feature exists
In:Directly M.2 port is powered from mainboard, without additional voltage conversion circuit.
Preferably, it is same interface that this method, which further includes and integrates power and supervisory control signals,.
Preferably, by mainboard PCH and M.2 between sideband signals, mainboard BMC and M.2 between I2C signals connect
It is logical, realize management function M.2.
Preferably, PCH and M.2 between sideband signals realize M.2 power saving function for controlling.
Preferably, BMC and M.2 between linked by I2C circuits, be used for transmission backboard end comprising temperature monitoring information,
M.2SSD information in place, alert information and the M.2 information of producer/model.
Specific embodiment
The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.Following embodiment is only used for clearer
Ground illustrates technical scheme of the present invention, and is not intended to limit the protection scope of the present invention and limits the scope of the invention.
In the prior art, M.2 power supply source is derived from power panel, and SAS hard disks are supported because power panel output interface is usually compatible,
Therefore power supply output is usually P12V and P5V, and M.2 demand power supply is P3V3 and P1V8, needs to pass through DC-DC on M.2 backboard
P12V (or P5V) is converted to P3V3 and P1V8 by circuit, i.e., it is (logical that 1 independent power input interface is needed on M.2 backboard
Cable is crossed to connect with power panel) and P12V (or P5V) be converted to the DC-DC circuits of P3V3 and P1V8, designing scheme is relatively multiple
Miscellaneous and Material Cost is higher.If board there are the requirement that structure space limits, because program material is using more, also brings along and sets
Count the increase of difficulty.Specific implementation topology is as shown in Figure 1.
In the embodiment of the present invention, change the source M.2 to power, by the way of the P3V3 and P1V8 that directly powers from mainboard.
The interface of former M.2 supervisory control signals is borrowed, increases the pin. of transmission P3V3 and P1V8 as described above, P3V3 maximums 5A, P1V8
It not higher than 100mA, is calculated according to the resistance to flow valuve of every pin 1A, P3V3 uses 5pin, P1V8 to use 1pin, in addition corresponding reflux ground
Pin, power part amount to 12PIN;Control pin is managed simultaneously includes Energy Saving Control signal 4pin (each M.2 2pin, containing 2
M.2 equipment), I2C signals 4pin (each M.2 2pin, containing 2 M.2 equipment), i.e., the interface of 20pin can be realized in total
Power directly takes the transmission with supervisory control signals.As shown in Figures 2 and 3.The scheme of the embodiment of the present invention is included directly from mainboard
To M.2 power supply and realize to two parts of management function M.2.
Clearly to illustrate the realization situation of the design method, illustrate to realize step with reference to Fig. 2 and Fig. 3.It is specific as follows:
1) mainboard end PCH SATA signals are connected to M.2 backboard SATA interface by SATA cables, by PCB trace with
M.2 orifice realizes SATA signal transmissions;
2) M.2 the P3V3 and P1V8 of backboard demand directly take electric (as shown in Figure 3) by cable from mainboard end, no longer use
The mode of electricity is taken from power panel, i.e., no longer needs designs of the P12V (or P5V) by VR line transfers to P3V3 and P1V8, is saved
Cost;
3) using and 2) same interface and cable, by mainboard PCH and M.2 between sideband signals, mainboard BMC with M.2 it
Between I2C signals connected, realize management function M.2.The former PCH and M.2 between sideband signals realized M.2 for controlling
Power saving function;The latter I2C signals are then used to M.2 hard disk information/warning information in place/FRU information/temperature monitoring information to transmit
To BMC, BMC realizes management function by parsing I2C signal acquisitions above- mentioned information and being shown to user.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement made within refreshing and principle etc., should all be included in the protection scope of the present invention.
Claims (5)
1. it is a kind of reduce cost manage M.2 back plate design method, it is characterised in that:Directly M.2 port is carried out from mainboard
Power supply, without additional voltage conversion circuit.
2. it is according to claim 1 reduce cost manage M.2 back plate design method, it is characterised in that:This method is also
It is same interface including integrating power and supervisory control signals.
3. it is according to claim 2 reduce cost manage M.2 back plate design method, it is characterised in that:By mainboard PCH
With M.2 between sideband signals, mainboard BMC with M.2 between I2C signals connected, realize management function M.2.
4. it is according to claim 3 reduce cost manage M.2 back plate design method, it is characterised in that:PCH with M.2
Between sideband signals realize M.2 power saving function for controlling.
5. it is according to claim 3 reduce cost manage M.2 back plate design method, it is characterised in that:BMC and M.2
Between linked by I2C circuits, be used for transmission backboard end comprising temperature monitoring information, information in place M.2SSD, alert letter
Breath and the M.2 information of producer/model.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201810099602.5A CN108182155A (en) | 2018-01-31 | 2018-01-31 | It is a kind of reduce cost manage M.2 back plate design method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201810099602.5A CN108182155A (en) | 2018-01-31 | 2018-01-31 | It is a kind of reduce cost manage M.2 back plate design method |
Publications (1)
Publication Number | Publication Date |
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CN108182155A true CN108182155A (en) | 2018-06-19 |
Family
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CN201810099602.5A Pending CN108182155A (en) | 2018-01-31 | 2018-01-31 | It is a kind of reduce cost manage M.2 back plate design method |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109992074A (en) * | 2019-04-16 | 2019-07-09 | 苏州浪潮智能科技有限公司 | It is a kind of to support U.2 standard and the U.3 backboard of standard |
TWI768881B (en) * | 2021-05-07 | 2022-06-21 | 慧榮科技股份有限公司 | Sideband signal adjustment system and method thereof, and storage device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104345827A (en) * | 2013-08-05 | 2015-02-11 | 鸿富锦精密电子(天津)有限公司 | Power supply system of server |
CN204374831U (en) * | 2014-12-24 | 2015-06-03 | 环旭电子股份有限公司 | Function slot and use the mainboard of this function slot |
CN204706021U (en) * | 2015-06-24 | 2015-10-14 | 浪潮电子信息产业股份有限公司 | A kind of memory node improving ease for maintenance |
CN105701044A (en) * | 2014-11-28 | 2016-06-22 | 鸿富锦精密工业(武汉)有限公司 | Electronic device |
-
2018
- 2018-01-31 CN CN201810099602.5A patent/CN108182155A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104345827A (en) * | 2013-08-05 | 2015-02-11 | 鸿富锦精密电子(天津)有限公司 | Power supply system of server |
CN105701044A (en) * | 2014-11-28 | 2016-06-22 | 鸿富锦精密工业(武汉)有限公司 | Electronic device |
CN204374831U (en) * | 2014-12-24 | 2015-06-03 | 环旭电子股份有限公司 | Function slot and use the mainboard of this function slot |
CN204706021U (en) * | 2015-06-24 | 2015-10-14 | 浪潮电子信息产业股份有限公司 | A kind of memory node improving ease for maintenance |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109992074A (en) * | 2019-04-16 | 2019-07-09 | 苏州浪潮智能科技有限公司 | It is a kind of to support U.2 standard and the U.3 backboard of standard |
TWI768881B (en) * | 2021-05-07 | 2022-06-21 | 慧榮科技股份有限公司 | Sideband signal adjustment system and method thereof, and storage device |
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Application publication date: 20180619 |