CN108182155A - It is a kind of reduce cost manage M.2 back plate design method - Google Patents

Abstract

The invention relates to the field of hardware circuit design, in particular to a manageable M.2 backplane design method with reduced cost. The M.2 backplane adopts an improved design method of taking power from the main board, which saves an independent Power input interface and two sets of DC-DC conversion lines, reducing costs; Signal/I2C signal (including M.2 in-position signal/alarm signal/temperature information/M.2 manufacturer model, etc.) communicates with the motherboard PCH and BMC to realize M.2SSD status indication/temperature monitoring/energy saving control/asset management information indication and other management functions.

Description

A Manageable M.2 Backplane Design Approach for Reduced Cost

technical field

The invention relates to the field of hardware circuit design, in particular to a manageable M.2 backplane design method with reduced cost.

Background technique

The M.2 interface is a new generation interface specification introduced by Intel, which can support data transmission of SATA 6G and PCIE Gen3 8G, and is widely used because of its small size and fast transmission rate.

The hard disk with M.2 interface is usually used as the system disk. Compared with the traditional mechanical hard disk, its transmission based on SATA or PCIE technology greatly improves the operating speed of the system.

Generally speaking, there are three types of signals that need to be considered in M.2 backplane design: Power supply, SATA/PCIE high-speed data lines, M.2 management/control signals (sideband signals and I2C signals). In the current design, the power supply generally uses an independent interface, which is introduced from the power adapter board through cables. Because these power interfaces are usually designed to supply power to the SAS backplane, they are generally P12V and P5V outputs. The two sets of power supply required by M.2 are P3V3 and P1V8. If this power supply method is used, it is necessary to convert P12V (or P5V) to P3V3 and P1V8 on the M.2 backplane through a DC-DC line, that is, on the M.2 .2 There needs to be an independent power input interface on the back panel (connected to the power board through a cable) and a VR line for converting P12V (or P5V) to P3V3 and P1V8. This solution is relatively complicated and has high material costs, especially for boards with small size and strict structural space restrictions, which will undoubtedly greatly increase the difficulty of design.

Description of drawings

Figure 1 Block diagram of M.2 backplane design before improvement

Figure 2 Improved design block diagram

Figure 3 Improved integrated interface Pin definition

Contents of the invention

The present invention proposes a backplane design method capable of reducing costs and managing M.2 ports. By changing the input mode of backplane power, the design is simplified, and the purpose of cost reduction is achieved. At the same time, the backplane supports management features and is comparable to similar backplanes in terms of technical specifications. In addition, the solution has strong versatility and can be used in the design of backplanes with other M.2 ports.

The solution of the present invention is realized in this way, a method for designing a manageable M.2 backplane with reduced cost, which is characterized in that: the M.2 port is directly powered from the main board without an additional voltage conversion circuit.

Preferably, the method further includes integrating power and management control signals into the same interface.

Preferably, the sideband signal between the mainboard PCH and M.2 and the I2C signal between the mainboard BMC and M.2 are connected to realize the management function of M.2.

Preferably, the sideband signal between the PCH and the M.2 is used to control and implement the M.2 energy saving function.

Preferably, the BMC and the M.2 are connected through an I2C line, which is used to transmit the temperature monitoring information at the backplane side, the presence information of the M.2SSD, the alert information, and the M.2 manufacturer/model information.

Detailed ways

The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.

In the prior art, the power supply source of M.2 is taken from the power board. Because the output interface of the power board is usually compatible with supporting SAS hard disks, the power output is usually P12V and P5V, while the power supply required by M.2 is P3V3 and P1V8. 2 The backplane converts P12V (or P5V) to P3V3 and P1V8 through the DC-DC line, that is, there needs to be an independent power input interface (connected to the power board through a cable) and P12V ( or P5V) into DC-DC lines of P3V3 and P1V8, the design scheme is relatively complex and the material cost is high. If there is a structural space limitation requirement for the board, the design difficulty will also increase due to the use of more materials in this solution. The specific implementation topology is shown in Figure 1.

In the embodiment of the present invention, the source of the M.2 power supply is changed, and the method of directly supplying power to P3V3 and P1V8 from the motherboard is adopted. Borrow the interface of the original M.2 management control signal, and increase the pins for transmitting P3V3 and P1V8. As mentioned above, the maximum value of P3V3 is 5A, and the maximum value of P1V8 is not higher than 100mA. Calculated according to the current resistance value of 1A per pin, P3V3 uses 5 pins, and P1V8 uses 1 pin , plus the corresponding return pin, the power part has a total of 12PIN; at the same time, the management control pin includes energy-saving control signal 4pin (each M.2 2pin, including 2 M.2 devices), I2C signal 4pin (each M.2 2pin, Including 2 M.2 devices), that is, a total of 20pin interfaces can realize direct power acquisition and transmission of management control signals. As shown in Figure 2 and Figure 3. The solution of the embodiment of the present invention includes two parts: directly supplying power to the M.2 from the motherboard and realizing the management function of the M.2.

In order to clearly illustrate the implementation of the design method, the implementation steps are described in conjunction with FIG. 2 and FIG. 3 . details as follows:

1) The PCH SATA signal on the motherboard side is connected to the M.2 backplane SATA interface through the SATA cable, and connected to the M.2 interface through the PCB trace to realize SATA signal transmission;

2) The P3V3 and P1V8 required by the M.2 backplane take power directly from the motherboard side through cables (as shown in Figure 3), instead of taking power from the power board, that is, no longer need P12V (or P5V) through VR The design of line conversion to P3V3 and P1V8 saves costs;

3) Use the same interface and cable as 2) to connect the sideband signal between the main board PCH and M.2, and the I2C signal between the main board BMC and M.2 to realize the management function of M.2. The sideband signal between the former PCH and M.2 is used to control the realization of the M.2 energy-saving function; the latter I2C signal is used to transmit the M.2 hard disk presence information/alarm information/FRU information/temperature monitoring information to the BMC, The BMC obtains the above information by analyzing the I2C signal and displays it to the user to realize the management function.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. within range.

Claims (5)

1. A cost-reducing manageable M.2 backplane design method, characterized in that: the M.2 port is powered directly from the motherboard without additional voltage conversion circuits. 2. The cost-reducing manageable M.2 backplane design method according to claim 1, characterized in that: the method further includes integrating power and management control signals into the same interface. 3. The cost-reducing manageable M.2 backplane design method according to claim 2, characterized in that: the sideband signal between the mainboard PCH and M.2, the I2C between the mainboard BMC and M.2 The signal is connected to realize the management function of M.2. 4. The cost-reducing and manageable M.2 backplane design method according to claim 3, characterized in that: the sideband signal between PCH and M.2 is used to control and realize the M.2 energy-saving function. 5. the manageable M.2 backplane design method of cost reduction according to claim 3, is characterized in that: between BMC and M.2, link by I2C line, be used for transmitting backplane end and comprise temperature monitoring information, M. .2 SSD presence information, alert information, and M.2 manufacturer/model information.