CN108173547A - The wave filter group mismatch calibration method and circuit of frequency interlacing analog-digital converter - Google Patents
The wave filter group mismatch calibration method and circuit of frequency interlacing analog-digital converter Download PDFInfo
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- CN108173547A CN108173547A CN201810005063.4A CN201810005063A CN108173547A CN 108173547 A CN108173547 A CN 108173547A CN 201810005063 A CN201810005063 A CN 201810005063A CN 108173547 A CN108173547 A CN 108173547A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
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Abstract
The invention discloses the wave filter group mismatch calibration methods and circuit of a kind of frequency interlacing analog-digital converter, and described method includes following steps：1) input signal is bisected into two sub-band signals using parsing wave filter；2) two sub-band signals sampled respectively, quantified, interpolation processing；3) analog calibration is carried out by the mismatch of parsing wave filter to two sub-band signals；4) two sub-band signals are exported after digital reconstruction wave filter carries out further digital calibration.The circuit includes parsing wave filter and digital filter；Parsing wave filter carries out analog calibration by adjusting the absolute value mismatch subbands signal of capacitance C, inductance L；Digital filter carries out digital calibration by adjusting filter coefficient subbands signal.The linearity of ADC system can be increased to more than 50dB by the present invention, effectively calibrate wave filter mismatch.
Description
Technical field
The present invention relates to analog-digital conversion ic field, in particular to a kind of wave filter of frequency interlacing analog-digital converter
Group mismatch calibration method and circuit.
Background technology
At present, the demand of big data transmission causes the design of analog-digital converter (ADC) to develop towards higher sample rate.It is more
Channel framework is used to do high speed analog-to-digital conversion.By using multichannel framework, the sample rate of ADC system can be carried exponentially
It is high.But stringent matching between channel is so that expection is not achieved in the performance of system, and because calibration consumes more work(
Consumption and chip area.More popular time-interleaved ADC structures at present, such structure is for mismatch calibration, gain calibration, bandwidth
Calibration and clock skew are all more sensitive.Although many collimation techniques are applied, the effect of calibration is not still very
Ideal, particularly with the calibration of high band.
Invention content
For above-mentioned technical problem, the present invention proposes a kind of wave filter group mismatch calibration of frequency interlacing analog-digital converter
Method and circuit meet signal reconstruction precision, can the linearity of ADC system be increased to more than 50dB, effectively calibrate
Wave filter mismatch.
To achieve the above object, the wave filter group mismatch calibration side of the frequency interlacing analog-digital converter designed by the present invention
Method is characterized in that, is included the following steps：
1) input signal is bisected into two sub-band signals using parsing wave filter；
2) two sub-band signals sampled respectively, quantified, interpolation processing；
3) analog calibration is carried out by the mismatch of parsing wave filter to two sub-band signals；
4) two sub-band signals are exported after digital reconstruction wave filter carries out further digital calibration.
Preferably, output letter of two sub-band signals after parsing wave filter carries out analog calibration in the step 2)
Number it is：
In formula, A1(s)A1’(s)、A2(s)A2' (s) be respectively low pass and bandpass analog filter transfer function, ωcFor
A1(s)A1' (s)-three dB bandwidth, L, R, C are respectively inductance, resistance, capacitance；aR、aL、aCRespectively resistance, inductance, capacitance
Mismatching, k are mismatch parameter, and s is analog frequency variable.
Preferably, the process of analog calibration is to simulate step-length δ in the step 2)anaIteratively adjusting mismatch parameter k, directly
To satisfaction
Preferably, the process of digital calibration is in the step 4)：
41) amplitude of two sub-band signal specific frequency points 0, pi/2, π are measured；
42) using range value G (0) as calibration reference point, mismatch parameter is worth to by comparing the amplitude of G (pi/2), G (π)
The polarity of k：
43) with step-length δdigIteratively adjusting mismatch parameter k repeats step 41), 42), until error meets preset range.
Preferably, the output signal of the step 4) is
In formula, T is the sampling period of system, and p represents the frequency displacement index of input signal, TRp(ejω) be system transmission letter
Number, i.e.,
In formula, m represents number of subchannels, Am(j ω/T) be m channels parsing wave filter transfer function, Dm(ejω) it is m
The transfer function of the digital reconstruction wave filter of channel.
Preferably, the digital steps δdigIt is 0.001, iterations are 60 times.
A kind of circuit of wave filter group mismatch calibration method for realizing said frequencies intertexture analog-digital converter, feature exist
In：Including parsing wave filter and digital filter；
The parsing wave filter carries out simulation school by adjusting the absolute value mismatch subbands signal of capacitance C, inductance L
It is accurate；
The digital filter carries out digital calibration by adjusting filter coefficient subbands signal.
Further, the parsing wave filter includes two tunnels analogy wave filters, the electricity of two tunnels analogy wave filters
The ratio of appearance is C1：C2=2:1.
Further, the tap length of the digital filter is 25.
The present invention samples subchannel using same clock signal by frequency division ADC, avoids clock offset errors,
Input signal is divided into several sub-band signals by the parsing wave filter group before subchannel ADC, is then based on using one kind
The reconfigurable filter of full bandwidth optimization is avoided using complicated analog filter, by the filter coefficient that optimization obtains for
The mismatch of simulation parsing wave filter group is very sensitive.
Under normal conditions, the mismatch of the analog filter in frequency division analog-digital converter can seriously affect the linear of ADC system
Degree.By carrying out model analysis to the mismatch parameter in wave filter group, the mismatch of wave filter can be calibrated.Wave filter
Calibration can be divided into 2 steps：Analog calibration and digital calibration.Analog calibration passes through regulation resistance and capacitance；Digital calibration
It is to be realized by changing filter coefficient.Design for 8 bit resolution clock intertexture ADC at a high speed, the school of clock skew
Accurate and multiphase clock distribution is extremely difficult.Frequency interlacing ADC can be to avoid these calibrations and clock distribution problem.No
With the parsing wave filter group before sampling switch may introduce mismatch and reduce performance.But for resolution ratio
For ADC for 6~8 bits, the mismatch of simulation parsing wave filter group will not cause larger impact to system.It is lost in addition, adding in
The collimation technique matched, the mismatch of wave filter group can compensate well for.
In order to verify proposed collimation technique, the present invention devises a 5GS/s sample rates, 8 bit, two channel frequency division
ADC, the tap length of back-end digital wave filter is 25, to meet signal reconstruction precision.Experimental result shows that the present invention can incite somebody to action
The linearity of ADC system is increased to more than 50dB, has effectively calibrated wave filter mismatch.
Description of the drawings
Fig. 1 is the structure of two channel frequency interlacing ADC and calibration block diagram.
Fig. 2 is the Organization Chart of two channel frequency interlacing ADC.
Fig. 3 is that the frequency band of analog filter divides schematic diagram.
Fig. 4 is the mismatch model figure of two channel frequency interlacing ADC.
Fig. 5 is the circuit diagram for simulating no source resolution wave filter group.
Fig. 6 is that wave filter group mismatch generates signal amplitude change schematic diagram.
Fig. 7 is calibration process convergence graph.
Specific embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
The wave filter group mismatch calibration circuit of a kind of frequency interlacing analog-digital converter proposed by the present invention, as shown in Figure 1, packet
Include parsing wave filter and digital filter.Parsing wave filter is believed by adjusting the absolute value mismatch subbands of capacitance C, inductance L
Number carry out analog calibration.Digital filter carries out digital calibration by adjusting filter coefficient subbands signal.
For in practical design process, parameter mismatch needs are calibrated caused by passive filter group.The present invention carries
The collimation technique to wave filter group is gone out.The calibration of wave filter group can be divided into two steps：Analog calibration and digital calibration.Mould
Intend calibration and pass through regulation resistance and capacitance；Digital regulated realized by updating the filter coefficient in numeric field.In addition,
In digital end, there are one wave filter mismatch detectors, it is strong and weak by the amplitude of testing calibration signal, and the signal is by given school
Calibration signal generates.The present invention devises single order analog filter group (as shown in Figure 5), and Nyquist Bandwidth is divided into subband
Wide (as shown in Figure 3).The coefficient of rule causes used resistance, and capacitance is proportional, is easily integrated circuit realization.In addition it is of the invention
The design for additionally providing digital back-end synthesis filter is realized, is used for that the signal of sub- bandwidth is reconstructed in digital end.
The wave filter group mismatch calibration method of a kind of frequency interlacing analog-digital converter proposed by the present invention, including walking as follows
Suddenly：
1) input signal is bisected into two sub-band signals using parsing wave filter.
2) two sub-band signals sampled respectively, quantified, interpolation processing.
3) analog calibration is carried out by the mismatch of parsing wave filter to two sub-band signals.
The process of analog calibration is to simulate step-length δanaIteratively adjusting mismatch parameter k, until meeting
4) two sub-band signals are exported after digital reconstruction wave filter carries out further digital calibration.Specific packet
It includes：
41) amplitude of two sub-band signal specific frequency points 0, pi/2, π are measured；
42) using range value G (0) as calibration reference point, mismatch parameter is worth to by comparing the amplitude of G (pi/2), G (π)
The polarity of k：
43) with step-length δdigIteratively adjusting mismatch parameter k repeats step 41), 42), until error ep(ω) meets default
Range.
The present invention realization process be：In frequency division ADC, input signal I (j ω) is divided into two equal sub-bands as schemed
Shown in 2.When input signal is through over-sampling, quantization and interpolation, finally by digital reconstruction wave filter, output signal G (ejω)
For
Wherein, T is the sampling period of system, and p represents the frequency displacement index of input signal.TRp(ejω) be system transmission letter
Number, i.e.,
Wherein, m (m=0,1) represents number of subchannels, Am(j ω/T) is the biography of the parsing wave filter of m (m=0,1) channel
Defeated function, Dm(ejω) be m (m=0,1) channel digital reconstruction wave filter.If a system meets following condition, then should
System can be referred to as perfect reconstruction system
Wherein c is that a non-zero constant and d represent system delay.
Mismatch in clock intertexture ADC has been extensively discussed, such as bandwidth mismatch, gain mismatch, imbalance mismatch
And clock offset errors.In frequency interlacing ADC, in addition to wave filter group mismatch, other mismatches also exist.Frequency interlacing is filtered
The mismatch model of wave device group is as shown in figure 4, wherein, second channel is used for example.In Fig. 4, A1 ' (s) represents parsing filtering
The mismatch of device, formula (2) are rewritten as
Wherein
As can be seen that TR from formula (5)p'(ejω) include the CTE mismatch A ' for parsing wave filterm(jω).For given
Parsing filter coefficient, reconfigurable filter coefficient can obtain by optimizing program, and error is expressed as
ep(ω)=| TRp'(ejω)-TRideal(ejω)|. (6)
Calibration for frequency interlacing ADC generally follows first calibration mismatch imbalance, then gain imbalance, finally calibration filtering
Device mismatch.
In the present invention, the parsing wave filter group of two channels is as shown in Figure 5.Wherein the ratio of capacitance is C1:C2=2:
1.(such as 65nm, 40nm), C in deep submicron CMOS technologies1And C2Between ratio can control very accurate, meet medium
The requirement of resolution ratio.Although the absolute value of capacitance can be changed greatly due to fabrication error, the ratio of capacitance can control
It is very accurate, therefore the trend of the frequency response change of wave filter group mismatch can be prejudged.
In Fig. 5 simulation parsing wave filter transfer function be：
Wherein, A1(s)A1' (s) and A2(s)A2' (s) be respectively low pass and bandpass analog filter transfer function；ωcFor
A1(s)A1' (s)-three dB bandwidth；aR、aL、aCThe respectively mismatching of resistance, inductance, capacitance.Mismatch parameter k for capacitance with
The total mismatch parameter of inductance.
Calibration for two channel frequency interlacing ADC, the amplitude measurement of specific frequency point are as shown in Figure 6.Wherein, these frequencies
Rate point is located at (0), (pi/2), near (π).If without the mismatch of filter bank gain, then the measured signal of these points
Power should be identical.Because the amplitude in nearly dc point frequency signal will not be influenced by wave filter group mismatch,
Therefore, using the range value G (0) measured as calibration reference point.Positioned at pi/2, the signal strength of π mainly reflects that the polarity of k (is more than
1 or less than 1), relationship is as shown in formula 8
In figure 6 it can be seen that if k is less than 1, this means that left side is biased in second channel frequency response.Due to second channel frequency
It rings the value at pi/2 to become larger, therefore G (pi/2) can be led to more than G (0), and the value of G (π) is less than G (0).By calculate and
Compare the signal amplitude of different frequency point, k can be adjusted step by step until it levels off to 1.
The flow of mismatch calibration includes two steps of wave filter group mismatch calibration, is divided into analog calibration and digital calibration.
Originally, calibration algorithm is operated in analog calibration pattern, and calibration stepping is δana.After analog calibration is completed, that is, meet following item
Part：
System is switched to digital calibration, that is, is filtered the update of device system number, step-length δdig.In the algorithm of proposition,
Corresponding k is added or the step-length that subtracts one reduces amplitude difference.Such iteration, maximum amplitude difference always than the last time
Reduce.Therefore, it can be deduced that formula (10)：
Wherein i is the number of iteration.In the example of the present invention, the Frequency point of measuring signal power be (0), (pi/2),
At (π).Step-lengths of the parameter k adjusted in analog- and digital- calibration is respectively set to 0.01 and 0.001.Convergence process is as schemed
It shown in 7, has crossed after 60 iteration, calibration is completed.
The content not being described in detail in this specification belongs to the prior art well known to professional and technical personnel in the field.
Claims (9)
1. a kind of wave filter group mismatch calibration method of frequency interlacing analog-digital converter, it is characterised in that：Include the following steps：
1) input signal is bisected into two sub-band signals using parsing wave filter；
2) two sub-band signals sampled respectively, quantified, interpolation processing；
3) analog calibration is carried out by the mismatch of parsing wave filter to two sub-band signals；
4) two sub-band signals are exported after digital reconstruction wave filter carries out further digital calibration.
2. the wave filter group mismatch calibration method of frequency interlacing analog-digital converter according to claim 1, it is characterised in that：
Output signal of two sub-band signals after parsing wave filter carries out analog calibration is in the step 2)：
Wherein, A1(s)A1’(s)、A2(s)A2' (s) be respectively low pass and bandpass analog filter transfer function, ωcFor A1(s)
A1' (s)-three dB bandwidth, L, R, C are respectively inductance, resistance, capacitance；aR、aL、aCThe respectively mismatch of resistance, inductance, capacitance
Coefficient, k are mismatch parameter, and s is analog frequency variable.
3. the wave filter group mismatch calibration method of frequency interlacing analog-digital converter according to claim 2, it is characterised in that：
The process of analog calibration is to simulate step-length δ in the step 2)anaIteratively adjusting mismatch parameter k, until meeting
4. the wave filter group mismatch calibration method of frequency interlacing analog-digital converter according to claim 2, it is characterised in that：
The process of digital calibration is in the step 4)：
41) amplitude of two sub-band signal specific frequency points 0, pi/2, π are measured；
42) using range value G (0) as calibration reference point, it is worth to mismatch parameter k's by comparing the amplitude of G (pi/2), G (π)
Polarity：
43) with step-length δdigIteratively adjusting mismatch parameter k repeats step 41), 42), until error meets preset range.
5. the wave filter group mismatch calibration method of frequency interlacing analog-digital converter according to claim 4, it is characterised in that：
The output signal of the step 4) is
In formula, T is the sampling period of system, and p represents the frequency displacement index of input signal, TRp(ejω) be system transfer function, i.e.,
In formula, m represents number of subchannels, Am(j ω/T) be m channels parsing wave filter transfer function, Dm(ejω) it is m channels
Digital reconstruction wave filter transfer function.
6. the wave filter group mismatch calibration method of frequency interlacing analog-digital converter according to claim 4, it is characterised in that：
The digital steps δdigIt is 0.001, iterations are 60 times.
7. a kind of circuit of wave filter group mismatch calibration method for realizing frequency interlacing analog-digital converter described in claim 1,
It is characterized in that：Including parsing wave filter and digital filter；
The parsing wave filter carries out analog calibration by adjusting the absolute value mismatch subbands signal of capacitance C, inductance L；
The digital filter carries out digital calibration by adjusting filter coefficient subbands signal.
8. the circuit of the wave filter group mismatch calibration method of frequency interlacing analog-digital converter according to claim 7, special
Sign is：The parsing wave filter includes two tunnels analogy wave filters, and the ratio of the capacitance of two tunnels analogy wave filters is
C1：C2=2:1.
9. the wave filter group mismatch calibration method and circuit of frequency interlacing analog-digital converter according to claim 7, special
Sign is：The tap length of the digital filter is 25.
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| US20170077944A1 (en) * | 2009-12-16 | 2017-03-16 | Syntropy Systems, Llc | Conversion of a Discrete-Time Quantized Signal into a Continuous-Time, Continuously Variable Signal |
| US9780802B1 (en) * | 2016-08-12 | 2017-10-03 | Korea University Research And Business Foundation | Time-interleaved analog-digital converter and calibration method for the same |
| CN107346974A (en) * | 2016-05-04 | 2017-11-14 | 德克萨斯仪器股份有限公司 | Reduce the non-linear method and device in analog-digital converter |
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2018
- 2018-01-03 CN CN201810005063.4A patent/CN108173547A/en active Pending
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| CN101779433A (en) * | 2007-08-14 | 2010-07-14 | 高通股份有限公司 | Communication system using a shared baseband processor for transmission and reception over different bandwidths |
| US20170077944A1 (en) * | 2009-12-16 | 2017-03-16 | Syntropy Systems, Llc | Conversion of a Discrete-Time Quantized Signal into a Continuous-Time, Continuously Variable Signal |
| CN105811977A (en) * | 2015-01-16 | 2016-07-27 | 联发科技股份有限公司 | Calibration circuit and method for analog-to-digital converter |
| CN107346974A (en) * | 2016-05-04 | 2017-11-14 | 德克萨斯仪器股份有限公司 | Reduce the non-linear method and device in analog-digital converter |
| US9780802B1 (en) * | 2016-08-12 | 2017-10-03 | Korea University Research And Business Foundation | Time-interleaved analog-digital converter and calibration method for the same |
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