CN108170623B - USB switching circuit and switching system - Google Patents
USB switching circuit and switching system Download PDFInfo
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- CN108170623B CN108170623B CN201711484024.9A CN201711484024A CN108170623B CN 108170623 B CN108170623 B CN 108170623B CN 201711484024 A CN201711484024 A CN 201711484024A CN 108170623 B CN108170623 B CN 108170623B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
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Abstract
The embodiment of the invention relates to the technical field of system debugging, in particular to a USB switching circuit and a switching system. The USB switching circuit includes: first USB interface, second USB interface, third USB interface, fourth USB interface and switch circuit, wherein, switch circuit includes control circuit and switch module, is connected through control circuit and switch module's control end to and switch module and first USB interface, second USB interface, third USB interface, fourth USB interface connection, make control circuit can control first USB interface and third USB interface or fourth USB interface connection, control second USB interface and fourth USB interface or third USB interface connection, wherein, the one-to-one connection between first USB interface, second USB interface and third USB interface, the fourth USB interface. Through the mode, the embodiment of the invention can realize switching without manually plugging and unplugging the USB slave equipment, so that the cross debugging work is more convenient to carry out, and the efficiency is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of system debugging, in particular to a USB switching circuit and a switching system.
Background
At present, most of the software development of the embedded system is a cross-debugging work, i.e. compiling is completed on a computer side, and then the compiled executable file is used for debugging on a target device.
In the cross debugging process, the problem of copying or mounting the executable file is involved, and when the executable file is transmitted between a computer end and target equipment by using a network interface, the copying or mounting operation is very easy to realize; when a USB port is used between the computer and the target device, due to the limitation of the USB protocol, one USB slave device can only connect to one USB master device (the computer or the target device) and cannot be mounted on two USB master devices simultaneously.
Disclosure of Invention
The embodiment of the invention aims to provide a USB switching circuit and a switching system, which can realize switching without manually plugging and unplugging USB slave equipment, so that cross debugging work is more convenient to carry out, and the efficiency is improved. In order to solve the above technical problem, one technical solution adopted by the embodiments of the present invention is: provided is a USB switching circuit including:
the USB interface comprises a first USB interface, a second USB interface, a third USB interface, a fourth USB interface and a switch circuit;
the switching circuit comprises a control circuit and a switching component;
the first USB interface, the second USB interface, the third USB interface and the fourth USB interface are all connected with the switch component;
the control circuit is connected with the control end of the switch component, the switch component is controlled by the control circuit, so that the first USB interface is connected with the third USB interface or the fourth USB interface, the second USB interface is connected with the fourth USB interface or the third USB interface, and the first USB interface, the second USB interface, the third USB interface and the fourth USB interface are correspondingly connected one by one.
Optionally, the switch assembly comprises a first single pole double throw switch, a second single pole double throw switch, a third single pole double throw switch, a fourth single pole double throw switch, a fifth single pole double throw switch, a sixth single pole double throw switch, a seventh single pole double throw switch, and an eighth single pole double throw switch;
the first single-pole double-throw switch is connected with the fifth single-pole double-throw switch;
the second single-pole double-throw switch is connected with the sixth single-pole double-throw switch; the third single-pole double-throw switch is connected with the seventh single-pole double-throw switch;
the fourth single-pole double-throw switch is connected with the eighth single-pole double-throw switch;
the control circuit is respectively connected with the control ends of the first single-pole double-throw switch, the second single-pole double-throw switch, the third single-pole double-throw switch, the fourth single-pole double-throw switch, the fifth single-pole double-throw switch, the sixth single-pole double-throw switch, the seventh single-pole double-throw switch and the eighth single-pole double-throw switch.
Optionally, each single-pole double-throw switch includes a first moving-end interface, a second moving-end interface, and a stationary-end interface;
a fixed end interface of the first single-pole double-throw switch is connected with a first movable end interface of the fifth single-pole double-throw switch, a first movable end interface of the first single-pole double-throw switch is connected with a data positive electrode of the first USB interface, and a second movable end interface of the first single-pole double-throw switch is connected with a data positive electrode of the second USB interface;
a fixed end interface of the second single-pole double-throw switch is connected with a first movable end interface of the sixth single-pole double-throw switch, a first movable end interface of the second single-pole double-throw switch is connected with a data negative electrode of the first USB interface, and a second movable end interface of the second single-pole double-throw switch is connected with a data negative electrode of the second USB interface;
a fixed end interface of the third single-pole double-throw switch is connected with a first movable end interface of the seventh single-pole double-throw switch, a first movable end interface of the third single-pole double-throw switch is connected with a data positive electrode of the second USB interface, and a second movable end interface of the third single-pole double-throw switch is connected with a data positive electrode of the first USB interface;
a fixed end interface of the fourth single-pole double-throw switch is connected with a first movable end interface of the eighth single-pole double-throw switch, a first movable end interface of the fourth single-pole double-throw switch is connected with a data negative electrode of the second USB interface, and a second movable end interface of the fourth single-pole double-throw switch is connected with a data negative electrode of the first USB interface;
a second moving end interface of the fifth single-pole double-throw switch is suspended, and a fixed end interface of the fifth single-pole double-throw switch is connected with a data positive electrode of a third USB interface;
a second moving end interface of the sixth single-pole double-throw switch is suspended, and a fixed end interface of the sixth single-pole double-throw switch is connected with a data negative electrode of a third USB interface;
a second moving end interface of the seventh single-pole double-throw switch is suspended, and a fixed end interface of the seventh single-pole double-throw switch is connected with a data positive electrode of a fourth USB interface;
and a second movable end interface of the eighth single-pole double-throw switch is suspended, and a fixed end interface of the eighth single-pole double-throw switch is connected with a data negative electrode of a fourth USB interface.
Optionally, the control circuit includes a bistable flip-flop, and the bistable flip-flop is connected to the control terminals of the first single-pole double-throw switch, the second single-pole double-throw switch, the third single-pole double-throw switch, and the fourth single-pole double-throw switch, respectively.
Optionally, the flip-flop comprises a first D flip-flop D1, the first D flip-flop D1 comprising a D pin, a Reset pin, a Set pin, a CLK pin, a Q pin, and a Q not pin;
the Q pin is connected with the D pin;
the Q pin is respectively connected with the control ends of the first single-pole double-throw switch, the second single-pole double-throw switch, the third single-pole double-throw switch and the fourth single-pole double-throw switch;
the Reset pin and the Set pin are grounded.
Optionally, the control circuit further includes a monostable flip-flop, and the monostable flip-flop is connected to the control terminals of the fifth single-pole double-throw switch, the sixth single-pole double-throw switch, the seventh single-pole double-throw switch, and the eighth single-pole double-throw switch, respectively.
Optionally, the monostable flip-flop comprises a second D flip-flop D2, a first resistor R1 and a first capacitor C1;
the second D flip-flop D2 comprises a D pin, a Reset pin, a Set pin, a CLK pin, a Q pin and a Q not pin;
one end of the first resistor R1 is connected with the Q pin, the other end is connected with the Reset pin and the first capacitor C1, and the other end of the first capacitor C1 is grounded;
the Q pin is also connected with the control ends of the fifth single-pole double-throw switch, the sixth single-pole double-throw switch, the seventh single-pole double-throw switch and the eighth single-pole double-throw switch;
the Q non-pin is suspended;
the D pin is connected with a high level;
the Set pin is grounded.
Optionally, the control circuit further comprises:
and the input end of the pulse signal generating circuit is used for being connected with the power supply anode of the third USB interface or the fourth USB interface, and the output end of the pulse signal generating circuit is connected with the monostable trigger and the bistable trigger.
Optionally, the control circuit further includes a power supply circuit, the power supply circuit is a wired or logic circuit, an input end of the power supply circuit is connected to power anodes of the third USB interface and the fourth USB interface, respectively, and an output end of the power supply circuit is further used for being connected to power anodes of the first USB interface and the second USB interface.
In order to solve the above technical problem, another technical solution adopted in the embodiments of the present invention is: there is provided a USB switching system including:
the USB switching circuit comprises a first USB slave device, a second USB slave device, a first USB master device, a second USB master device and the USB switching circuit;
the first USB slave device and the second USB slave device are connected with the first USB interface and the second USB interface, and the first USB master device and the second USB master device are connected with the third USB interface and the fourth USB interface.
The embodiment of the invention has the beneficial effects that: in contrast to the prior art, an embodiment of the present invention provides a USB switching circuit and a switching system, where the USB switching circuit includes: first USB interface, second USB interface, third USB interface, fourth USB interface and switch circuit, wherein, switch circuit includes control circuit and switch module, is connected through control circuit and switch module's control end to and switch module and first USB interface, second USB interface, third USB interface, fourth USB interface connection, make control circuit can control first USB interface and third USB interface or fourth USB interface connection, control second USB interface and fourth USB interface or third USB interface connection, wherein, the one-to-one connection between first USB interface, second USB interface and third USB interface, the fourth USB interface. When the USB slave equipment is connected with the USB master equipment through the USB switching circuit, the switching connection of the USB slave equipment can be realized without manually plugging and unplugging the USB slave equipment, so that the cross debugging work is more convenient to carry out, and the cross debugging efficiency is improved.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a schematic structural diagram of a USB switching system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a USB switching circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a switch component of the USB switching circuit shown in fig. 2.
Referring to fig. 1 to 2, 1 is a USB switching system, 10 is a USB switching circuit, 11 is a first USB interface, 12 is a second USB interface, 13 is a third USB interface, 14 is a fourth USB interface, 15 is a switch circuit, 151 is a control circuit, 1511 is a bistable flip-flop, 1512 is a monostable flip-flop, 1513 is a pulse signal generating circuit, 1514 is a power supply circuit, 152 is a switch component, 1521 is a first single-pole double-throw switch, 1522 is a second single-pole double-throw switch, 1523 is a third single-pole double-throw switch, 1524 is a fourth single-pole double-throw switch, 1525 is a fifth single-pole double-throw switch, 1526 is a sixth single-pole double-throw switch, 1527 is a seventh single-pole double-throw switch, 1528 is an eighth single-pole double-throw switch, 20 is a first USB slave device, 30 is a second USB slave device, 40 is a first USB master device, and 50 is a second USB master device.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, a schematic structural diagram of a USB switching system according to an embodiment of the present invention is shown, where the USB switching system 1 includes: USB switching circuit 10, first USB slave device 20, second USB slave device 30, first USB master device 40, and second USB master device 50.
The first USB slave device 20 and the second USB slave device 30 are connected to the first USB interface 11 and the second USB interface 12, that is, the first USB slave device 20 can access the first USB interface 11 or the second USB interface 12 in the USB switching circuit 10; the second USB slave device 30 can access the first USB interface 11 or the second USB interface 12 in the USB switching circuit 10. And when the first USB slave device 20 accesses the first USB interface 11, the second USB slave device 30 accesses the second USB interface 12.
The first USB master device 40 and the second USB master device 50 are connected to the third USB interface 13 and the fourth USB interface 14, that is, the first USB master device 40 can access the third USB interface 13 or the fourth USB interface 14 in the USB switching circuit 10; the second USB host device 50 can access the third USB interface 13 or the fourth USB interface 14 in the USB switching circuit 10. And when the first USB host device 40 accesses the third USB interface 13, the second USB host device 50 accesses the fourth USB interface 14.
The USB slave device refers to a device capable of accessing a USB master device, for example: a U disk, a USB network card and the like; and the USB master device refers to a device that allows the USB slave device to access, for example: a Set Top Box (STB), a Personal Computer (PC), and the like.
In the cross-debugging work, one USB slave device needs to copy a compiled executable file from one USB master device to another USB master device for debugging, where the USB master device running the executable file for debugging is a debugging device.
In the embodiment of the present invention, a first USB disk is taken as the first USB slave device 20, a second USB disk is taken as the second USB slave device 30, a PC is taken as the first USB master device 40, and an STB is taken as the second USB master device 50, to specifically describe the embodiment of the present invention, where the PC is capable of compiling an executable file, and the STB is a debugging device for running the executable file for debugging.
Further, in the embodiment of the present invention, specific descriptions are further provided by taking an example that the third USB interface 13 is accessed to the PC, the fourth USB interface 14 is accessed to the STB, the first USB disk is accessed to the first USB interface 11, and the second USB disk is accessed to the second USB interface 12.
In this USB switching system 1, when the first USB disk is connected to the PC and the second USB disk is connected to the STB, the first USB disk can be switched to be connected to the STB through the USB switching circuit 10, and the second USB disk is connected to the PC.
Further, please refer to fig. 2, which is a schematic structural diagram of a USB switching circuit according to an embodiment of the present invention, wherein the USB switching circuit 10 includes: a first USB interface 11, a second USB interface 12, a third USB interface 13, a fourth USB interface 14, and a switching circuit 15.
The switch circuit 15 includes a control circuit 151 and a switch component 152.
Specifically, referring to fig. 3, the switch assembly 152 includes 8 single-pole double-throw switches, specifically, a first single-pole double-throw switch 1521, a second single-pole double-throw switch 1522, a third single-pole double-throw switch 1523, a fourth single-pole double-throw switch 1524, a fifth single-pole double-throw switch 1525, a sixth single-pole double-throw switch 1526, a seventh single-pole double-throw switch 1527, and an eighth single-pole double-throw switch 1528. Each single pole double throw switch includes a first moving terminal interface (x as shown in fig. 3), a second moving terminal interface (y as shown in fig. 3), a stationary terminal interface (z as shown in fig. 3), and a control terminal (not shown). Of course, in some embodiments, the first moving-end interface may also be y as shown in fig. 3, and the second moving-end interface may be x as shown in fig. 3.
The first single-pole double-throw switch 1521 is connected to the fifth single-pole double-throw switch 1525, specifically, the stationary port z of the first single-pole double-throw switch 1521 is connected to the first moving port x of the fifth single-pole double-throw switch 1525, and at this time, the second moving port y of the fifth single-pole double-throw switch 1525 is suspended.
The second single-pole double-throw switch 1522 is connected to the sixth single-pole double-throw switch 1256, specifically, the stationary port z of the second single-pole double-throw switch 1522 is connected to the first moving port x of the sixth single-pole double-throw switch 1526, and at this time, the second moving port y of the sixth single-pole double-throw switch 1526 is suspended.
The third single-pole double-throw switch 1523 is connected to the seventh single-pole double-throw switch 1257, specifically, the stationary port z of the third single-pole double-throw switch 1523 is connected to the first moving port x of the seventh single-pole double-throw switch 1527, and at this time, the second moving port y of the seventh single-pole double-throw switch 1527 is floating.
The fourth single-pole double-throw switch 1524 is connected to the eighth single-pole double-throw switch 1258, specifically, the stationary port z of the fourth single-pole double-throw switch 1524 is connected to the first moving port x of the eighth single-pole double-throw switch 1528, and at this time, the second moving port y of the eighth single-pole double-throw switch 1528 is suspended.
Further, the switch component 152 is connected with the first USB interface 11, the second USB interface 12, the third USB interface 13, and the fourth USB interface 14. Each USB interface comprises a power supply anode, a power supply cathode, a data anode and a data cathode.
Specifically, the first USB interface 11 and the second USB interface 12 are connected to a first single-pole double-throw switch 1521, a second single-pole double-throw switch 1522, a third single-pole double-throw switch 1523, and a fourth single-pole double-throw switch 1524; the third USB interface 13 and the fourth USB interface 14 are connected to a fifth single-pole double-throw switch 1525, a sixth single-pole double-throw switch 1526, a seventh single-pole double-throw switch 1527, and an eighth single-pole double-throw switch 1528.
Specifically, a first moving-end interface x of the first single-pole double-throw switch 1521 is connected to a data positive electrode (D + shown in fig. 2) of the first USB interface 11, and a second moving-end interface y is connected to a data positive electrode (D + shown in fig. 2) of the second USB interface 12;
a first moving end interface x of the second single-pole double-throw switch 1522 is connected with a data negative electrode (D-) of the first USB interface 11, and a second moving end interface y is connected with a data negative electrode (D-) of the second USB interface 12;
a first moving-end interface x of the third single-pole double-throw switch 1523 is connected with a data positive electrode (D + shown in fig. 2) of the second USB interface 12, and a second moving-end interface y is connected with a data positive electrode (D + shown in fig. 2) of the first USB interface 11;
a first moving-end interface x of the fourth single-pole double-throw switch 1524 is connected with a data negative electrode (D-) of the second USB interface 12 (as shown in fig. 2), and a second moving-end interface y is connected with a data negative electrode (D-) of the first USB interface 11 (as shown in fig. 2);
the stationary terminal z of the fifth single-pole double-throw switch 1525 is connected to the positive data terminal (D + shown in fig. 2) of the third USB interface 13;
the fixed terminal interface z of the sixth single-pole double-throw switch 1526 is connected to the negative data terminal (D-) of the third USB interface 13 (as shown in fig. 2);
the stationary terminal z of the seventh single-pole double-throw switch 1527 is connected to the positive data terminal (D + shown in fig. 2) of the fourth USB interface 14;
the stationary terminal z of the eighth single pole double throw switch 1528 is connected to the negative data terminal (D-) of the fourth USB interface 14, as shown in fig. 2.
Further, the switch assembly 152 is also connected to the control circuit 151. Specifically, the control circuit 151 is connected to the control terminal of the switch component 152, and includes control terminals connected to a first single-pole double-throw switch 1521, a second single-pole double-throw switch 1522, a third single-pole double-throw switch 1523, a fourth single-pole double-throw switch 1524, a fifth single-pole double-throw switch 1525, a sixth single-pole double-throw switch 1526, a seventh single-pole double-throw switch 1527, and an eighth single-pole double-throw switch 1528, respectively. The connection relationship between the fixed end interface z and the movable end interface x or y of each single-pole double-throw switch in the switch assembly 152 is controlled by the control circuit 151, so that the first USB interface 11 is connected with the third USB interface 13 or the fourth USB interface 14, and the second USB interface 12 is connected with the fourth USB interface 14 or the third USB interface 13, wherein the first USB interface 11, the second USB interface 12, the third USB interface 13 and the fourth USB interface 14 are correspondingly connected one to one, that is, if the first USB interface 11 is connected with the third USB interface 13, the second USB interface 12 is connected with the fourth USB interface 14; if the second USB interface 12 is connected to the third USB interface 13, the first USB interface 11 is connected to the fourth USB interface 14, so that the USB slave device can be switched without manual plugging, and each USB master device is always connected to a USB slave device, so that the cross debugging operation is more convenient and the efficiency is improved.
Further, referring to fig. 2, the control circuit 151 includes a bistable flip-flop 1511, a monostable flip-flop 1512, a pulse signal generation circuit 1513, and a power circuit 1514.
The control circuit 151 is connected with the control ends of a first single-pole double-throw switch 1521, a second single-pole double-throw switch 1522, a third single-pole double-throw switch 1523 and a fourth single-pole double-throw switch 1524 through a bistable flip-flop 1511; and are respectively connected with control terminals of a fifth single-pole double-throw switch 1525, a sixth single-pole double-throw switch 1526, a seventh single-pole double-throw switch 1527 and an eighth single-pole double-throw switch 1528 through a monostable trigger 1512.
Wherein, the bistable flip-flop 1511 includes a first D flip-flop D1, the first D flip-flop D1 includes a D pin, a Reset pin, a Set pin, a CLK pin, a Q pin, and a Q not pin, and the Q pin and the Q not pin output an inverted level.
When the Reset pin and the Set pin of the first D flip-flop D1 are switched into a low level, if the output of the Q not pin is used as the input of the D pin, the first D flip-flop D1 constitutes a bistable flip-flop 1511, so in the embodiment of the present invention, the Reset pin and the Set pin of the first D flip-flop D1 are grounded; the Q non-pin is connected with the D pin; the Q pin is connected to the control terminals of a first single-pole double-throw switch 1521, a second single-pole double-throw switch 1522, a third single-pole double-throw switch 1523 and a fourth single-pole double-throw switch 1524, respectively; the CLK pin is connected to pulse signal generation circuit 1513 so that flip-flop 1511 gets a rising edge clock signal.
Controlling the throwing direction of a stationary terminal interface z of a first single-pole double-throw switch 1521, a second single-pole double-throw switch 1522, a third single-pole double-throw switch 1523 and a fourth single-pole double-throw switch 1524 through a level signal output by a Q pin of a first D trigger D1 so as to change the connection relation between the stationary terminal interface z and a movable terminal interface x or y, wherein the connection relation comprises that the stationary terminal interface z is connected with the first movable terminal interface x or the stationary terminal interface z is connected with a second movable terminal interface y; further changing the connection relationship between the first USB interface 11 and the second USB interface 12 and the third USB interface 13 and the fourth USB interface 14, including the first USB interface 11 being connected to the third USB interface 13 and the second USB interface 12 being connected to the fourth USB interface 14; or the second USB interface 12 is connected to the third USB interface 13, and the first USB interface 11 is connected to the fourth USB interface 14, so as to implement the switching connection between the USB slave device and the USB master device.
Specifically, because the Q non-pin is connected to the D pin, the level signal output by the Q non-pin is used as the input level signal of the D pin, that is, when the rising edge clock signal comes temporarily, the level signal output by the Q pin is the level signal output by the Q non-pin in the previous state and is in a stable state, and because the level signals output in the same state of the Q pin and the Q non-pin are opposite, the level signal output by the Q pin will be inverted when each rising edge clock signal comes temporarily, and further the throwing directions of the stationary terminal z of the first single-pole double-throw switch 1521, the second single-pole double-throw switch 1522, the third single-pole double-throw switch 1523, and the fourth single-pole double-throw switch 1524 are controlled to be inverted, so that the connection relationships between the first USB interface 11 and the second USB interface 12 and the third USB interface 13 and the fourth USB interface 14 are changed. For example, if in the current state, the stationary terminal ports z of the first single-pole double-throw switch 1521, the second single-pole double-throw switch 1522, the third single-pole double-throw switch 1523 and the fourth single-pole double-throw switch 1524 are all connected to the first moving terminal port x, and at this time, the first USB interface 11 is connected to the third USB interface 13, and the second USB interface 12 is connected to the fourth USB interface 14, then when a rising edge clock signal is input to the bistable flip-flop 1511, the level signal output by the Q pin is inverted, that is, opposite to the level signal output in the previous state, at this time, the stationary terminal ports z of the first single-pole double-throw switch 1521, the second single-pole double-throw switch 1521, the third single-pole double-throw switch 1523 and the fourth single-pole double-throw switch 1524 are all connected to the second moving terminal port y, at this time, the first USB interface 11 is connected to the fourth USB interface 14, and the second USB interface 12 is connected to the third USB interface 15213, so as to realize the stable switching of the analog switches, and stable switching of USB slave devices.
Further, the monostable flip-flop 1512 includes a second D flip-flop D2, a first resistor R1, and a first capacitor C1, the second D flip-flop D2 includes a D pin, a Reset pin, a Set pin, a CLK pin, a Q pin, and a Q not pin, and the Q pin and the Q not pin output inverted levels.
In the embodiment of the invention, one end of a first resistor R1 is connected with a Reset pin and a first capacitor C1, and the other end is connected with a Q pin of a second D flip-flop D2; the other end of the first capacitor C1 is grounded; the D pin of the second D trigger D2 is switched into high level; the Set pin is grounded; q is not suspending the pin; the Q pin is further connected to control terminals of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527 and the eighth single-pole double-throw switch 1528; the CLK pin is connected to pulse signal generation circuit 1513 to enable monostable flip-flop 1512 to obtain a rising edge clock signal.
At this time, the one shot 1512 is configured as a low-level stable one shot, that is, a high level is in an unstable state, and returns to a low-level stable state after a certain time.
The throwing direction of the stationary terminal interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527 and the eighth single-pole double-throw switch 1528 is controlled by a level signal output by a Q pin of the second D trigger D2 so as to change the connection relation between the stationary terminal interface z and the movable terminal interface x or y, including the condition that the stationary terminal interface z is connected with the first movable terminal interface x or the stationary terminal interface z is connected with the second movable terminal interface y, and further the hot plug process is simulated. That is, if the stationary ports z of the fifth, sixth, seventh and eighth single-pole double- throw switches 1525, 1526, 1527 and 1528 are all connected to the first moving port x, the plug-in state is simulated, and if the stationary ports z of the fifth, sixth, seventh and eighth single-pole double- throw switches 1525, 1526, 1527 and 1528 are all connected to the second moving port y, the plug-out state is simulated.
In the monostable flip-flop 1512, a low level signal is kept to be output temporarily in the future of the rising edge clock signal by a level signal output from the Q pin, so that the stationary-side interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527, and the eighth single-pole double-throw switch 1528 is kept connected to the first moving-side interface x, that is, an insertion state is kept. When the rising edge clock signal comes temporarily, that is, it indicates that the USB device is switching connection, at this time, the Q pin outputs a high level signal, so that the inactive terminal interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527 and the eighth single-pole double-throw switch 1528 is connected to the second active terminal interface y, that is, a pull-out state is simulated, then the high level signal output by the Q pin charges the first capacitor C1 through the first resistor R1, so that the Reset pin obtains a temporary high level signal, the level signal output by the Q pin returns to a low level signal, the first capacitor C1 discharges, the input level signal of the Reset pin returns to a low level signal and remains stable, so that the inactive terminal interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527 and the eighth single-pole double-throw switch 1528 returns to the first active terminal interface x, i.e. reverts to the inserted state.
The monostable trigger 1512 simulates a hot plug process, so that the problem that the USB device cannot be identified due to too fast switching in the connection switching process can be prevented, wherein the pulling-out time is determined by an RC circuit and is generally set to 50ms, so as to realize fast switching.
Further, the input end of the pulse signal generating circuit 1513 is used for being connected to the positive power supply of the third USB interface 13 or the fourth USB interface 14, and the output end thereof is connected to the monostable flip-flop 1512 and the bistable flip-flop 1511.
Specifically, the pulse signal generation circuit 1513 includes a second capacitor C2 and a second resistor R2. One end of the second capacitor C2 is connected to the second resistor R2, the CLK pin of the first D flip-flop D1 and the CLK pin of the second D flip-flop D2, and the other end is connected to the power supply positive electrode of the third USB interface 13 or the fourth USB interface 14; the other end of the second resistor R2 is connected to ground.
If the second capacitor C2 is connected to the positive power supply of the third USB interface 13, the third USB interface 13 is used to connect the positive power supply of the debugging device, so that the pulse signal generating circuit 1513 can generate a rising edge clock signal by using the power-down and power-up processes of the debugging device; if the second capacitor C2 is connected to the positive power supply of the fourth USB interface 14, the fourth USB interface 14 is to be used to connect the positive power supply of the debugging device, so that the pulse signal generating circuit 1513 can generate the rising edge clock signal by using the power-down and power-up processes of the debugging device.
Specifically, in the power-down and power-up processes of the debugging device, a stable high level is input into the second capacitor C2, the clock signal acquires a rising edge, the second capacitor C2 is charged, and the clock signal recovers a low level to wait for the next power-down and power-up processes to generate a rising edge clock signal.
Further, an input end of the power supply circuit 1514 is connected with power supply anodes of the third USB interface 13 and the fourth USB interface 14, respectively, and an output end of the power supply circuit 1514 is further used for being connected with power supply anodes of the first USB interface 11 and the second USB interface 12. The USB switching circuit is provided with a power supply by the USB main equipment to work.
Specifically, the power circuit 1514 is composed of two NPN triodes to form a wired or logic circuit, a collector (shown as c in fig. 2) of the first NPN triode is connected to a power source anode (shown as P-Vcc in fig. 2) and a base (shown as b in fig. 2) of the third USB interface 13, and an emitter (shown as e in fig. 2) of the first NPN triode is connected to an emitter (shown as e in fig. 2) of the second NPN triode, the first USB interface 11 and the second USB interface 12; the collector (c shown in fig. 2) of the second NPN transistor is connected to the positive power supply (S-Vcc shown in fig. 2) and the base (b shown in fig. 2) of the fourth USB interface 14, and the emitter (e shown in fig. 2) of the second NPN transistor is connected to the emitter (e shown in fig. 2) of the first NPN transistor, the first USB interface 11 and the second USB interface 12. In a saturation state, the voltage drop between the collector and the emitter of the NPN triode is 0.2V-0.3V, so that the voltage Vcc output by the power supply circuit 1514 can approach the USB power supply voltage, and the Vcc voltage is 4.8V.
The power supply circuit 1514 can ensure that any one of the third USB interface 13 and the fourth USB interface 14 in the USB switching circuit 10 connected to the USB host device can supply power to the USB switching circuit 10, and even if one USB host device is powered off, the USB switching circuit 10 can continue to operate.
Of course, in some alternative embodiments, the power circuit 1514 may also be connected to a battery, through which the USB switching circuit 10 is powered.
The following description will be made from an example of practical use. The third USB interface 13 of the USB switching circuit 10 is connected to a PC, the fourth USB interface 14 is connected to a STB, and the STB is a debugging device, at this time, the power supply circuit 1514 of the USB switching circuit 10 supplies power to the USB switching circuit 10, so that the bistable flip-flop 1511 controls the stationary end interface z of the first single-pole double-throw switch 1521, the second single-pole double-throw switch 1522, the third single-pole double-throw switch 1523, and the fourth single-pole double-throw switch 1524 to be connected to the first movable end interface x, the monostable flip-flop 1512 controls the stationary end interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527, and the eighth single-pole double-throw switch 1528 to be connected to the first movable end interface x, so that the first USB interface 11 is connected to the third USB interface 13, and the second USB interface 12 is connected to the fourth USB interface 14. When a first USB disk is inserted into the first USB interface 11 and a second USB disk is inserted into the second USB interface 12, an executable file can be compiled on a PC and copied to the first USB disk, when the executable file copied to the first USB disk needs to be debugged, the STB is restarted (when debugging equipment needs to be restarted after power down for each debugging), at this time, the positive power supply of the fourth USB interface 14 inputs a high level signal into the pulse signal generating circuit 1513, so that the pulse signal generating circuit 1513 generates a rising edge clock signal and sends the rising edge clock signal to the bistable flip-flop 1511 and the monostable flip-flop 1512, at this time, the Q pin of the first D flip-flop D1 of the bistable flip-flop 1511 outputs an inverted level signal (that is, if the last state is a low level signal, at this time, a high level signal is output, if the last state is a high level signal, at this time, a low level signal is output), and the first single-pole double-throw switch 1521, the second USB switch 1521, and the, The immobile terminal interface z of the second single-pole double-throw switch 1522, the third single-pole double-throw switch 1523 and the fourth single-pole double-throw switch 1524 is connected with the second mobile terminal interface y, meanwhile, the Q pin of the second D flip-flop D2 of the single-steady state flip-flop 1512 outputs a high level signal to control the immobile terminal interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527 and the eighth single-pole double-throw switch 1528 to be connected with the second mobile terminal interface y, a pull-out state is simulated, after a period of time (preferably 50ms, which is determined by an RC circuit), the level signal output by the Q pin of the second D flip-flop D2 is recovered to a low level signal, so that the immobile terminal interface z of the fifth single-pole double-throw switch 1525, the sixth single-pole double-throw switch 1526, the seventh single-pole double-throw switch 1527 and the eighth single-pole double-throw switch 1528 is recovered to the first mobile terminal interface x, and then the USB switching circuit is inserted into the USB interface x to recover to, at this time, the first USB interface 11 is connected to the fourth USB interface 14, the second USB interface 12 is connected to the third USB interface 13, that is, the first USB disk is connected to the STB, the second USB disk is connected to the PC, and the STB can execute the executable file copied to the first USB disk to perform debugging operations. Meanwhile, the switching can be realized without manually plugging and unplugging the USB slave equipment, the switching is very convenient, and the hot plug is simulated through the monostable trigger in the switching process, so that the problem that the USB equipment cannot be identified due to too fast switching in the switching and connecting process is prevented.
The embodiment of the invention has the beneficial effects that: in contrast to the prior art, an embodiment of the present invention provides a USB switching circuit and a switching system, where the USB switching circuit includes: first USB interface, second USB interface, third USB interface, fourth USB interface and switch circuit, wherein, switch circuit includes control circuit and switch module, is connected through control circuit and switch module's control end to and switch module and first USB interface, second USB interface, third USB interface, fourth USB interface connection, make control circuit can control first USB interface and third USB interface or fourth USB interface connection, control second USB interface and fourth USB interface or third USB interface connection, wherein, the one-to-one connection between first USB interface, second USB interface and third USB interface, the fourth USB interface. When the USB slave equipment is connected with the USB master equipment through the USB switching circuit, the switching connection of the USB slave equipment can be realized without manually plugging and unplugging the USB slave equipment, so that the cross debugging work is more convenient to carry out, and the cross debugging efficiency is improved.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (8)
1. A USB switching circuit, comprising:
a first USB interface (11), a second USB interface (12), a third USB interface (13), a fourth USB interface (14) and a switch circuit (15);
the switch circuit (15) comprises a control circuit (151) and a switch assembly (152), wherein the switch assembly (152) comprises a first single-pole double-throw switch (1521), a second single-pole double-throw switch (1522), a third single-pole double-throw switch (1523), a fourth single-pole double-throw switch (1524), a fifth single-pole double-throw switch (1525), a sixth single-pole double-throw switch (1526), a seventh single-pole double-throw switch (1527) and an eighth single-pole double-throw switch (1528), wherein each single-pole double-throw switch comprises a first moving end interface, a second moving end interface and a fixed end interface;
the first USB interface (11), the second USB interface (12), the third USB interface (13) and the fourth USB interface (14) are all connected with the switch component (152), specifically, a stationary end interface of the first single-pole double-throw switch (1521) is connected with a first moving end interface of the fifth single-pole double-throw switch (1525), a first moving end interface of the first single-pole double-throw switch (1521) is connected with a data positive electrode of the first USB interface (11), a second moving end interface of the first single-pole double-throw switch (1521) is connected with a data positive electrode of the second USB interface (12),
a fixed end interface of the second single-pole double-throw switch (1522) is connected with a first movable end interface of the sixth single-pole double-throw switch (1526), a first movable end interface of the second single-pole double-throw switch (1522) is connected with a data negative electrode of the first USB interface (11), a second movable end interface of the second single-pole double-throw switch (1522) is connected with a data negative electrode of the second USB interface (12),
a fixed end interface of the third single-pole double-throw switch (1523) is connected with a first movable end interface of the seventh single-pole double-throw switch (1527), a first movable end interface of the third single-pole double-throw switch (1523) is connected with a data positive electrode of the second USB interface (12), a second movable end interface of the third single-pole double-throw switch (1523) is connected with a data positive electrode of the first USB interface (11),
a fixed end interface of the fourth single-pole double-throw switch (1524) is connected with a first movable end interface of the eighth single-pole double-throw switch (1528), a first movable end interface of the fourth single-pole double-throw switch (1524) is connected with a data negative electrode of the second USB interface (12), a second movable end interface of the fourth single-pole double-throw switch (1524) is connected with a data negative electrode of the first USB interface (11),
a second movable end interface of the fifth single-pole double-throw switch (1525) is suspended, a fixed end interface of the fifth single-pole double-throw switch (1525) is connected with a data positive electrode of a third USB interface (13),
a second movable end interface of the sixth single-pole double-throw switch (1526) is suspended, a fixed end interface of the sixth single-pole double-throw switch (1526) is connected with a data negative electrode of a third USB interface (13),
a second movable end interface of the seventh single-pole double-throw switch (1527) is suspended, a fixed end interface of the seventh single-pole double-throw switch (1527) is connected with a data positive electrode of a fourth USB interface (14),
a second movable end interface of the eighth single-pole double-throw switch (1528) is suspended, and a fixed end interface of the eighth single-pole double-throw switch (1528) is connected with a data negative electrode of a fourth USB interface (14);
the control circuit (151) is connected with a control end of the switch component (152), specifically, the control circuit (151) is respectively connected with control ends of the first single-pole double-throw switch (1521), the second single-pole double-throw switch (1522), the third single-pole double-throw switch (1523), the fourth single-pole double-throw switch (1524), the fifth single-pole double-throw switch (1525), the sixth single-pole double-throw switch (1526), the seventh single-pole double-throw switch (1527) and the eighth single-pole double-throw switch (1528);
the switch component (152) is controlled by the control circuit (151) to enable the first USB interface (11) to be connected with the third USB interface (13) or the fourth USB interface (14), the second USB interface (12) to be connected with the fourth USB interface (14) or the third USB interface (13), wherein the first USB interface (11), the second USB interface (12), the third USB interface (13) and the fourth USB interface (14) are connected in a one-to-one correspondence mode.
2. The USB switching circuit according to claim 1, wherein the control circuit (151) comprises a flip-flop (1511), and the flip-flop (1511) is connected to the control terminals of the first single-pole double-throw switch (1521), the second single-pole double-throw switch (1522), the third single-pole double-throw switch (1523), and the fourth single-pole double-throw switch (1524), respectively.
3. The USB switching circuit according to claim 2, wherein the flip-flop (1511) comprises a first D flip-flop D1, the first D flip-flop D1 comprising a D pin, a Reset pin, a Set pin, a CLK pin, a Q pin, and a QNOT pin;
the Q pin is connected with the D pin;
the Q pin is respectively connected with the control ends of the first single-pole double-throw switch (1521), the second single-pole double-throw switch (1522), the third single-pole double-throw switch (1523) and the fourth single-pole double-throw switch (1524);
the Reset pin and the Set pin are grounded.
4. The USB switching circuit according to claim 3, wherein the control circuit (151) further comprises a single-shot flip-flop (1512), and the single-shot flip-flop (1512) is respectively connected to the control terminals of the fifth single-pole double-throw switch (1525), the sixth single-pole double-throw switch (1526), the seventh single-pole double-throw switch (1527), and the eighth single-pole double-throw switch (1528).
5. The USB switching circuit of claim 4, wherein the monostable flip-flop (1512) comprises a second D flip-flop D2, a first resistor R1, and a first capacitor C1;
the second D flip-flop D2 comprises a D pin, a Reset pin, a Set pin, a CLK pin, a Q pin and a Q not pin;
one end of the first resistor R1 is connected with the Q pin, the other end is connected with the Reset pin and the first capacitor C1, and the other end of the first capacitor C1 is grounded;
the Q pin is also connected with the control ends of a fifth single-pole double-throw switch (1525), a sixth single-pole double-throw switch (1526), a seventh single-pole double-throw switch (1527) and an eighth single-pole double-throw switch (1528);
the Q non-pin is suspended;
the D pin is connected with a high level;
the Set pin is grounded.
6. The USB switching circuit according to claim 5, wherein the control circuit (151) further comprises:
the input end of the pulse signal generating circuit (1513) is used for being connected with the power supply anode of the third USB interface (13) or the fourth USB interface (14), and the output end of the pulse signal generating circuit (1513) is connected with the monostable flip-flop (1512) and the bistable flip-flop (1511).
7. The USB switching circuit according to any one of claims 1 to 6, wherein the control circuit (151) further includes a power supply circuit (1514), the power supply circuit (1514) is an wired-or logic circuit, an input terminal of the power supply circuit (1514) is connected to power supply positive electrodes of the third USB interface (13) and the fourth USB interface (14), respectively, and an output terminal of the power supply circuit (1514) is further configured to be connected to power supply positive electrodes of the first USB interface (11) and the second USB interface (12).
8. A USB switching system, comprising:
-a first USB slave device (20), a second USB slave device (30), a first USB master device (40), a second USB master device (50) and a USB switching circuit (10) according to any of claims 1 to 7;
the first USB slave device (20) and the second USB slave device (30) are connected with the first USB interface (11) and the second USB interface (12), and the first USB master device (40) and the second USB master device (50) are connected with the third USB interface (13) and the fourth USB interface (14).
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| CN110781111B (en) * | 2019-10-23 | 2020-12-01 | 北京计算机技术及应用研究所 | But real-time supervision's dual-redundancy USB port extension device |
| CN112881951B (en) * | 2021-01-15 | 2023-06-23 | 上海闻泰信息技术有限公司 | Interface plug analog circuit |
| CN112905116B (en) * | 2021-02-08 | 2021-10-22 | 上海豹云网络信息服务有限公司 | Data storage method of memory comprising bidirectional split interface |
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