CN108154903A - The write-in control method and device of flash memory, reading and control method thereof and device and storage system - Google Patents
The write-in control method and device of flash memory, reading and control method thereof and device and storage system Download PDFInfo
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0411—Online error correction
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Abstract
Disclose write-in control method and device, reading and control method thereof and device and the storage system of a kind of flash memory.The write-in control method of the flash memory, including：According to first method cutting initial data, to obtain multiple first data；According to second method cutting initial data, to obtain multiple second data, one in any one and the multiple second data in the multiple first data has common ground；The multiple first data is encoded, to obtain multiple first code element data；The multiple second data is encoded, to obtain multiple second code element data；And the corresponding storage location by the initial data, the multiple first code element data and the multiple second code element data storage to the flash memory.By storing the coded data of two dimensions, the ability of ECC circuit decoding and error correction is improved, and then promote the reliability and product yield of flash memory.
Description
Technical field
The present invention relates to a kind of write-in control method of flash memory of flash memory and device, reading and control method thereofs
And device and storage system.
Background technology
Flash memory (flash) is a kind of non-volatile memory, be widely used in memory card, solid state disk and
The electronic equipments such as portable multimedia player (portable multimedia players).Flash memory can be divided into N0R
Type flash memory and NAND type flash memory.
In order to guarantee data security, the controller of flash memory is usually provided with ECC (Error Checking and
Correction) circuit, for data recovery and correction process.ECC circuit is arranged on the control terminal of flash memory, in data
Write phase will be based on initial data coding and generate in coded data storage to flash memory, in the digital independent stage, to compiling
Code data could obtain initial data into row decoding.By ECC coding and decoding circuits can reduce the bit error rate of flash memory with
And improve product yield.
But with the rise of the development of flash memory process technique, especially 3D NAND type flash memories so that
3D NAND type flash memories are in terms of the otherness of yield and the bit error rate (BER, Bit Error Rate) than previous 2D
(planr) NAND type flash memory is come much, particularly in abnormal power-down, the memory block of 3D NAND type flash memories
(block) it occur frequently that the bit error rate of 1~2 memory page (page), much larger than the bit error rate of whole flash memory, and
And it can not be corrected by ECC circuit.
Invention content
In view of this, the embodiment of the present invention propose a kind of flash memory write-in control method and reading and control method thereof and
Device, the coding of two dimensions of progress and decoding, further to reduce the bit error rate of flash memory, promote flash memory
Reliability and product yield.
According to the first aspect of the invention, a kind of write-in control method of flash memory is provided, including：
According to first method cutting initial data, to obtain multiple first data；
It is arbitrary in the multiple first data to obtain multiple second data according to second method cutting initial data
One has common ground with one in the multiple second data；
The multiple first data is encoded, to obtain multiple first code element data；
The multiple second data is encoded, to obtain multiple second code element data；And
The initial data, the multiple first code element data and the multiple second code element data are stored to described fast
The corresponding storage location of flash memory.
Preferably, the first method according to initial data described in the semantic direction cutting of initial data to obtain multiple
One data, each first data in the multiple first data of second method cutting, to obtain multiple diced parts, with
And the multiple diced part is formed into the multiple second data, also, form multiple diced parts of each second data
At least from two the first data.
Preferably, each first data storage is in a memory page, and each second data storage is in multiple memory pages.
Preferably, first data, the first data and the first code element data are stored in same memory block, institute
It states in the memory page after second code element data are stored in corresponding memory block.
Preferably, the multiple first data is encoded using the first coding method；And use the second coding staff
Method encodes the multiple second data.
Preferably, first coding method is LDPC coding methods, and second coding method is RS coding methods.
According to the second aspect of the invention, a kind of reading and control method thereof of flash memory is provided, for reading above-mentioned write
Access control method is written to the data in flash memory, including：
Coded data is read from the corresponding position of the flash memory, the coded data includes initial data, first
Symbol data and second code element data；And
Decoding is iterated to the initial data according to the first code element data and the second code element data and is entangled
It is wrong.
Preferably, it is described to be changed according to the first code element data and the second code element data to the initial data
Generation decoding and error correction include：
Using first coding method to the first code element data into row decoding and error correction；
According to the decoding of the first code element data as a result, being carried out using the second coding method to the second code element data
Decoding and error correction；And
According to the decoding of the second code element data as a result, using first coding method to the first code element data
Into row decoding and error correction.
Preferably, it further includes：It is decoded when all code words using first coding method and using the second coding method
All code words fail after, stop decoding.
According to the third aspect of the invention we, a kind of write-in control device of flash memory is provided, including：
Cutting module, for according to first method cutting initial data, to obtain multiple first data；And according to second
Mode cutting initial data, to obtain multiple second data, any one in the multiple first data and the multiple the
One in two data has common ground；
First coding module, for being encoded to the multiple first data, to obtain multiple first code element data；
Second coding module, for being encoded to the multiple second data, to obtain multiple second code element data；With
And
Storage control module, for by the initial data, the multiple first code element data and the multiple second code
Metadata stores the corresponding storage location to the flash memory.
Preferably, cutting module is provided according to initial data described in the semantic direction cutting of initial data with obtaining multiple first
Material, and each first data in the multiple first data of cutting, to obtain multiple diced parts, by the multiple cutting
Part forms the multiple second data, also, forms multiple diced parts of each second data at least from two first
Data.
Preferably, the storage control module controls each first data storage in a memory page and each the
Two data storages are in multiple memory pages.
Preferably, the storage control module controls first data, the first data and the first code element data to deposit
It is stored in same memory block and the second code element data is stored in the memory page after corresponding memory block.
Preferably, first coding module encodes the multiple first data using the first coding method；Institute
The second coding module is stated to encode the multiple second data using the second coding method.
Preferably, first coding method is LDPC coding methods, and second coding method is RS coding methods.
Preferably, for reading according to the write-in control device of claim 10 to 15 any one of them flash memory
The data being written in flash memory, including：
Read module, for reading coded data from the corresponding position of the flash memory, the coded data includes
Initial data, first code element data and second code element data；
First decoding module, for according to the first code element data into row decoding and error correction；
Second decoding module, for according to the second code element data into row decoding and error correction；
Iteration control module, according to control first decoding module and second decoding module be iterated decoding and
Error correction.
Preferably, it further includes：The iteration control module judges to use all code words of first coding method and adopt
After being failed with all code words that the second coding method decodes, stop decoding.
According to the fourth aspect of the invention, a kind of storage system is provided, including flash memory and Memory Controller,
The controller includes above-mentioned write-in control device and above-mentioned read control device.
Write-in control method provided by the invention carries out initial data the coding of two dimensions, to obtain first code element
Data and second code element data are simultaneously stored, while provide reading and control method thereof, pass through first code element data and second code element
Data iterative decoding obtains initial data.The write-in and reading and control method thereof improve the wrong yardage that ECC circuit can be handled
Amount, and then improve the reliability of flash memory.
Description of the drawings
By referring to description of the following drawings to the embodiment of the present invention, the above and other purposes of the present invention, feature and
Advantage will be apparent from, in the accompanying drawings：
Fig. 1 is the structure chart of flash memory system；
Fig. 2 is that the structural diagrams of the write-in control device of the embodiment of the present invention are intended to；
Fig. 3 is the storage schematic diagram after initial data is encoded according to a first embodiment of the present invention；
Fig. 4 is the storage schematic diagram after initial data is encoded according to a second embodiment of the present invention；
Fig. 5 is the storage schematic diagram after initial data is encoded according to a third embodiment of the present invention.
Fig. 6 is that the structural diagrams of the read control device of the embodiment of the present invention are intended to；
Fig. 7 is the flow chart of the write-in control method of the embodiment of the present invention；
Fig. 8 is the flow chart of the reading and control method thereof of the embodiment of the present invention.
Specific embodiment
Hereinafter reference will be made to the drawings is more fully described the present invention.In various figures, identical element is using similar attached
Icon is remembered to represent.For the sake of clarity, the various pieces in attached drawing are not necessarily to scale.Furthermore, it is possible to it is not shown certain
Well known part.
Fig. 1 is the structure chart of flash memory system.
The flash memory system 100 is, for example, the computer system using solid state disk (SSD).The computer system includes host
130.Solid state disk includes flash memory 110 and storage control device 120.
Host 130 accesses memory 130 via storage control device 120.In the flash memory system, storage data are original
The coded data that beginning data are generated by coding could obtain initial data in reading process to storage data decoding.Host
110 for example including processor.In use state, the processor loading procedure or reading data, Yi Jixiang from memory 130
Data are written in memory 130.
Flash memory 110 is made of multiple memory page P_0 to P_N, and each memory page includes multiple by floating gate
The memory cell M_0 to M_K that gated transistors are formed stores one or more bits (bit) in each memory cell
Data.Storage control device 120 to the control grid of transistor by providing appropriate detection voltage, to read memory list
The data of member storage.For example, it is assumed that memory cell M_0 stores the data of 3 bits, you can with the binary data of storage
It is 000,001,010,011,100,101,110,111 (23), then storage control device 120 need to set 8 detection voltages,
And it is based respectively on the binary data that above-mentioned 8 detections voltage is read out memory cell storage.This has been only assumed as explanation
Purpose, be not limited thereto.
Memory Controller 120 is, for example, individual IC chip, including read control device (not shown) and is write
Enter control device (not shown), be respectively used to the reading and write-in of control flash memory 110.During write operation, write-in
Controller encodes initial data, so as to generate storage data, so as to store in data write-in flash memory 110.
During read operation, Read Controller obtains storage data from flash memory 110, then original to obtain into row decoding
Data.
Fig. 2 is that the structural diagrams of the write-in control device of the embodiment of the present invention are intended to.
With reference to figure 2, write-in control device 121 includes cache module 200, ECC coding circuits 201 and storage control module
205。
Cache module 200 is sent to ECC coding circuits for receiving the initial data sent from host 130.
After ECC coding circuits 201 receive initial data, initial data is encoded, generates coded data.Here
Coded data includes two parts content：Initial data and symbol data.Symbol data is the selected number in initial data
According to the data for carrying out coding acquisition, for restoring when read error occurs and correcting error data.ECC coding circuits stream at present
Capable coding method is including LDPC, RS and BCH etc..
Storage control module 205 for coded data to be written, by coded data be written to corresponding memory block (block) and
In memory page (page).The memory space of flash memory can be divided into memory block (block), and each memory block includes several storages
Page, each memory page include several bytes (such as including 4K bytes), and each byte is 8 bits (bit).Different model it is fast
Flash memory may have different size of memory block and memory page.In existing flash memory standards, a memory block packet
Containing 64 memory pages, a memory page includes 4k bytes, but the present invention is not limited.NAND quick-flash memory using memory page as
Unit is read and writen, and is wiped as unit of block.
In this example, ECC coding circuits further comprise the first coding module 202, the second coding module 203 and dividing die
Block 204.Cutting module 204 is used for according to first method cutting initial data, obtains multiple first data and according to second party
Formula cutting initial data, obtains multiple second data, one in any one and multiple second data in multiple first data
It is a that there is common ground.Initial data is for example carried out cutting by first method according to the semantic direction of initial data.For example, according to
The size cutting initial data of memory page, the i.e. initial data of 100k can be using cuttings as 100k/4k=25 the first data.The
First data is for example sub-partitioned into multiple diced parts by two modes, chooses at least one diced part group of multiple first data
Into the second data.Such as previously mentioned, the first data of 4k is divided into two diced parts, the first cutting of 25 the first data
Part the second data of composition, the second diced part of 25 the first data form the second data.But the slit mode of the present invention is not
As limit.
First coding module 202 obtains first code element data for being encoded according to the first data and first.The
Two coding modules 203 are encoded according to the second data and the second coding method, obtain second code element data.First code element data
It is written in corresponding memory page by storage control module 205 with second code element data and initial data.Optionally, it first compiles
Code method and the second coding method are respectively LDPC (Low Density Parity Check Code), RS (Reed Solomon
) and one kind in BCH (Bose, Ray, Hocquenghem) Code.
The present embodiment is further detailed below in conjunction with attached drawing.
Fig. 3 is the storage schematic diagram after initial data is encoded according to a first embodiment of the present invention.Fig. 3 is with one
It is illustrated for the block of NAND quick-flash memory.The block includes 256 memory page page0 to page255,
Initial data Din and symbol data PageCode0~PageCode255 are stored in memory page page0 to page255 respectively,
Memory page page256~page257 storage symbol datas columnCode0~columnCode15.Symbol data
PageCode0~PageCode255 be according to the symbol data of the Raw Data Generation in a corresponding memory page,
ColumnCode0~columnCode15 is the symbol data of the Raw Data Generation in corresponding multiple memory pages.Tool
Body, it is assumed that a memory page can store the data of 20K bytes, then retain 4K bytes storage symbol data, then residue 16K words
Section storage initial data, while 16K memory spaces are cut into 16 equal portions, it combines in PageCode0~PageCode255 in phase
With the data stored in the memory space of position and coded treatment is carried out to it, obtain 16 symbol data columnCode0~
columnCode15.Symbol data columnCode0~columnCode15 is stored to the memory page after block respectively
In page256~page257.Two-dimentional symbol data has been obtained as a result,：Horizontal and vertical symbol data.Two-dimentional symbol data has
Conducive to data decoding is carried out, especially when read error occurs for data, two-dimentional symbol data can be based on and be iterated error correction, from
And improve the error correcting capability of ECC circuit.
It should be noted that in this example, identical or different coding method generation may be used in symbol data, for example,
It is generated using LDPC coding methods, alternatively, lateral symbol data is generated using LDPC coding methods, longitudinal symbol data is adopted
It is generated with RS coding methods.
Fig. 4 is the storage schematic diagram after initial data is encoded according to a second embodiment of the present invention.
Fig. 4 is illustrated by taking the block of a NAND quick-flash memory as an example.The block includes 256 memory pages
Page0 to page255 stores initial data Din and symbol data PageCode0 respectively in memory page page0 to page255
~PageCode255, in memory page page256~page257 storage symbol datas columnCode0~columnCode15.
Wherein, PageCode0~PageCode255 is that the data of corresponding memory page memory storage are carried out with the code that LDPC codings generate
Metadata.The difference lies in columnCode0~columnCode15 is using different code words (code word) with Fig. 3
Carry out the symbol data that RS codings obtain.Specifically, as shown in the figure, it is assumed that a memory page can store the data of 20K bytes,
Then retain 4K bytes storage symbol data, then residue 16K bytes storage initial data, while 16K memory spaces are uniformly cut
For 16 equal portions, RS codings are carried out using same code word by being combined in the memory page of odd-numbered line per 2k data, by even number
Every 2k data in capable memory page are combined to be encoded using same code word, generates symbol data.It is in addition, adjacent
Data as possible using different code words, for example, tetra- kinds of code words of RS0-RS3 are respectively adopted in the adjacent data of upper figure.Due to adjacent
Data coding generation symbol data is carried out using different code words so that during reading, entire memory page reads the possibility of failure
Property reduce, such as adjacent data can be decoded by adjacent symbol data and notebook data etc. judged by adjacent data, from
And the possibility that memory page is made to read failure substantially reduces.
Fig. 5 is the storage schematic diagram after initial data is encoded according to a third embodiment of the present invention.
Fig. 5 is illustrated by taking the block of two NAND quick-flash memories as an example.In this example, horizontal direction is according to storage
Page is encoded, i.e., with it is identical shown in Fig. 3-4, the coding mode and Fig. 3 and 4 used in longitudinal direction is different.In this example, will
Two block carry out longitudinal coding as an entirety.Odd-numbered line and even number line are encoded using RS, but odd-numbered line and
Code word of the even number line for coding differs, therefore be distinguished as RS0 and RS1.And then two after first block
The symbol data generated based on RS0 is stored in a memory page, stores and is based in two memory pages after second block
The symbol data that RS1 is generated.By the way that corresponding symbol data in a block is stored in two different positions, can drop
Low symbol data is damaged or is read the probability of mistake, and then can reduce the bit error rate.
It should be noted that Fig. 3~Fig. 5 is served only for illustratively describing, in fact, the storage location of symbol data can be with
Arbitrary variation, can both be stored in same memory block, memory page or adjacent memory block with initial data, can also be stored in
In other memory blocks.
Fig. 6 is that the structural diagrams of the read control device of the embodiment of the present invention are intended to.
With reference to figure 6, read control device 122 includes storage control module 300 and ECC decoding circuits 301.
Storage control module 300 reads coded data according to control signal from corresponding memory block and memory page.Coding
Data include initial data and symbol data.
ECC decoding circuits 301 obtain the data stored in memory cell, to coded data into row decoding, line number of going forward side by side
According to correction process.ECC decoding circuits include iteration control module 303, the first decoding module 304 and the second decoding module 305.Repeatedly
For control module 303 for controlling iterative decoding process, that is, control the friendship of the first decoding module 304 and the second decoding module 305
For execution.First decoding module 304 is used to use the first coding method into row decoding error correction.Second decoding module 305 is used to adopt
With the second interpretation method into row decoding error correction.Moreover, when the first decoding module and the equal decoding failure of the second decoding module, at this moment
More initial data can not be translated by alternately decoding error correction, should stop decoding at this time.
It illustrates., can be first using the first coding method into row decoding corresponding to the data of the write-in of Fig. 3, decoding is deposited
Store up the data of page Page0~Page255, but if during decoding Page10 decoding failures, pass through the second coding staff
Method to columnCode0~columnCode15 into row decoding, in being decoded in first time, by Page0~Page9
And the data decoding success of Page11~Page255 storages, then it can be solved based on columnCode0~columnCode15
Go out the initial data on the corresponding position of Page10.All initial data are obtained by iteration twice.Certainly, in others
In the case of, it may be necessary to iteration more than twice obtains all initial data.Similarly, data Fig. 4 and Fig. 5 being written,
Can also decoding error correction be iterated by the first decoding module and the second decoding module, it is higher successfully decoded so as to obtain
Rate.
Fig. 7 is the flow chart of the write-in control method of the embodiment of the present invention.Said write control method is applied to flash memory
Reservoir specifically includes following steps.
In step s 701, according to first method cutting initial data, to obtain multiple first data.
In step S702, according to second method cutting initial data, to obtain multiple second data.
Initial data is such as binary data, ascii data.Multiple first is obtained by two different slit modes
Data and multiple second data.Any one first data and at least one second data have common ground.
In step S703, multiple first data are encoded, to obtain multiple first code element data.
In step S704, multiple second data are encoded, to obtain multiple second code element data.
First code element data and second code element data are generated by a variety of coding methods such as LDPC, BCH and RS.
In step S705, by initial data, multiple first code element data and multiple second code element data storage to quick flashing
The corresponding storage location of memory.
Initial data, first code element data and second code element data can disperse to be stored in the corresponding positions of flash memory
It puts, for example, initial data is stored according to memory page, the storage data being stored with behind each memory page in the memory page correspond to
First code element data.Second code element data and initial data are stored in same memory block or are stored in initial data
In memory page after affiliated memory block.
Fig. 8 is the flow chart of the reading and control method thereof of the embodiment of the present invention.The reading and control method thereof is applied to flash memory
Reservoir, the write-in control method for reading above-described embodiment are written to the data in flash memory, specifically include following step
Suddenly.
In step S801, from the corresponding position of flash memory read coded data, coded data include initial data,
First code element data and second code element data.
In step S802, decoding is iterated to initial data according to first code element data and second code element data and is entangled
It is wrong.When the initial data of reading mistake occurs or needs to verify initial data, iterative decoding may be used and error correction carries out
Inspection and error correction.For first code element data by the first coding method into row decoding, second code element data pass through the second coding method
Into row decoding, in the process, such as the correct data that all code words of the first coding method obtain can be updated to second
During the decoding of coding method, more correct data are obtained, until finally obtaining all initial data or up to most
Until more data can not be decoded out eventually.
In conclusion write-in control method provided by the invention carries out the volume of two dimensions when flash memories are written
Code, and the coded data of two dimensions is stored, so as to improve the decoding of ECC circuit and error correcting capability, and then improve flash memory
The reliability and product yield of memory.
Although the embodiment of the present invention is disclosed as above with preferred embodiment, its be not for limiting claim, it is any
Those skilled in the art without departing from the spirit and scope of the present invention, can make possible variation and modification, therefore this
The protection domain of invention should be subject to the range that the utility model claims are defined.
The foregoing is merely the preferred embodiment of the present invention, are not intended to restrict the invention, for those skilled in the art
For, the present invention can have various modifications and changes.All any modifications made within spirit and principles of the present invention are equal
Replace, improve etc., it should all be included in the protection scope of the present invention.
Claims (18)
1. a kind of write-in control method of flash memory, including：
According to first method cutting initial data, to obtain multiple first data；
Any one according to second method cutting initial data, to obtain multiple second data, in the multiple first data
There is common ground with one in the multiple second data；
The multiple first data is encoded, to obtain multiple first code element data；
The multiple second data is encoded, to obtain multiple second code element data；And
By the initial data, the multiple first code element data and the multiple second code element data storage to the flash memory
The corresponding storage location of reservoir.
2. write-in control method according to claim 1, wherein, the first method according to initial data semantic direction
Initial data described in cutting is to obtain multiple first data, and each in the multiple first data of second method cutting
One data, to obtain multiple diced parts and the multiple diced part is formed the multiple second data, also, group
Into each second data multiple diced parts at least from two the first data.
3. write-in control method according to claim 2, wherein, each first data storage is in a memory page, often
A second data storage is in multiple memory pages.
4. write-in control method according to claim 3, wherein, first data, the first data and first yard described
Metadata is stored in same memory block, and the second code element data are stored in the memory page after corresponding memory block.
5. write-in control method according to claim 1, wherein, using the first coding method to the multiple first data
It is encoded；And the multiple second data is encoded using the second coding method.
6. write-in control method according to claim 4, wherein, first coding method is LDPC coding methods, institute
The second coding method is stated as RS coding methods.
7. a kind of reading and control method thereof of flash memory, for reading write-in control according to any one of claims 1 to 6
Method processed is written to the data in flash memory, including：
Coded data is read from the corresponding position of the flash memory, the coded data includes initial data, first code element
Data and second code element data；And
Decoding and error correction are iterated to the initial data according to the first code element data and the second code element data.
8. reading and control method thereof according to claim 7, wherein, it is described according to the first code element data and described second
Symbol data is iterated decoding to the initial data and error correction includes：
Using first coding method to the first code element data into row decoding and error correction；
According to the decoding of the first code element data as a result, using the second coding method to the second code element data into row decoding
And error correction；And
According to the decoding of the second code element data as a result, being carried out using first coding method to the first code element data
Decoding and error correction.
9. reading and control method thereof according to claim 8, further includes：When all code words using first coding method
After using the equal decoding failure of all code words of the second coding method, stop decoding.
10. a kind of write-in control device of flash memory, including：
Cutting module, for according to first method cutting initial data, to obtain multiple first data；And according to second method
Cutting initial data, to obtain multiple second data, any one in the multiple first data and the multiple second money
One in material has common ground；
First coding module, for being encoded to the multiple first data, to obtain multiple first code element data；
Second coding module, for being encoded to the multiple second data, to obtain multiple second code element data；And
Storage control module, for by the initial data, the multiple first code element data and the multiple second code element number
According to the corresponding storage location of storage to the flash memory.
11. write-in control device according to claim 9, wherein, cutting module is cut according to the semantic direction of initial data
Divide the initial data to obtain multiple first data, and each first data in the multiple first data of cutting, with
Multiple diced parts are obtained, the multiple diced part is formed into the multiple second data, also, form each second data
Multiple diced parts at least from two the first data.
12. write-in control device according to claim 11, wherein, the storage control module controls each first data
It is stored in a memory page and each second data storage is in multiple memory pages.
13. write-in control device according to claim 12, wherein, storage control module control first money
Material, the first data and first code element data are stored in same memory block and the second code element data are stored in phase
In memory page after the memory block answered.
14. write-in control device according to claim 10, wherein, first coding module uses the first coding method
The multiple first data is encoded；Second coding module is using the second coding method to the multiple second data
It is encoded.
15. write-in control device according to claim 14, wherein, first coding method is LDPC coding methods,
Second coding method is RS coding methods.
16. a kind of read control device of flash memory, fast according to claim 10 to 15 any one of them for reading
The write-in control device of flash memory is written to the data in flash memory, including：
Read module, for reading coded data from the corresponding position of the flash memory, the coded data includes original
Data, first code element data and second code element data；
First decoding module, for according to the first code element data into row decoding and error correction；
Second decoding module, for according to the second code element data into row decoding and error correction；
Iteration control module is iterated according to first decoding module and second decoding module is controlled and decodes and entangle
It is wrong.
17. according to a kind of read control device of flash memory, further include：The iteration control module is judged using described the
After all code words of one coding method and all code words that the second coding method is used to decode fail, stop decoding.
18. a kind of storage system, including flash memory and Memory Controller, the controller includes claim 10-
15 any one of them write-in control devices and claim 16-17 any one of them read control devices.
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| US9230684B2 (en) * | 2012-12-19 | 2016-01-05 | Kabushiki Kaisha Toshiba | Memory controller, storage device, and memory control method |
| CN107402829A (en) * | 2016-04-05 | 2017-11-28 | 阿里巴巴集团控股有限公司 | For detecting and correcting equipment, the method and computer program product of bit-errors |
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| US9230684B2 (en) * | 2012-12-19 | 2016-01-05 | Kabushiki Kaisha Toshiba | Memory controller, storage device, and memory control method |
| CN107402829A (en) * | 2016-04-05 | 2017-11-28 | 阿里巴巴集团控股有限公司 | For detecting and correcting equipment, the method and computer program product of bit-errors |
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