CN108139976B - 用于促进移出的预取标记 - Google Patents

用于促进移出的预取标记 Download PDF

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Publication number
CN108139976B
CN108139976B CN201580080376.0A CN201580080376A CN108139976B CN 108139976 B CN108139976 B CN 108139976B CN 201580080376 A CN201580080376 A CN 201580080376A CN 108139976 B CN108139976 B CN 108139976B
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cache
data
processor
likelihood
shared
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CN108139976A (zh
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谢尔·斯文森
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Ampere Computing LLC
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Ampere Computing LLC
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/126Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CN201580080376.0A 2015-05-13 2015-07-30 用于促进移出的预取标记 Active CN108139976B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/710,837 2015-05-13
US14/710,837 US9971693B2 (en) 2015-05-13 2015-05-13 Prefetch tag for eviction promotion
PCT/US2015/042792 WO2016182588A1 (en) 2015-05-13 2015-07-30 Prefetch tag for eviction promotion

Publications (2)

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CN108139976A CN108139976A (zh) 2018-06-08
CN108139976B true CN108139976B (zh) 2020-10-27

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US (2) US9971693B2 (cg-RX-API-DMAC7.html)
EP (1) EP3295314A4 (cg-RX-API-DMAC7.html)
JP (1) JP6497831B2 (cg-RX-API-DMAC7.html)
CN (1) CN108139976B (cg-RX-API-DMAC7.html)
WO (1) WO2016182588A1 (cg-RX-API-DMAC7.html)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10176120B2 (en) 2017-02-22 2019-01-08 International Business Machines Corporation Cache prefetching in offloaded data transfer (ODX)
KR102353859B1 (ko) * 2017-11-01 2022-01-19 삼성전자주식회사 컴퓨팅 장치 및 비휘발성 듀얼 인라인 메모리 모듈
CN110442382B (zh) * 2019-07-31 2021-06-15 西安芯海微电子科技有限公司 预取缓存控制方法、装置、芯片以及计算机可读存储介质
US12223169B2 (en) * 2022-03-17 2025-02-11 Lenovo Global Technology (United States) Inc. Far memory direct caching
KR20240096090A (ko) 2022-12-19 2024-06-26 에스케이하이닉스 주식회사 메모리 간의 접속 지연의 차이를 개선한 스위칭 컨트롤러, 스토리지 장치 및 컴퓨팅 시스템
US12386508B2 (en) 2023-05-09 2025-08-12 Samsung Electronics Co., Ltd. Systems and methods for cache management of a storage device

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4731739A (en) 1983-08-29 1988-03-15 Amdahl Corporation Eviction control apparatus
JPH10320285A (ja) * 1997-05-20 1998-12-04 Toshiba Corp キャッシュメモリ及び情報処理システム
GB2348024B (en) 1999-03-16 2003-06-25 Ibm Cache memory systems
US6925534B2 (en) 2001-12-31 2005-08-02 Intel Corporation Distributed memory module cache prefetch
US6990557B2 (en) 2002-06-04 2006-01-24 Sandbridge Technologies, Inc. Method and apparatus for multithreaded cache with cache eviction based on thread identifier
US7555633B1 (en) 2003-11-03 2009-06-30 Advanced Micro Devices, Inc. Instruction cache prefetch based on trace cache eviction
US7130965B2 (en) 2003-12-23 2006-10-31 Intel Corporation Apparatus and method for store address for store address prefetch and line locking
JP4045296B2 (ja) 2004-03-24 2008-02-13 松下電器産業株式会社 キャッシュメモリ及びその制御方法
US7558920B2 (en) 2004-06-30 2009-07-07 Intel Corporation Apparatus and method for partitioning a shared cache of a chip multi-processor
US7840761B2 (en) 2005-04-01 2010-11-23 Stmicroelectronics, Inc. Apparatus and method for supporting execution of prefetch threads
GB0603552D0 (en) * 2006-02-22 2006-04-05 Advanced Risc Mach Ltd Cache management within a data processing apparatus
US7493452B2 (en) 2006-08-18 2009-02-17 International Business Machines Corporation Method to efficiently prefetch and batch compiler-assisted software cache accesses
GB0722707D0 (en) * 2007-11-19 2007-12-27 St Microelectronics Res & Dev Cache memory
US8615633B2 (en) * 2009-04-23 2013-12-24 Empire Technology Development Llc Multi-core processor cache coherence for reduced off-chip traffic
US20110072218A1 (en) 2009-09-24 2011-03-24 Srilatha Manne Prefetch promotion mechanism to reduce cache pollution
US8443151B2 (en) 2009-11-09 2013-05-14 Intel Corporation Prefetch optimization in shared resource multi-core systems
US8478942B2 (en) * 2010-09-27 2013-07-02 Advanced Micro Devices, Inc. Method and apparatus for reducing processor cache pollution caused by aggressive prefetching
JP2014115851A (ja) * 2012-12-10 2014-06-26 Canon Inc データ処理装置及びその制御方法
US20140173203A1 (en) 2012-12-18 2014-06-19 Andrew T. Forsyth Block Memory Engine
US20140181402A1 (en) 2012-12-21 2014-06-26 Advanced Micro Devices, Inc. Selective cache memory write-back and replacement policies
US9792212B2 (en) * 2014-09-12 2017-10-17 Intel Corporation Virtual shared cache mechanism in a processing device
US9684603B2 (en) * 2015-01-22 2017-06-20 Empire Technology Development Llc Memory initialization using cache state

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Publication number Publication date
JP6497831B2 (ja) 2019-04-10
US10613984B2 (en) 2020-04-07
US20180239706A1 (en) 2018-08-23
JP2018519614A (ja) 2018-07-19
US20160335186A1 (en) 2016-11-17
EP3295314A1 (en) 2018-03-21
CN108139976A (zh) 2018-06-08
EP3295314A4 (en) 2019-01-09
WO2016182588A1 (en) 2016-11-17
US9971693B2 (en) 2018-05-15

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