CN108133730A - Reading and control method thereof, storage reading apparatus and the storage system of flash memory - Google Patents
Reading and control method thereof, storage reading apparatus and the storage system of flash memory Download PDFInfo
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- CN108133730A CN108133730A CN201711404456.4A CN201711404456A CN108133730A CN 108133730 A CN108133730 A CN 108133730A CN 201711404456 A CN201711404456 A CN 201711404456A CN 108133730 A CN108133730 A CN 108133730A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
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Abstract
The application provides a kind of reading and control method thereof of flash memory, wherein, the flash memory includes multiple memory cells, the method includes：Multiple detection voltage values are obtained, each voltage value that detects is equal to the sum of default voltage and bias voltage, and the bias voltage is equal to the integral multiple of unit offset amount；Multiple detection voltages are applied to the memory cell of the flash memory according to the multiple detection voltage value respectively, to perform multiple data read operation；Multiple difference values are obtained, difference value described in the difference value represents the data variation amount of adjacent twi-read operation；Optimum detection voltage is determined according to the multiple difference value；And the storage optimum detection voltage, for the data read operation of flash memory later.The reading and control method thereof can obtain optimum detection voltage and carry out data read operation based on optimum detection voltage.There is provided a kind of storage reading apparatus and storage system simultaneously.
Description
Technical field
The present invention relates to a kind of reading and control method thereof of flash memory, storage reading apparatus and storage systems.
Background technology
Flash memory is widely used in memory card, solid state disk and can take as a kind of non-volatile memory
The electronic equipments such as formula multimedia player (portable multimedia players).
Flash memory can be divided into N0R types flash memory and NAND type flash memory.
Compared to N0R type flash memories, NAND type flash memory have better storage density and it is relatively low into
This, therefore it is more widely applied.In NAND type flash memory, comprising multiple memory cells, each memory cell
It is made of floating grid transistor, it is however generally that, each memory cell can store the data of 1 bit, but with
The development of manufacturing process, single memory cell can store the data of more than one bit.When brilliant to floating grid
When the control grid of body pipe provides a default voltage (default sensing votlage), pass through floating grid transistor
Conducting state determine the data of the bit stored by each memory cell.
However, the various operations to flash memory are for example written, read and preserve, there may be noises, these are made an uproar
Sound can influence the number of electronics in the floating grid of floating grid transistor, lead to the control grid of floating grid transistor
The numerical value of default voltage changes.It, may be correct by providing default voltage to control grid due to the change of default voltage
Ground obtains the data of bit stored in flash memory.
Invention content
In view of this, the reading and control method thereof of flash memory provided in an embodiment of the present invention is supplied to by correction
The detection voltage of the storage unit of flash memory, to reduce the data read errors probability of entire flash memory.
According to the first aspect of the invention, a kind of 1, reading and control method thereof of flash memory is provided, wherein, it is described
Flash memory includes multiple memory cells, each described memory cell has at least one default voltage, the side
Method includes：
Multiple detection voltage values are obtained, each voltage value that detects is equal to the sum of default voltage and bias voltage, described
Bias voltage is equal to the integral multiple of unit offset amount；
Multiple detection electricity are applied to the memory cell of the flash memory according to the multiple detection voltage value respectively
Pressure, to perform multiple data read operation；
Multiple difference values are obtained, the difference value represents the data variation amount of adjacent twi-read operation；
Optimum detection voltage is determined according to the multiple difference value；
And
The optimum detection voltage is stored, for the data read operation of flash memory later.
It is preferably based on default voltage even offset and obtains the multiple detection voltage value.
Preferably, it is described that optimum detection voltage is determined according to the multiple difference value：
Using the corresponding detection voltage value of minimum difference value as the optimum detection voltage.
It is preferably based on default voltage non-uniform offset and obtains the multiple detection voltage value.
Preferably, it is described to determine that optimum detection voltage includes according to the multiple difference value：
Multiple average values are asked for according to the multiple difference value；
More the multiple average value；And
In the interior acquisition optimum detection voltage in the corresponding detection voltage region of minimum average B configuration value.
Preferably, it is described to obtain that full voltage scanning is carried out between the corresponding detection voltage region of the minimum average B configuration value
Optimum detection voltage.
Preferably, in the corresponding detection voltage region of minimum average B configuration value, the interior acquisition optimum detection voltage includes：
Estimated value is calculated with following formula,
Wherein, v2 expressions minimum average B configuration value, the initial value of the numerical intervals where start (v2) expression minimum average B configuration values,
Length (v2) represents the quantity of unit offset amount included in the corresponding detection voltage region of minimum average B configuration value, v1 and v3
Average value corresponding with the two neighboring detection voltage value of minimum average B configuration value is represented respectively；And
The optimum detection voltage is judged according to the estimated value.
Preferably, the unit offset amount is related to default voltage.
Preferably, it further includes：When ECC module can not correct the data read from the flash memory or the ECC moulds
When block judges that the bit error rate is more than specific threshold, the reading and control method thereof described in perform claim requirement 1.
According to the second aspect of the invention, a kind of storage reading apparatus is provided, to read the number in flash memory
According to, wherein, the flash memory includes multiple memory cells, each described memory cell at least has an acquiescence
Voltage, the storage reading apparatus include voltage regulator module and control unit,
The voltage regulator module includes：
Generation unit is biased, for obtaining multiple detection voltage values, each voltage value that detects is equal to default voltage and one
The sum of bias voltage, the bias voltage are equal to the integral multiple of unit offset amount；
Reading unit performs multiple data read operation according to the multiple detection voltage value respectively；
Computing unit, for obtaining multiple difference values, the difference value represents the data variation of adjacent twi-read operation
Amount；
Determination unit, for determining optimum detection voltage according to the multiple difference value；
Described control unit is used to control the startup and closing of the voltage regulator module, and according to the multiple detection
Voltage value applies multiple detection voltages to a part of memory cell of the flash memory.
Preferably, the biasing generation unit includes the first biasing generation unit, for being based on default voltage even offset
Obtain the multiple detection voltage value.
Preferably, the determination unit includes the first determination unit, and first determination unit includes：
Using the corresponding detection voltage value of minimum difference value as the optimum detection voltage.
Preferably, the biasing generation unit includes the second biasing generation unit, and the second biasing generation unit is used for
The multiple detection voltage value is obtained based on default voltage non-uniform offset.
Preferably, the determination unit includes：Multiple average values are calculated and in minimum according to the multiple difference value
The corresponding detection voltage region of average value is interior to obtain the optimum detection voltage, and the average value is obtained for each read operation
The difference value obtained divided by the quantity of unit offset amount included between corresponding detection voltage region.
Preferably, the determination unit includes：
Estimated value is calculated with following formula,
Wherein, v2 expressions minimum average B configuration value, the initial value of the numerical intervals where start (v2) expression minimum average B configuration values,
Length (v2) represents the quantity of unit offset amount included in the corresponding detection voltage region of minimum average B configuration value, v1 and v3
Average value corresponding with the two neighboring detection voltage value of minimum average B configuration value is represented respectively；And
The optimum detection voltage is judged according to the estimated value.
Preferably, the unit offset amount is related to default voltage.
Preferably, it further includes：ECC circuit, when the ECC circuit can not correct the number read from the flash memory
According to or the ECC module judge that the bit error rate is more than specific threshold when, the control module starts the voltage adjustment mould
Block.
According to the third aspect of the invention we, a kind of storage system is provided, including flash memory, the quick flashing
Memory, which includes multiple memory cells and each described memory cell, at least has a default voltage,
The storage system further includes Memory Controller, and the Memory Controller further includes any of the above-described institute
The storage reading apparatus stated.
The reading and control method thereof of the flash memory provided in the embodiment of the present invention sets unit offset amount, based on the list
Position offset carries out uniform or non-homogeneous offset and obtains multiple detection voltage values, is performed according to these detection voltage values and reads behaviour
Make, difference value is calculated, and then determine optimum detection voltage, and the optimum detection voltage is stored according to the data read
Come the digital independent after being used for.The reading and control method thereof detects voltage to reduce the wrong data of reading by correction.
In a further embodiment, reading and control method thereof obtains multiple detection voltages using anisotropically offset manner
Value calculates average value according to the quantity of the memory cell with identical data counted on, judges best inspection according to average value
Numerical intervals and final determining optimum detection voltage where survey voltage.Biasing number is reduced by heterogeneous fashion, with section
It saves and performs the time.
Description of the drawings
By referring to description of the following drawings to the embodiment of the present invention, the above and other purposes of the present invention, feature and
Advantage will be apparent from, in the accompanying drawings：
Fig. 1 is the structure chart of flash memory system；
Fig. 2 is that the structural diagrams of the read control device of the embodiment of the present invention are intended to；
Fig. 3 is the structure diagram of the first embodiment of the voltage regulator module of read control device；
Fig. 4 is the statistical result schematic diagram of the voltage regulator module of first embodiment；
Fig. 5 is the structure diagram of the second embodiment of the voltage regulator module of read control device；
Fig. 6 is the statistical result schematic diagram of the voltage regulator module of second embodiment；
Fig. 7 shows the flow chart of the reading and control method thereof of one embodiment of the invention；
Fig. 8 is the prior art and is decoded using the ECC circuit after the method for adjustment of detection voltage provided by the invention
Effect contrast figure.
Specific embodiment
Hereinafter reference will be made to the drawings is more fully described the present invention.In various figures, identical element is using similar attached
Icon is remembered to represent.For the sake of clarity, the various pieces in attached drawing are not necessarily to scale.Furthermore, it is possible to it is not shown certain
Well known part.
Fig. 1 is the structure chart of flash memory system.
The flash memory system 100 is, for example, the computer system using solid state disk (SSD).The computer system includes master
Machine 130.Solid state disk includes flash memory 110 and storage control device 120.
Host 130 accesses memory 130 via storage control device 120.In the flash memory system, storage data are
The coded data that initial data is generated by coding could obtain initial data in reading process to storage data decoding.It is main
Machine 110 is for example including processor.In use state, the processor loading procedure or reading data from memory 130, with
And data are written into memory 130.
Flash memory 110 is made of multiple memory page P_0 to P_N, and each memory page includes multiple by floating gate
The memory cell M_0 to M_K that gated transistors are formed stores one or more bits (bit) in each memory cell
Data.Storage control device 120 to the control grid of transistor by providing appropriate detection voltage, to read memory
The data of unit storage.For example, it is assumed that memory cell M_0 stores the data of 3 bits, you can with the binary system of storage
Data are 000,001,010,011,100,101,110,111 (23), then storage control device 120 need to set 8 detection electricity
Pressure, and it is based respectively on the binary data that above-mentioned 8 detections voltage is read out memory cell storage.This is only assumed as
The purpose of explanation, is not limited thereto.
Memory Controller 120 is, for example, individual IC chip, including read control device (not shown) and is write
Enter control device (not shown), be respectively used to the reading and write-in of control flash memory 110.During write operation, write-in
Controller carries out LDPC codings to initial data, so as to generate storage data, so as to store data write-in flash memory
In 110.During read operation, Read Controller obtains storage data from flash memory 110, then carries out LDPC and translates
Code is to obtain initial data.LDPC/BCH
Fig. 2 is that the structural diagrams of the read control device of the embodiment of the present invention are intended to.
Read control device 121 includes receiving module 1220, control unit 1213 and ECC (Error Checking and
Correction) circuit 1211.Control unit 1213 is responsible for the logic control of whole memory control device.Receiving module
1220 data stored for receiver-storage unit.ECC circuit 1211 is obtained in memory cell from receiving module 1220 and is deposited
The data of storage, and carry out data correction process.As previously mentioned, the acquiescence electricity of the memory cell 1110 of flash memory 110
Pressure may change due to certain factors, such as reading interference, write-in/programming interference and (or) preservation interference are so as to cause reading
Data it is incorrect, this be required for ECC circuit carry out correction process.Partial memory list usually in each memory page
Member 1110 all stores ECC code word.Under normal circumstances, ECC circuit 1230 can complete correction process according to ECC code word.Specifically
Ground, ECC circuit are detected the data of reading, confirm whether the data of reading are correct, and detect wrong data whereby
In the presence of.When detecting wrong data, the wrong data included is read by corrector amendment.However, when existing error number
According to quantity be more than ECC circuit can modified maximum value when, ECC circuit will identify can not modified wrong data.This
When, control unit 1213 will call voltage regulator module 1212 to adjust detection voltage.
Voltage regulator module 1212 includes reading unit 12121, computing unit 12122, determination unit 12123 and biasing
Generation unit 12124.Reading unit 12121 is used to read data from receiving module, and computing unit 12122 is used to be calculated
Multiple difference values are obtained, the difference value represents the data variation amount of adjacent twi-read operation.For example, read behaviour each
After work, statistical data is bit value " quantity of 0 " memory cell, the data for then subtracting last time read operation are bit
The quantity of the memory cell of value " 0 ", using the absolute value of difference as the difference value.Alternatively, after each read operation,
Statistical data is bit value " quantity of 1 " memory cell, the data for then subtracting last time read operation are bit value " 1 "
Memory cell quantity, using the absolute value of difference as the difference value.Determination unit 12123 is used for according to difference value
Judge the range of optimum detection voltage and optimum detection voltage (best sensing voltage).Specifically, voltage adjusts
When module is started to work, the multiple detection electricity of generation are biased based on default voltage by biasing generation unit 12124 first
Pressure, and pass through control unit and multiple detection voltage is applied separately on memory cell, then reading unit 12121 is straight
It connects or reads the data in corresponding memory cell indirectly, computing unit 12122, which repeatedly count, obtains multiple differences
Value.Determination unit 12123 judges optimum detection voltage by multiple difference value.Finally determining optimum detection voltage can be deposited
Some static storage of Memory Controller is stored up, in order to carry out data read operation in the future.
The reading and control method thereof of the present invention calculates the variation of data in repeatedly read operation under different detection voltage
Amount, and optimum detection voltage is determined based on the variable quantity of data.Because the variable quantity of the data in repeatedly read operation be due to
Caused by different bias voltages, therefore can just bias voltage and corresponding optimum detection be found based on the variable quantity
Voltage.
Fig. 3 is the structure diagram of the first embodiment of the voltage regulator module of read control device.
With reference to figure 3, voltage regulator module 1212 includes reading unit 12121, computing unit 12122, the first determination unit
121231 and first bias generation unit 121241.First biasing generation unit 121241 obtains multiple for equably biasing
Voltage is detected, each voltage that detects is equal to the sum of default voltage and bias voltage, and the multiple detection voltage is applied to storage
To carry out the multiple reading of data on device unit.Reading unit 12121 is used to read data from receiving module.Computing unit
12122 carry out addition statistics according to the data read every time calculates.Computing unit 12122 is used with that can be an adder
In accumulation calculating.First determination unit 121231 is used to determine optimum detection voltage according to statistics result of calculation.
Specifically, when voltage regulator module 1212 works, pass through the first biasing generation unit 121241 generation the first
One detection voltage value, in this example using the unit offset amount of fixed value, each offset is the unit offset amount
Integral multiple.For example, default voltage is 2.10E-0.3V, unit offset amount is 0.1E-0.3V, then deviates a unit for the first time
It is 2.20E-0.3V that offset, which obtains detection voltage,.Control unit 1242 applies detection voltage corresponding with detection voltage value
To each memory cell to perform read operation.Reading unit 12121 reads data from receiving module.Computing unit
12122 carry out counting operation according to the data read finally obtains an accumulated value.For example, statistical data is " 1 " storage
Device unit number, so as to obtain an accumulated value sum1.Then, second detection voltage value is generated, which can be with
Based on default voltage and twice of unit offset amount generation.For example, based on first example, offset 2*0.1E-0.3V, then
Obtain detection voltage value 2.30E-0.3V.Control unit 1242 will with detection voltage value it is corresponding detection voltage be applied to it is each
Memory cell is stored with reading the data stored in each memory cell into storage device 1221.Computing unit
12411 obtain data from storage device 1221, carry out counting operation according to data value, obtain an accumulated value.For example, system
Count for " 1 " memory cell number, so as to obtain an accumulated value sum2, then calculate the absolute value of sum2-sum1
Obtain a difference value.And so on, until obtaining multiple difference values.Final first determination unit 121231 is according to lowest difference
The corresponding voltage that detects of different value is as optimum detection voltage.
Fig. 4 is the statistical result schematic diagram of the voltage regulator module of first embodiment.
In Fig. 4, V0~V23 represents the detection voltage after biasing, and column diagram represents there is phase under the detection voltage
With the quantity of the memory cell of data.In this example, the uniform offset based on default voltage obtains detection voltage V0-V23,
The offset of each detection voltage is equal.Default voltage can obtain above-mentioned detection electricity by being deviated to positive and negative both direction
Pressure, it is assumed for example that default voltage is the intermediate value V9 in upper figure, to positive direction or negative direction offset obtain V0-V8 and
V10-V23.It should be noted that uniform offset is not meant to that a unit offset amount can only be deviated every time, it can also be each
Deviate multiple unit offset amounts.For example, default voltage be 2.10E-0.3V, unit offset amount be 0.1E-0.3V, forward migration
2.20E-0.3V is obtained after one unit offset amount, one unit offset of negative offset measures 2.00E-0.3V, forward migration
2.30E-0.3V is obtained after two unit offset amounts, two unit offsets of negative offset measure 1.90E-0.3V, with such
It pushes away.Unit offset amount is related to default voltage and number of memory cells.In real operation, according to memory cell
Default voltage determines different unit offset amounts.
It should be noted that since a memory cell can store the data of multiple bits, one
Memory cell can have multiple default voltages, it is possible thereby to perform above-mentioned steps based on each default voltage, find each silent
Recognize the corresponding optimum detection voltage of voltage.Finally obtain multiple optimum detection voltages of each memory cell.
In the present embodiment, uniform offset is carried out based on default voltage, obtains multiple detection voltage values, and based on these
Detection voltage value, which is read, obtains multiple difference values, and then determine optimum detection voltage.Due to each offset all
It is a fixed value, causes if it is desired to reaching a larger detection voltage, it is necessary to repeatedly be deviated and perform multiple number
According to read operation, the longer execution time is thus resulted in the need for, leads to the experience of user to reduce.
Fig. 5 is the structure diagram of the second embodiment of the voltage regulator module of read control device.
In Figure 5, voltage regulator module 1241 includes read module 12121, computing unit 12122, the second determination unit
12417 and second bias generation unit 12416.Second biasing generation unit 12416 is used to obtain using bias mode heterogeneous
Multiple detection voltages are obtained, each voltage that detects is equal to the sum of default voltage and bias voltage, and the multiple detection voltage is applied in
To carry out the multiple reading of data on to memory cell.Computing unit 12122 is used to read data from receiving module, and
Difference value is calculated according to the data read every time, to obtain multiple difference values.Second determination unit 12417 is used for according to difference
Different value is estimated, and determines optimum detection voltage range and optimum detection voltage.
Specifically, when performing read operation, first detection is generated by the second biasing generation unit 12416 first
Voltage value, the detection voltage value are based on default voltage (default sensing voltage), multiple value and the life of unit offset amount
Into.For example, default voltage is 2.10E-0.3V, unit offset amount is 0.1E-0.3V, and multiple value 1 then obtains detection voltage
Value 2.20E-0.3V.Control unit 1213 will detect voltage and be applied to each memory cell to carry out data read operation.
Computing unit 12122 obtains data from receiving module, carries out counting operation and finally obtains an accumulated value.Then, according to logical
It crosses the second biasing generation unit 12416 and generates second detection voltage value.For example, based on first example, unit offset amount is
0.1E-0.3V, multiple value are set as 5, then obtain detection voltage value 2.10E-0.3V+5*0.1E-0.3V=2.6E-0.3V.Control
Detection voltage corresponding with detection voltage value is applied to each memory cell to read data by unit 1213 processed.It calculates single
Member 12122 obtains data from receiving module, carries out counting operation, obtains an accumulated value, by the cumulative of twi-read operation
Value, which is subtracted each other, to take absolute value, and obtains a difference value.And so on, until obtaining multiple difference values.Second determination unit 12417
According to the quantity averaged of unit offset amount that difference value and corresponding detection voltage range include, and it is averaged in minimum
It is worth in corresponding detection voltage range and obtains optimum detection voltage, for the data read operation of flash memory later.
Second determination unit 12417 is specifically described with column diagram shown in fig. 6.Fig. 6 is the electricity of second embodiment
The statistical result schematic diagram of pressure adjustment module.
As shown in fig. 6, detection voltage V0-V5 and detection voltage V18-V23 respectively correspond to the numerical value of a unit offset amount
Section, and the numerical intervals of the multiple unit offset amounts of each correspondence of V9, V14, V17, respectively V6-V9, V10-V14 and V15-
V17, column diagram represent corresponding difference value.
Based on second embodiment, the second determination unit 12417 needs first to calculate average value, that is, the corresponding average values of V9 are
Sum ' 1/4=111/4=27；The corresponding average values of V14 are Sum ' 2/5=84/5=17；The corresponding average values of V17 are Sum '
3/4=125/3=31.Then, the detection voltage range where minimum average value is found as where optimum detection voltage
Section.Minimum average value is 17, then judges that optimum detection voltage should be fallen in the detection voltage range of V10-V14.
In an optional embodiment, full voltage scanning method (Full voltage scanning can be carried out in the section
Over candidate interval) or quick-fried force method search acquisition optimum detection voltage.Full voltage scanning method means
It chooses numerical value as much as possible in section to be tested as detection voltage, to obtain optimum detection voltage.For example, by the area
Between be divided into multiple subintervals, using the boundary value in each subinterval as detection voltage tested, with approach optimum detection electricity
Pressure.
In another optional embodiment, Weighted Interpolation (voltage prediction by can be used
Calculation method) carries out estimation and obtains optimum detection voltage.For example, first an estimated value is asked for using following formula：
Wherein, v2 represents minimum average B configuration value, and start (v2) represents the left side for detecting voltage range where minimum average B configuration value
Boundary value, length (v2) represent the quantity of unit offset amount that includes of detection voltage range where minimum average B configuration value, v1 with
V3 represents adjacent and detects the corresponding average value of voltage range respectively.
Correlation is updated in above-mentioned formula according to the example of Fig. 6 and is finally obtained：
Estimated value V '=10+5*27/ (27+42)=11.95.
Then, based on estimated value V ', judge optimum detection voltage.Such as determine that optimum detection voltage is V11 in upper example
Or V12, then V11 or V12 may be selected as optimum detection voltage.
Fig. 7 shows the flow chart of the reading and control method thereof of the flash memory of the embodiment of the present invention.
The sequence of flow chart step is one example of the present invention embodiment, but exclusively for the purposes of illustration, not as
Limit.Flow chart includes following step.
In step 701, multiple detection voltage values are obtained.The multiple detection voltage value biases institute by default voltage
, even offset, such as one unit offset amount of biasing or progress non-uniform offset every time can be carried out, to biasing every time
Unit offset amount quantity without limit.
In a step 702, apply multiple inspections to the memory cell of flash memory according to multiple detection voltage values respectively
Voltage is surveyed, to perform multiple data read operation.Specifically which memory cell to apply detection voltage according to acquiescence electricity to herein
Pressure determines.
In step 703, multiple difference values are obtained.Difference value described in the difference value represents adjacent twi-read operation
Data variation amount.
In step 704, optimum detection voltage is determined according to the multiple difference value.
In step 705, the optimum detection voltage is stored, for the data read operation of flash memory later.
Optimum detection voltage be used for after data read operation, to reduce the quantity of wrong data that is read out of flash memories.
In a further embodiment, multiple detection voltage values are obtained using anisotropically offset manner, according to counting on
The memory cell with identical data quantity calculate average value, according to where average value judges optimum detection voltage
Numerical intervals and finally determining optimum detection voltage.Biasing number is reduced by heterogeneous fashion, the time is performed to save.
The reading and control method thereof of above-mentioned flash memory, suitable for the detection of flash memory after a period of use
The correction of voltage.With the increase to the operations such as flash memory reading and writing and storage, the default voltage of memory cell occurs
Change, the error in data amount read based on default voltage is caused to increase, further causes ECC circuit that can not correct from described
The data that flash memory is read.And the reading and control method thereof of the present invention can obtain optimum detection voltage, and based on best inspection
It surveys voltage and updates storage the default voltage preserved in device, preferably to carry out data read operation.
Fig. 8 is the prior art and is decoded using the ECC circuit after the method for adjustment of detection voltage provided by the invention
Effect contrast figure.
Fig. 8 is the prior art and is decoded using the ECC circuit after the method for adjustment of detection voltage provided by the invention
Effect contrast figure.Wherein X-axis represents the data volume by ECC circuit decoding and error, and Y-axis is ECC circuit decoding error data
It measures (Error Bits), X1 represents the design sketch of the prior art, and X2 represents the effect after detection voltage adjustment of the invention
Figure.As can be seen that after detection voltage adjustment, wrong data amount is decreased obviously.For example, the B points on A points and X2 on X1
The coordinate points for both corresponding to X-axis are more than for 14.8K, the ratio substantially 6 of wrong data amount:1.
Although the embodiment of the present invention is disclosed as above with preferred embodiment, its be not for limiting claim, it is any
Those skilled in the art without departing from the spirit and scope of the present invention, can make possible variation and modification, therefore this
The protection domain of invention should be subject to the range that the claims in the present invention are defined.
The foregoing is merely the preferred embodiment of the present invention, are not intended to restrict the invention, for those skilled in the art
For, the present invention can have various modifications and changes.All any modifications made within spirit and principles of the present invention, etc.
With replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (18)
1. a kind of reading and control method thereof of flash memory, wherein, the flash memory includes multiple memory cells, often
One memory cell has at least one default voltage, the method includes：
Multiple detection voltage values are obtained, each voltage value that detects is equal to the sum of default voltage and bias voltage, the biasing
Voltage is equal to the integral multiple of unit offset amount；
Multiple detection voltages are applied to the memory cell of the flash memory according to the multiple detection voltage value respectively, with
Perform multiple data read operation；
Multiple difference values are obtained, the difference value represents the data variation amount of adjacent twi-read operation；
Optimum detection voltage is determined according to the multiple difference value；
And
The optimum detection voltage is stored, for the data read operation of flash memory later.
2. reading and control method thereof according to claim 1, wherein, the multiple inspection is obtained based on default voltage even offset
Survey voltage value.
3. reading and control method thereof according to claim 3, wherein, it is described that optimum detection is determined according to the multiple difference value
Voltage：
Using the corresponding detection voltage value of minimum difference value as the optimum detection voltage.
4. reading and control method thereof according to claim 1, wherein, it is obtained based on default voltage non-uniform offset the multiple
Detect voltage value.
5. reading and control method thereof according to claim 1, wherein, it is described that optimum detection is determined according to the multiple difference value
Voltage includes：
Multiple average values are asked for according to the multiple difference value；
More the multiple average value；And
In the interior acquisition optimum detection voltage in the corresponding detection voltage region of minimum average B configuration value.
6. reading and control method thereof according to claim 5, wherein, in the corresponding detection voltage region of the minimum average B configuration value
Between carry out full voltage scanning to obtain the optimum detection voltage.
7. reading and control method thereof according to claim 5, wherein, in the corresponding detection voltage region of minimum average B configuration value
The optimum detection voltage is obtained to include：
Estimated value is calculated with following formula,
Wherein, v2 expressions minimum average B configuration value, the initial value of the numerical intervals where start (v2) expression minimum average B configuration values,
Length (v2) represents the quantity of unit offset amount included in the corresponding detection voltage region of minimum average B configuration value, and v1 and v3 divide
It Biao Shi not average value corresponding with the two neighboring detection voltage value of minimum average B configuration value；And
The optimum detection voltage is judged according to the estimated value.
8. reading and control method thereof according to claim 1, wherein, the unit offset amount is related to default voltage.
9. reading and control method thereof according to claim 1, further includes：When ECC module can not be corrected from the flash
When the data or the ECC module that device is read judge that the bit error rate is more than specific threshold, the reading described in perform claim requirement 1
Control method.
10. a kind of storage reading apparatus, to read the data in flash memory, wherein, the flash memory includes
Multiple memory cells, each described memory cell at least have a default voltage, and the storage reading apparatus includes
Voltage regulator module and control unit,
The voltage regulator module includes：
Generation unit is biased, for obtaining multiple detection voltage values, each voltage value that detects is equal to default voltage and a biasing
The sum of voltage, the bias voltage are equal to the integral multiple of unit offset amount；
Reading unit performs multiple data read operation according to the multiple detection voltage value respectively；
Computing unit, for obtaining multiple difference values, the difference value difference value represents the number of adjacent twi-read operation
According to variable quantity；
Determination unit, for determining optimum detection voltage according to the multiple difference value；
Described control unit is used to control the startup and closing of the voltage regulator module, and according to the multiple detection voltage value
Apply multiple detection voltages to a part of memory cell of the flash memory.
11. storage reading apparatus according to claim 10, wherein, the biasing generation unit includes the first biasing and gives birth to
Into unit, the multiple detection voltage value is obtained for being based on default voltage even offset.
12. storage reading apparatus according to claim 11, wherein, the determination unit includes the first determination unit,
First determination unit includes：
Using the corresponding detection voltage value of minimum difference value as the optimum detection voltage.
13. storage reading apparatus according to claim 10, wherein, the biasing generation unit includes the second biasing and gives birth to
Into unit, the second biasing generation unit is used to obtain the multiple detection voltage value based on default voltage non-uniform offset.
14. reading and control method thereof according to claim 13, wherein, the determination unit includes：According to the multiple difference
Different value calculates multiple average values and in the interior acquisition in the corresponding detection voltage region of the minimum average B configuration value optimum detection electricity
Pressure, the unit offset that the average value includes between the difference value of each read operation acquisition divided by corresponding detection voltage region
The quantity of amount.
15. storage reading apparatus according to claim 14, wherein, the determination unit includes：
Estimated value is calculated with following formula,
Wherein, v2 expressions minimum average B configuration value, the initial value of the numerical intervals where start (v2) expression minimum average B configuration values,
Length (v2) represents the quantity of unit offset amount included in the corresponding detection voltage region of minimum average B configuration value, and v1 and v3 divide
It Biao Shi not average value corresponding with the two neighboring detection voltage value of minimum average B configuration value；And
The optimum detection voltage is judged according to the estimated value.
16. storage reading apparatus according to claim 10, wherein, the unit offset amount is related to default voltage.
17. storage reading apparatus according to claim 10, further includes：ECC circuit, when the ECC circuit can not repair
When just judging that the bit error rate is more than specific threshold from the data or the ECC module that the flash memory is read, the control
Molding block starts the voltage regulator module.
18. a kind of storage system, including flash memory, the flash memory includes multiple memory cells, with
And each described memory cell at least has a default voltage,
The storage system further includes Memory Controller, and it is any that the Memory Controller further includes claim 10 to 17
Storage reading apparatus described in.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109032514A (en) * | 2018-07-17 | 2018-12-18 | 广东工业大学 | A kind of method for reading data, device, equipment and readable storage medium storing program for executing |
| CN110189788A (en) * | 2019-04-24 | 2019-08-30 | 深圳市金泰克半导体有限公司 | The read voltage of flash memory determines method, apparatus, computer equipment and storage medium |
| CN110797068A (en) * | 2019-08-06 | 2020-02-14 | 广州妙存科技有限公司 | Method for quickly searching optimal rereading voltage of NAND flash memory |
| CN111382002A (en) * | 2018-12-31 | 2020-07-07 | 美光科技公司 | Method and system with dynamic ECC voltages and frequencies |
| CN111402947A (en) * | 2020-03-13 | 2020-07-10 | 浙江大华技术股份有限公司 | Voltage determination method and device, storage medium and electronic device |
| CN112988613A (en) * | 2019-12-18 | 2021-06-18 | 杭州海康存储科技有限公司 | Method, device and equipment for determining physical state of flash memory |
| CN113223593A (en) * | 2021-04-23 | 2021-08-06 | 联芸科技（杭州）有限公司 | Method for optimizing reading voltage of memory cell, controller of 3D memory and operation method thereof |
| CN114184282A (en) * | 2021-12-08 | 2022-03-15 | 中国电子科技集团公司第三十四研究所 | Real-time multipoint non-uniformity correction device and method for near-infrared image |
Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1791941A (en) * | 2003-04-14 | 2006-06-21 | 桑迪士克股份有限公司 | Read and erase verify methods and circuits suitable for low voltage non-volatile memories |
| CN101199022A (en) * | 2005-04-05 | 2008-06-11 | 桑迪士克股份有限公司 | Compensating for coupling in non-volatile storage |
| CN101218650A (en) * | 2005-04-05 | 2008-07-09 | 桑迪士克股份有限公司 | Read operation for non-volatile storage that includes compensation for coupling |
| US20080266952A1 (en) * | 2005-03-07 | 2008-10-30 | Samsung Electronics Co., Ltd. | Memory array architecture for a memory device and method of operating the memory array architecture |
| CN101325089A (en) * | 2007-06-14 | 2008-12-17 | 三星电子株式会社 | Nonvolatile memory device and methods of programming and reading the same |
| CN101405812A (en) * | 2006-06-19 | 2009-04-08 | 桑迪士克股份有限公司 | Programming defferently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory |
| CN101461012A (en) * | 2006-06-06 | 2009-06-17 | 美光科技公司 | Programming a non-volatile memory device |
| CN101868832A (en) * | 2007-11-21 | 2010-10-20 | 美光科技公司 | Method and apparatus for reading data from flash memory |
| CN102789811A (en) * | 2012-06-15 | 2012-11-21 | 中国人民解放军国防科学技术大学 | Multivalue memristor self-adaption programming circuit for nano cross rod structure and method |
| CN103928055A (en) * | 2013-01-14 | 2014-07-16 | 三星电子株式会社 | Flash Memory, Flash Memory System And Operating Method Of The Same |
| CN104040559A (en) * | 2012-01-10 | 2014-09-10 | Sk海尼克斯存储技术公司 | Finding optimal read thresholds and related voltages for solid state memory |
| CN104616695A (en) * | 2013-11-05 | 2015-05-13 | 光宝科技股份有限公司 | Solid state storage apparatus and setting method for reading voltage |
| US20160148702A1 (en) * | 2014-11-20 | 2016-05-26 | HGST Netherlands B.V. | Calibrating optimal read levels |
| CN106328203A (en) * | 2015-07-03 | 2017-01-11 | 力晶科技股份有限公司 | Flash memory device and method for initializing program operation thereof |
| CN106409328A (en) * | 2015-09-03 | 2017-02-15 | 深圳星忆存储科技有限公司 | Dynamic random access memory for three-level unit, and method for reading same |
| CN106935260A (en) * | 2012-02-22 | 2017-07-07 | 慧荣科技股份有限公司 | The method for reading data and system of flash memory |
| CN107437433A (en) * | 2017-06-12 | 2017-12-05 | 中国科学院微电子研究所 | Read operation method of NAND flash memory, electronic device and computer-readable storage medium |
-
2017
- 2017-12-22 CN CN201711404456.4A patent/CN108133730B/en active Active
Patent Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1791941A (en) * | 2003-04-14 | 2006-06-21 | 桑迪士克股份有限公司 | Read and erase verify methods and circuits suitable for low voltage non-volatile memories |
| US20080266952A1 (en) * | 2005-03-07 | 2008-10-30 | Samsung Electronics Co., Ltd. | Memory array architecture for a memory device and method of operating the memory array architecture |
| CN101199022A (en) * | 2005-04-05 | 2008-06-11 | 桑迪士克股份有限公司 | Compensating for coupling in non-volatile storage |
| CN101218650A (en) * | 2005-04-05 | 2008-07-09 | 桑迪士克股份有限公司 | Read operation for non-volatile storage that includes compensation for coupling |
| CN101461012A (en) * | 2006-06-06 | 2009-06-17 | 美光科技公司 | Programming a non-volatile memory device |
| CN101405812A (en) * | 2006-06-19 | 2009-04-08 | 桑迪士克股份有限公司 | Programming defferently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory |
| CN101325089A (en) * | 2007-06-14 | 2008-12-17 | 三星电子株式会社 | Nonvolatile memory device and methods of programming and reading the same |
| CN101868832A (en) * | 2007-11-21 | 2010-10-20 | 美光科技公司 | Method and apparatus for reading data from flash memory |
| CN104040559A (en) * | 2012-01-10 | 2014-09-10 | Sk海尼克斯存储技术公司 | Finding optimal read thresholds and related voltages for solid state memory |
| CN106935260A (en) * | 2012-02-22 | 2017-07-07 | 慧荣科技股份有限公司 | The method for reading data and system of flash memory |
| CN102789811A (en) * | 2012-06-15 | 2012-11-21 | 中国人民解放军国防科学技术大学 | Multivalue memristor self-adaption programming circuit for nano cross rod structure and method |
| CN103928055A (en) * | 2013-01-14 | 2014-07-16 | 三星电子株式会社 | Flash Memory, Flash Memory System And Operating Method Of The Same |
| CN104616695A (en) * | 2013-11-05 | 2015-05-13 | 光宝科技股份有限公司 | Solid state storage apparatus and setting method for reading voltage |
| US20160148702A1 (en) * | 2014-11-20 | 2016-05-26 | HGST Netherlands B.V. | Calibrating optimal read levels |
| CN106328203A (en) * | 2015-07-03 | 2017-01-11 | 力晶科技股份有限公司 | Flash memory device and method for initializing program operation thereof |
| CN106409328A (en) * | 2015-09-03 | 2017-02-15 | 深圳星忆存储科技有限公司 | Dynamic random access memory for three-level unit, and method for reading same |
| CN107437433A (en) * | 2017-06-12 | 2017-12-05 | 中国科学院微电子研究所 | Read operation method of NAND flash memory, electronic device and computer-readable storage medium |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109032514B (en) * | 2018-07-17 | 2021-08-13 | 广东工业大学 | Data reading method, device and equipment and readable storage medium |
| CN109032514A (en) * | 2018-07-17 | 2018-12-18 | 广东工业大学 | A kind of method for reading data, device, equipment and readable storage medium storing program for executing |
| US11740963B2 (en) | 2018-12-31 | 2023-08-29 | Micron Technology, Inc. | Methods and system with dynamic ECC voltage and frequency |
| CN111382002A (en) * | 2018-12-31 | 2020-07-07 | 美光科技公司 | Method and system with dynamic ECC voltages and frequencies |
| CN111382002B (en) * | 2018-12-31 | 2024-05-28 | 北极星特许集团有限责任公司 | Method and system with dynamic ECC voltage and frequency |
| US12086027B2 (en) | 2018-12-31 | 2024-09-10 | Lodestar Licensing Group, Llc | Methods and system with dynamic ECC voltage and frequency |
| CN110189788A (en) * | 2019-04-24 | 2019-08-30 | 深圳市金泰克半导体有限公司 | The read voltage of flash memory determines method, apparatus, computer equipment and storage medium |
| CN110797068A (en) * | 2019-08-06 | 2020-02-14 | 广州妙存科技有限公司 | Method for quickly searching optimal rereading voltage of NAND flash memory |
| CN112988613A (en) * | 2019-12-18 | 2021-06-18 | 杭州海康存储科技有限公司 | Method, device and equipment for determining physical state of flash memory |
| CN111402947A (en) * | 2020-03-13 | 2020-07-10 | 浙江大华技术股份有限公司 | Voltage determination method and device, storage medium and electronic device |
| CN111402947B (en) * | 2020-03-13 | 2023-09-29 | 浙江华忆芯科技有限公司 | Voltage determination method and device, storage medium and electronic device |
| CN113223593A (en) * | 2021-04-23 | 2021-08-06 | 联芸科技（杭州）有限公司 | Method for optimizing reading voltage of memory cell, controller of 3D memory and operation method thereof |
| CN114184282A (en) * | 2021-12-08 | 2022-03-15 | 中国电子科技集团公司第三十四研究所 | Real-time multipoint non-uniformity correction device and method for near-infrared image |
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