CN108111449B - Data processing method and device - Google Patents
Data processing method and device Download PDFInfo
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- CN108111449B CN108111449B CN201611060403.0A CN201611060403A CN108111449B CN 108111449 B CN108111449 B CN 108111449B CN 201611060403 A CN201611060403 A CN 201611060403A CN 108111449 B CN108111449 B CN 108111449B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0091—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location arrangements specific to receivers, e.g. format detection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
Abstract
The embodiment of the invention discloses a data processing method and a data processing device, wherein the shift operation type of first data is determined according to the error type; performing shifting operation on the first data according to the shifting operation type to obtain second data; distributing the second data to a plurality of ports.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a data processing method and apparatus.
Background
The 4 Serial Gigabit Media Independent Interface (Qsgmii) uses fewer pins to interconnect the physical layer phy with a port rate of 10/100/1000 for 4 channels to the Media access control layer mac. The Qsgmii interface is a 5G serial high-speed serdes interface.
In the Qsgmii interface in the prior art, as shown in fig. 1, a receiving end completes synchronization sync by identifying a k28.1 code on a serial code stream, and determines a 0 port position after identifying the k28.1 code on the serial code stream, and the positions are sequentially 1, 2 and 3 ports. However, in practical applications, there is a limitation in this structure, when the peer-to-peer interface of the Qsgmii fails, for example, when the peer-to-peer Qsgmii is out of order, or when there are multiple ports containing k28.1 codes, the receiving side of the local peer Qsgmii cannot recognize the error of the peer-to-peer Qsgmii interface, and still receives the peer-to-peer Qsgmii interface data.
Disclosure of Invention
In order to solve the existing technical problem, embodiments of the present invention provide a data processing method and apparatus, which improve the error recognition capability of the Qsgmii on the basis of ensuring the normal communication function, accelerate the synchronization process, and save the time for establishing a link.
In order to achieve the above purpose, the technical solution of the embodiment of the present invention is realized as follows:
the embodiment of the invention provides a data processing method, which comprises the following steps:
determining the type of the shift operation of the first data according to the error type;
performing shifting operation on the first data according to the shifting operation type to obtain second data;
distributing the second data to a plurality of ports.
Further, the error type includes a decoding error and a feedback error signal, and the determining the type of the shift operation of the received first data according to the error type includes:
when the error type is a decoding error, determining that the type of the shift operation of the first data is a 1-bit shift operation;
and when the error type is a feedback error signal, determining that the shift operation type of the first data is 10-bit shift operation.
Further, the performing a shift operation on the first data according to the shift operation type to obtain second data includes:
when the shift operation type is 1-bit shift operation, moving the first data by 1bit to obtain second data;
and when the shift operation type is 10-bit shift operation, moving the first data by 10 bits to obtain second data.
Further, said distributing said second data to a plurality of ports comprises:
and distributing the second data to a port 0, a port 1, a port 2 and a port 3 respectively by taking 10 bits as a group according to the data sequence.
Further, after the distributing the second data to a plurality of ports, further comprising:
decoding the second data, and feeding back decoding error feedback information when the second data is decoded in error;
when the second data decoding is correct, replacing a control code k28.1 with a control code k28.5 at the port 0, detecting a code k28.1 at the ports 1, 2 and 3, and feeding back error feedback information of the code k28.1 when any one port of the ports 1, 2 and 3 detects the code k 28.1.
Further, before the determining the type of the shift operation of the received first data according to the error type, the method includes:
receiving first data on a link, wherein the first data comprises 40-bit data;
when the fed-back decoding error feedback information is received, determining the error type as a decoding error;
and when the fed back k28.1 code error feedback information is received, determining the error type as a feedback error signal.
An embodiment of the present invention provides a data processing apparatus, including: a shift module, a decoding module, wherein,
the shift module is used for determining the shift operation type of the first data according to the error type; the shift operation module is further used for performing shift operation on the first data according to the shift operation type to obtain second data;
the decoding module is configured to distribute the second data to a plurality of ports.
Further, the error type includes a decoding error and a feedback error signal, and the shift module is configured to determine that the shift operation type of the first data is a 1-bit shift operation when the error type is a decoding error; and the controller is further used for determining that the type of the shift operation of the first data is 10-bit shift operation when the error type is a feedback error signal.
Further, the shift module is configured to, when the shift operation type is a 1-bit shift operation, shift the first data by 1bit to obtain second data; and when the shift operation type is 10-bit shift operation, the method is further used for moving the first data by 10 bits to obtain second data.
Further, the decoding module is configured to distribute the second data to a port 0, a port 1, a port 2, and a port 3, respectively, in a group of 10 bits according to the data sequence.
Further, the apparatus further comprises: a k28.1 detection module, a k28.1 replacement module,
the decoding module is configured to decode the second data, and when the second data is decoded incorrectly, feed back decoding error feedback information to the shifting module;
the k28.1 replacing module is configured to replace a control code k28.1 with a control code k28.5 at the port 0 when the second data is decoded correctly, and the k28.1 detecting module is configured to detect a k28.1 code at the ports 1, 2, and 3, and feed back an error feedback information of the k28.1 code to the shifting module when any one of the ports 1, 2, and 3 detects the k28.1 code.
Further, the shift module is configured to receive first data on a link, where the first data includes 40-bit data; the decoding error feedback information is also used for determining the error type as a decoding error when the fed-back decoding error feedback information is received; and the controller is further used for determining the error type as a feedback error signal when the feedback error feedback information of the k28.1 code is received.
The embodiment of the invention provides a data processing method and a data processing device, wherein the type of shift operation of first data is determined according to the type of errors, and the type of errors comprises decoding errors and feedback error signals; performing shifting operation on the first data according to the shifting operation type to obtain second data; distributing the second data to a plurality of ports. The data processing method and the data processing device provided by the embodiment of the invention reduce the probability of receiving error data by the Qsgmii, improve the error identification capability of the Qsgmii interface to the opposite-end Qsgmii interface, accelerate the link synchronization sync process and further improve the reliability of the Qsgmii interface.
Drawings
In the drawings, which are not necessarily drawn to scale, like reference numerals may describe similar components in different views. Like reference numerals having different letter suffixes may represent different examples of similar components. The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed herein.
FIG. 1 is a block diagram of a prior art Qsgmii receiving side;
FIG. 2 is a first flowchart illustrating a data processing method according to an embodiment of the present invention;
FIG. 3 is a block diagram of a Qsgmii receiving side according to an embodiment of the present invention;
FIG. 4 is a second flowchart illustrating a data processing method according to an embodiment of the present invention;
FIG. 5 is a first schematic structural diagram of a data processing apparatus according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
The data processing method provided by the embodiment of the invention improves the existing receiving side Qsgmii, improves the shifting module, enables the shifting module to move 1bit or 10 bits at a time, and adds the k28.1 code detection module on the channels of the 1, 2 and 3 ports, enables the channels of the 1, 2 and 3 ports of the receiving side to identify the k28.1 code, and feeds back and outputs a code _ error signal to the front-stage moving module. When the ports 1, 2 and 3 of the receiving side of the Qsgmii at the local terminal receive the k28.1 code, the code stream is considered to be in error, the shifting module moves 10bit data once, and the synchronous sync process is carried out again, so that the error data of the opposite terminal is prevented from being received. The method provided by the embodiment of the invention reduces the probability of receiving error data by the Qsgmii, improves the error identification capability of the Qsgmii interface to the opposite-end Qsgmii interface, and accelerates the link sync process, thereby improving the reliability of the Qsgmii interface.
An embodiment of the present invention provides a data processing method, as shown in fig. 2, the method may include:
Wherein the error types include decoding errors and feedback error signals.
The execution main body of the data processing method provided by the embodiment of the invention is a data processing device, namely a data processing device, and the type of the shift operation of the first data is determined according to the error type, and the data processing device can be a Qsgmii receiving side specifically.
Illustratively, as shown in fig. 3, the block diagram of the Qsgmii receiving side includes: the device comprises a shifting module, a decoding module 8b/10b, a K28.1 code detection module, a synchronization module, a receiving module and a data conversion module.
The shift module carries out shift operation on the received 40-bit data according to the error type, and the shift operation is moved by 1bit or 10 bits each time. When the error type is a decoding error, moving by 1 bit; when an error code _ error signal fed back by a k28.1 code detection module later is received, 10 bits are moved once.
And the 8b/10 decoding module is used for decoding the received 10-bit data into 8-bit data according to the requirements of IEEE 802.336.2 chapters.
And the K28.1 code detection module is used for detecting the K28.1 codes on the ports 1, 2 and 3, and feeding back a code _ error signal to the shift module in time when the K28.1 codes are detected.
And the synchronization module is used for performing synchronization judgment on the received 8-bit data.
And the receiving module processes the synchronized data and completes the operations of auto-negotiation and the like.
Specifically, the determining the type of the shift operation of the received first data according to the error type includes:
when the error type is a decoding error, determining that the type of the shift operation of the first data is a 1-bit shift operation;
and when the error type is a feedback error signal, determining that the shift operation type of the first data is 10-bit shift operation.
And 102, performing shifting operation on the first data according to the shifting operation type to obtain second data.
Specifically, when the shift operation type is a 1-bit shift operation, the data processing apparatus moves the first data by 1bit to obtain second data; and when the shift operation type is 10-bit shift operation, the data processing device moves the first data by 10 bits to obtain second data.
And 103, distributing the second data to a plurality of ports.
Specifically, the data processing device distributes the second data to a port 0, a port 1, a port 2 and a port 3 respectively in a data sequence with 10 bits as a group.
Further, after the distributing the second data to a plurality of ports, further comprising:
decoding the second data, and feeding back decoding error feedback information when the second data is decoded in error;
when the second data decoding is correct, replacing a control code k28.1 with a control code k28.5 at the port 0, detecting a code k28.1 at the ports 1, 2 and 3, and feeding back error feedback information of the code k28.1 when any one port of the ports 1, 2 and 3 detects the code k 28.1.
Further, before the determining the type of the shift operation of the received first data according to the error type, the method includes:
receiving first data on a link, wherein the first data comprises 40-bit data;
when the fed-back decoding error feedback information is received, determining the error type as a decoding error;
and when the fed back k28.1 code error feedback information is received, determining the error type as a feedback error signal.
Specifically, as shown in FIG. 3, the data processing apparatus receives 40-bit data of 5G bits/s from the opposite end, and sends the data to the shift module. After shift processing by the shift module, the 10bit data is sent to the 10b/8b decoding module of 4 ports in sequence. If the port 0 detects the code k28.1, the code k28.1 is replaced by the code k28.5, and then the data is sent to the synchronization module.
The existing Qsgmii interface does not include a k28.1 code detection module in the 1, 2, 3 ports on the receiving side. According to the invention, a k28.1 code detection module is added to each of the ports 1, 2 and 3 on the receiving side of the Qsgmii, and when the ports 1, 2 and 3 detect the k28.1 code, an error signal is output to the shift module, so that when the 10b/8b decoding module of any one of the 4 channels detects the error 10b code, or the synchronization module of any one of the 4 channels does not detect the k28.5 code, or the k28.1 code detection module of any one of the channels 1, 2 and 3 detects the k28.1 code, the shift module generates out-of-synchronization information and sends the out-of-synchronization information to the shift module, and the shift module shifts again until a new synchronization position is found. Compared with the existing Qsgmii interface, the invention can improve the error recognition capability of the Qsgmii on the basis of ensuring the normal communication function, quicken the synchronization process and save the time for establishing a link.
The method provided by the embodiment of the invention can improve the capability of identifying the error of the local Qsgmii interface to the opposite Qsgmii interface while ensuring the normal communication function of the Qsgmii interface, thereby improving the reliability and stability of the system.
The embodiment of the invention provides a data processing method, which is characterized in that 5G bits/s data on a receiving link are subjected to shift operation, 10bit data are sequentially sent to ports 0, 1, 2 and 3, and the data are sequentially sent to a Gigabit Media Independent Interface (GMII) interface after passing through an 8b/10b decoding module, a k28.1 code detection module, a synchronization module, a receiving module and a data conversion module. The specific processing flow and steps are shown in fig. 4.
Specifically, when the k28.1 code is detected at any one of the ports 1, 2, and 3, the shifting module receives the k28.1 code error feedback information fed back by the k28.1 detecting module, and then performs step 204.
And step 204, moving the 40-bit data by 10 bits.
And step 205, moving the 40-bit data by 1 bit.
And step 210, replacing the control code k28.1 with k 28.5.
And step 212, performing receiving side operation such as synchronization and the like, and transmitting the data to the GMII interface.
It should be noted that, this embodiment takes ic and FPGA as an example for description, and may also be implemented in other manners such as a DSP manner, a logic device, a CPU manner, and the like, which is not limited in this embodiment of the present invention.
The data processing method provided by the embodiment of the invention reduces the probability of receiving error data by the Qsgmii, improves the error identification capability of the Qsgmii interface to the opposite-end Qsgmii interface, and accelerates the link synchronization sync process, thereby improving the reliability of the Qsgmii interface.
An embodiment of the present invention provides a data processing apparatus 30, as shown in fig. 5, the apparatus includes: a shift module 301, a decode module 302, wherein,
the shift module 301 is configured to determine a shift operation type of the first data according to the error type; the shift operation module is further used for performing shift operation on the first data according to the shift operation type to obtain second data;
the decoding module 302 is configured to distribute the second data to a plurality of ports.
Further, the error type includes a decoding error and a feedback error signal, and the shifting module 301 is configured to determine that the type of the shifting operation of the first data is a 1-bit shifting operation when the error type is a decoding error; and the controller is further used for determining that the type of the shift operation of the first data is 10-bit shift operation when the error type is a feedback error signal.
Further, the shifting module 301 is configured to, when the shifting operation type is a 1-bit shifting operation, shift the first data by 1bit to obtain second data; and when the shift operation type is 10-bit shift operation, the first data is moved by 10 bits to obtain second data.
Further, the decoding module 302 is configured to distribute the second data to a port 0, a port 1, a port 2, and a port 3 respectively in a group of 10 bits according to the data sequence.
Further, as shown in fig. 6, the apparatus further includes: a k28.1 detection module 303, a k28.1 replacement module 304,
the decoding module 302 is configured to decode the second data, and when the second data is decoded incorrectly, feed back decoding error feedback information to the shifting module;
the k28.1 replacing module 304 is configured to replace a control code k28.1 with a control code k28.5 at the port 0 when the second data is decoded correctly, and the k28.1 detecting module 303 is configured to detect a k28.1 code at the ports 1, 2, and 3, and feed back an error feedback information of the k28.1 code to the shifting module when the k28.1 code is detected at any one of the ports 1, 2, and 3.
Further, the shifting module 301 is configured to receive first data on a link, where the first data includes 40-bit data; the decoding error feedback information is also used for determining the error type as a decoding error when the fed-back decoding error feedback information is received; and the controller is further used for determining the error type as a feedback error signal when the feedback error feedback information of the k28.1 code is received.
Further, as shown in fig. 6, the apparatus further includes: a synchronization module 305, a receiving module 306, a data conversion module 307,
the synchronization module 305 is configured to perform synchronization judgment on distributed third data, where the third data is any group of distributed grouped second data;
the receiving module 306 is configured to process the synchronized third data, and complete operations such as auto-negotiation;
the data conversion module 307 is configured to perform data conversion on the third data processed by the receiving module, and send the third data after data conversion to a bit media independent interface GMII.
Specifically, for understanding of the data processing apparatus provided in the embodiment of the present invention, reference may be made to the description of the data processing method embodiment described above, and details of the embodiment of the present invention are not described herein again.
The data processing device provided by the embodiment of the invention reduces the probability of receiving error data by the Qsgmii, improves the error identification capability of the Qsgmii interface to the opposite-end Qsgmii interface, and accelerates the link synchronization sync process, thereby improving the reliability of the Qsgmii interface.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (10)
1. A method of data processing, the method comprising:
determining the type of the shift operation of the first data according to the error type;
performing shifting operation on the first data according to the shifting operation type to obtain second data;
distributing the second data to a plurality of ports;
the error type comprises a decoding error and a feedback error signal, and the determining of the shift operation type of the received first data according to the error type comprises:
when the error type is a decoding error, determining that the type of the shift operation of the first data is a 1-bit shift operation;
and when the error type is a feedback error signal, determining that the shift operation type of the first data is 10-bit shift operation.
2. The method of claim 1, wherein the shifting the first data according to the shifting operation type to obtain second data comprises:
when the shift operation type is 1-bit shift operation, moving the first data by 1bit to obtain second data;
and when the shift operation type is 10-bit shift operation, moving the first data by 10 bits to obtain second data.
3. The method of claim 1, wherein distributing the second data to a plurality of ports comprises:
and distributing the second data to a port 0, a port 1, a port 2 and a port 3 respectively by taking 10 bits as a group according to the data sequence.
4. The method of claim 3, further comprising, after said distributing the second data to a plurality of ports:
decoding the second data, and feeding back decoding error feedback information when the second data is decoded in error;
when the second data decoding is correct, replacing a control code k28.1 with a control code k28.5 at the port 0, detecting a code k28.1 at the ports 1, 2 and 3, and feeding back error feedback information of the code k28.1 when any one port of the ports 1, 2 and 3 detects the code k 28.1.
5. The method of claim 4, prior to determining the type of shift operation of the received first data based on the type of error, comprising:
receiving first data on a link, wherein the first data comprises 40-bit data;
when the fed-back decoding error feedback information is received, determining the error type as a decoding error;
and when the fed back k28.1 code error feedback information is received, determining the error type as a feedback error signal.
6. A data processing apparatus, characterized in that the apparatus comprises: a shift module, a decoding module, wherein,
the shift module is used for determining the shift operation type of the first data according to the error type; the shift operation module is further used for performing shift operation on the first data according to the shift operation type to obtain second data; the error type comprises a decoding error and a feedback error signal, and the shifting module is used for determining that the type of the shifting operation of the first data is 1-bit shifting operation when the error type is the decoding error; the data processing device is also used for determining that the type of the shift operation of the first data is 10-bit shift operation when the error type is a feedback error signal;
the decoding module is configured to distribute the second data to a plurality of ports.
7. The apparatus of claim 6, wherein the shifting module is configured to shift the first data by 1bit to obtain second data when the type of the shifting operation is a 1bit shifting operation; and when the shift operation type is 10-bit shift operation, the method is further used for moving the first data by 10 bits to obtain second data.
8. The apparatus of claim 6, wherein the decoding module is configured to distribute the second data to 0 port, 1 port, 2 port and 3 port respectively in data order with 10 bits as a group.
9. The apparatus of claim 8, further comprising: a k28.1 detection module, a k28.1 replacement module,
the decoding module is configured to decode the second data, and when the second data is decoded incorrectly, feed back decoding error feedback information to the shifting module;
the k28.1 replacing module is configured to replace a control code k28.1 with a control code k28.5 at the port 0 when the second data is decoded correctly, and the k28.1 detecting module is configured to detect a k28.1 code at the ports 1, 2, and 3, and feed back an error feedback information of the k28.1 code to the shifting module when any one of the ports 1, 2, and 3 detects the k28.1 code.
10. The apparatus of claim 9, wherein the shifting module is configured to receive first data on a link, and wherein the first data comprises 40-bit data; the decoding error feedback information is also used for determining the error type as a decoding error when the fed-back decoding error feedback information is received; and the controller is further used for determining the error type as a feedback error signal when the feedback error feedback information of the k28.1 code is received.
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| CN105681018A (en) * | 2016-01-14 | 2016-06-15 | 深圳市同创国芯电子有限公司 | Data sending and receiving method, data sending and receiving device and PCS sending and receiving equipment |
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