CN108111174A - A kind of LDPC code sending method, method of reseptance and device - Google Patents
A kind of LDPC code sending method, method of reseptance and device Download PDFInfo
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- CN108111174A CN108111174A CN201611062142.6A CN201611062142A CN108111174A CN 108111174 A CN108111174 A CN 108111174A CN 201611062142 A CN201611062142 A CN 201611062142A CN 108111174 A CN108111174 A CN 108111174A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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Abstract
This application discloses a kind of LDPC code sending methods, method of reseptance and device, according to the embodiment of the present application providing method, when being encoded using the corresponding LDPC code prototype figure of LDPC check matrix provided by the embodiments of the present application, form the LDPC code of 1/12 code check, all rows of LDPC code prototype figure play a role, in addition to the first row, all rows comprising submatrix A provide the connectedness between node, other rows provide external information, so as to effectively reduce bit error rate flat bed, realization is shorter in the code length of LDPC code, in the case that encoding and decoding complexity is constant, promote the error-correcting performance of LDPC code.
Description
Technical field
This application involves field of communication technology more particularly to a kind of low-density checksum (Low Density Parity
Check, LDPC) code sending method, method of reseptance and device.
Background technology
In a communications system, channel coding can ensure to resist the interference during information is sent, and information data is reliably passed
Transport to receiving device.Usual sending device needs to encode information data to obtain coded-bit, and coded-bit is carried out
Interweave, by the bit map after intertexture into modulation symbol, then handle and send modulation symbol by communication channel.Reception is set
After modulation symbol is received, information data is reverted to by decoding.
LDPC code has excellent error-correcting performance, high decoding throughput, decodes the features such as simple, so as current channel
The research hotspot of codec domain.
The design of LDPC check matrixes determines the whole decoding performance of LDPC code.It is JZ × LZ to define a dimension first
Binary system QC-LDPC codes parity check matrix H, be described as following form：
Wherein, each blockage matrix hj,l, 0≤j≤J, 0≤l≤L are the null matrix of a Z × Z either by one
Or the cyclic shift matrix of multiple unit matrix displacement battle array superpositions.For convenience's sake, the basic matrix B (H) that can be J × L with size
To describe H：
Wherein, bj,lIt is a numerical value or an array.Work as hj,lWhen being a single-place shift battle array, bj,lIt is defined as hj,l's
Shift parameters (work as hj,lWhen being the ring shift right of unit matrix, bj,l＞ 0；Work as hj,lWhen being unit matrix, bj,l=0).Work as hj,lIt is by more
When the Multiple Cycle displacement battle array that a unit matrix displacement battle array stacks up, bj,lIt is defined as hj,lShift parameters combine
Array.Particularly, h is worked asj,lWhen being a null matrix, bj,lLabeled as " blank ".
In order to obtain LDPC check matrixes, can check matrix be constructed by prototype figure, specifically, the prototype of a J × L
Figure can be described as following matrix form：
Wherein pj,lIt is a numerical value.The method that basic matrix B (H) is constructed by prototype figure P is as follows：Work as pj,lWhen=0, filling out
The position is just skipped when writing shift parameters；Work as pj,lWhen=1, a displacement ginseng is just filled in when shift parameters are filled in
Number；Work as pj,lWhen=i, i >=2, the array with i shift parameters is just filled in when shift parameters are filled in.
For this purpose, the embodiment of the present application provides a kind of LDPC code sending method, the LDPC code that this method is sent can compile
In the case that code complexity is constant, there is higher error-correcting performance.
The content of the invention
The embodiment of the present application provides a kind of LDPC code sending method, method of reseptance and device, to send a kind of compiling
In the case that code complexity is constant, there is the LDPC code of higher error-correcting performance.
In a first aspect, the embodiment of the present application provides a kind of LDPC code sending method, including：
Obtain LDPC check matrix；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
It is encoded according to the LDPC check matrix, obtains LDPC code, and send the LDPC code.
It is corresponding using LDPC check matrix provided by the embodiments of the present application according to the embodiment of the present application providing method
When LDPC code prototype figure is encoded, the LDPC code of 1/12 code check is formed, all rows of LDPC code prototype figure play a role, except
Outside the first row, all rows comprising submatrix A provide the connectedness between node, and other rows provide external information, so as to
Effectively to reduce bit error rate flat bed, in the case of realizing that the code length in LDPC code is shorter, encoding and decoding complexity is constant, LDPC is promoted
The error-correcting performance of code.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
Second aspect, the embodiment of the present application provide a kind of LDPC code sending device, including：
Processing unit, for obtaining LDPC check matrix；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
The processing unit for being encoded according to the LDPC check matrix, obtains LDPC code；
Transmit-Receive Unit, for sending the LDPC code.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
The third aspect, the embodiment of the present application provide a kind of LDPC code sending device, including：
Processor, for obtaining LDPC check matrix；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
The processor for being encoded according to the LDPC check matrix, obtains LDPC code；
Transceiver, for sending the LDPC code.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
Fourth aspect, the embodiment of the present application provide a kind of computer storage media, for saving as above-mentioned second aspect
Computer software instructions used in the LDPC code sending device of offer, it includes for performing the journey designed by above-mentioned first aspect
Sequence.
5th aspect, the embodiment of the present application provide a kind of LDPC code method of reseptance, including：
Receive LDPC code；
According to LDPC check matrix to the LDPC code into row decoding；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
According to the embodiment of the present application providing method, the LDPC code that this method receives is using provided by the embodiments of the present application
When the corresponding LDPC code prototype figure of LDPC check matrix is encoded, the LDPC code of 1/12 code check, LDPC code prototype figure are formed
All rows play a role, in addition to the first row, it is all comprising submatrix A row provide nodes between connectednesses, it is other
Row provides external information, so as to effectively reduce bit error rate flat bed, realizes that the code length in LDPC code is shorter, encoding and decoding complexity
In the case of constant, the error-correcting performance of LDPC code is promoted.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
6th aspect, the embodiment of the present application provide a kind of LDPC code reception device, including：
Transmit-Receive Unit, for receiving LDPC code；
Processing unit, for according to LDPC check matrix to the LDPC code into row decoding；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
7th aspect, the embodiment of the present application provide a kind of LDPC code reception device, including：
Transceiver, for receiving LDPC code；
Processor, for according to LDPC check matrix to the LDPC code into row decoding；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
Eighth aspect, the embodiment of the present application provide a kind of computer storage media, for saving as above-mentioned 6th aspect
Computer software instructions used in the LDPC code reception device of offer, it includes for perform it is above-mentioned 5th aspect designed by journey
Sequence.
Description of the drawings
Fig. 1 is a kind of LDPC code sending method flow diagram provided by the embodiments of the present application；
Fig. 2 is a kind of prototype figure provided by the embodiments of the present application；
Fig. 3 is a kind of prototype figure provided by the embodiments of the present application；
Fig. 4 is a kind of LDPC code method of reseptance flow diagram provided by the embodiments of the present application；
Fig. 5 is a kind of LDPC code sending device structure diagram provided by the embodiments of the present application；
Fig. 6 is a kind of LDPC code sending device structure diagram provided by the embodiments of the present application；
Fig. 7 is a kind of LDPC code reception device structure diagram provided by the embodiments of the present application；
Fig. 8 is a kind of LDPC code reception device structure diagram provided by the embodiments of the present application.
Specific embodiment
The embodiment of the present application can be applied to various mobile communication system, such as：Global system for mobile telecommunications (Global
System of Mobile communication, GSM) system, CDMA (Code Division Multiple
Access, CDMA) system, wideband code division multiple access (Wideband Code Division Multiple Access, WCDMA) system
System, General Packet Radio Service (General Packet Radio Service, GPRS), Long Term Evolution (Long Term
Evolution, LTE) it is system, advanced Long Term Evolution (Advanced long term evolution, LTE-A) system, logical
With mobile communication system (Universal Mobile Telecommunication System, UMTS), the Long Term Evolution of evolution
Other mobile communication system such as (evolved Long Term Evolution, eLTE) system, 5G.The embodiment of the present application may be used also
To be applied in the networks such as WLAN (Wireless Local Area Network, WLAN).
Hereinafter, the part term in the application is explained, in order to those skilled in the art understand that.
1), terminal, also referred to as user equipment (User Equipment, UE), be one kind provide a user voice and/or
The equipment of data connectivity, for example, portable equipment, mobile unit with wireless connecting function etc..Common terminal is for example
Including：Mobile phone, tablet computer, laptop, palm PC, mobile internet device (mobile internet device,
MID), wearable device, such as smartwatch, Intelligent bracelet, pedometer etc..
2), base station can be common base station (such as NodeB or eNB), can be new wireless controller (New Radio
Controller, NR controller), it can be centralized network element (Centralized Unit), can be new wireless base
It stands, can be radio frequency remoto module, can be micro-base station, can be relaying (relay), can be distributed net element
(Distributed Unit) can be receiving point (Transmission Reception Point, TRP) or transfer point
(Transmission Point, TP) or any other radio reception device, but the embodiment of the present application is without being limited thereto.
In the optimization of LDPC code prototype figure, general optimizing index is：Former mould external information transfers (Protograph
Extrinsic Information Transfer, PEXIT) thresholding, circle distribution, the connectedness between node.PEXIT thresholding energy
Enough predictions are in the case of without circle and unlimited code length, the convergence threshold of code word, are the waterfall area of LDPC code decoding performance curve
Design provides reference.The propagation distance of the connective information for influencing iterative decoding algorithm between circle distribution and node and
Prevalence effectiveness.Their sizes of General Influence minimum stopping set or the size of minimum code word, so as to influence LDPC code decoding
Bit error rate flat bed.
When short code is designed, influence of the PEXIT thresholdings for performance can generally be weaker than between circle distribution and node
It is connective.For sending performance preferably LDPC code, LDPC code prototype used in the LDPC code that is sent in the embodiment of the present application
The design of figure exactly finds balance, so as to obtain error-correcting performance preferably LDPC between thresholding and circle distribution and connectedness
Code.
For this purpose, with reference to the description of front, as shown in Figure 1, being a kind of LDPC code sending method provided by the embodiments of the present application
Flow diagram.
The main body for performing Fig. 1 method flows can be the sending devices such as terminal, base station, the embodiment of the present application to this and it is unlimited
It is fixed.Simultaneously, it is necessary to illustrate, in the embodiment of the present application, when sending device is terminal, receiving device can be that base station etc. be set
It is standby；When sending device is base station end, receiving device can be the equipment such as terminal.Certainly, simply example herein, sending device is with connecing
Receiving unit is not limited to above description, no longer illustrates one by one herein.
Referring to Fig. 1, this method includes：
Step 101：Obtain LDPC check matrix.
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
Step 102：It is encoded according to the LDPC check matrix, obtains LDPC code, and send the LDPC code.
In step 101, LDPC check matrix is expanded by LDPC code prototype figure corresponding with LDPC check matrix
It is obtained after exhibition.Specifically, each non-zero element in submatrix A, B, C, D, E in LDPC code prototype figure can be extended to k
The matrix of row k row, so as to obtain LDPC check matrix, wherein k carries out value according to actual needs.Wherein it is possible to using gradually
Increase (Progressive edge growth, PEG) method, approximate most short loop (Approximate Cycle into side
Extrinsic message degree, ACE) modes such as method, quasi- cyclic extensions are extended LDPC code prototype figure, and it is specific to expand
Exhibition process may be referred to description of the prior art, and details are not described herein.
The corresponding LDPC code prototype figure of LDPC check matrix can there are many form, specifically, with reference to the description of front,
As shown in Fig. 2, it is a kind of LDPC code prototype figure provided by the embodiments of the present application.
In the embodiment of the present application, the corresponding LDPC code prototype figure of LDPC check matrix is the matrix of M rows N row, optionally,
M is 22 integral multiple, and N is 24 integral multiple.For example, LDPC code prototype figure arranges for the matrix of 22 rows 24 row or 44 rows 48
Matrix.
Certainly, LDPC code prototype figure can also be the matrix of other sizes, and details are not described herein.
In the embodiment of the present application, when m is less than 5, row weight often capable is 1 in submatrix A, the row weight of each column is 1；Submatrix B
In often capable row weight be 2, the row weight of each column is 2；Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row weight is preferentially uniformly distributed；Submatrix E is lower triangular matrix, and
The row weight of each column is to be respectively less than or equal to 4, preferential, most of row weight is 3.
For example, submatrix A, B, C, D, E can be following matrixes：
OrOrOr OrOrOr
At this point, LDPC code prototype figure can be as shown in Figure 3.LDPC code prototype figure in Fig. 3 is the matrix of 44 rows 48 row, empty
The element value located in vain is 0.
It should be noted that A, B, C, D, E include but is not limited to 2 × 2 matrix or 3 × 3,4 × 4 and n
The matrix of × n, n are arbitrary positive integers.When matrix, ensure A, each ranks weight is constant by B, C, ensures E's
Lower triangular structure.
In the embodiment of the present application, when m is greater than or equal to 5, row weight often capable is 3 in submatrix A, the row weight of each column is 3；Son
Row weight often capable is 3 in matrix B, the row weight of each column is 3；Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；Submatrix E is lower triangular matrix, and in
The row weight of each column is respectively less than or equal to 4.
For example, submatrix A, B, C, D, E can be following matrixes：
OrOr
In step 102, the process encoded using LDPC check matrix can include：Coding side is verified according to the LDPC code
Matrix is encoded to sent information sequence, obtains the first verification sequence (verification sequence corresponding to i.e. pre-perforated node)
With the second verification sequence (verification sequence corresponding to variable node i.e. in addition to information node, pre-perforated node), to first
Verification sequence and the second verification sequence are punched, and obtain LDPC code, and LDPC code includes information sequence and punches remaining ratio
It is special.
Certainly, it is example more than, there can also be other cataloged procedures, no longer illustrate one by one herein.
According to LDPC code prototype figure provided by the embodiments of the present application, during using whole LDPC code prototype graph codes, 1/ is formed
The LDPC code of 12 code checks, all rows of LDPC code prototype figure play a role, all to include submatrix A's in addition to the first row
Row provides the connectedness between node, and other rows provide external information, so as to effectively reduce bit error rate flat bed, realize
In the case that the code length of LDPC code is shorter, encoding and decoding complexity is constant, the error-correcting performance of LDPC code is promoted.
Optionally, half is fallen in 1/12 coded data of all-key rate punching, may be constructed a 1/6 code check coding.LDPC at this time
Preceding 10 row of code prototype figure plays a role.Connective only to be had an effect by submatrix A, in addition to the first row, circle passes through sub- square
Battle array A is generated, and can so limit row formation of the ringlet beyond the first row.Further balance ring length and connectivity.The coding can
Further to be punched to check bit, the data before only transmitting after 1/4 coding form 1/3 code check coding, only LDPC code prototype figure
Preceding four row play a role.Rear three row in this four row all provides external information, indirectly mutually without connection relation to the first row
One entirety of composition, so as to further promoted LDPC code error-correcting performance.
Based on foregoing description, as shown in figure 4, being a kind of LDPC code method of reseptance flow signal provided by the embodiments of the present application
Figure.
The main body for performing Fig. 4 method flows can be the receiving devices such as terminal, base station, the embodiment of the present application to this and it is unlimited
It is fixed.Simultaneously, it is necessary to illustrate, in the embodiment of the present application, when sending device is terminal, receiving device can be that base station etc. be set
It is standby；When sending device is base station end, receiving device can be the equipment such as terminal.Certainly, simply example herein, sending device is with connecing
Receiving unit is not limited to above description, no longer illustrates one by one herein.
Referring to Fig. 4, this method includes：
Step 401：Receive LDPC code.
Step 402：According to LDPC check matrix to the LDPC code into row decoding.
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
In step 402, step 101 is may be referred to step 102 on the descriptions such as submatrix A, B, C, D, E and M, N, m,
Details are not described herein.
LDPC check matrix obtains after being extended by LDPC code prototype figure corresponding with LDPC check matrix,
Specific extended method, the application do not limit.
Likewise, it is specific how according to LDPC check matrix to the LDPC code into row decoding, the embodiment of the present application pair
This is not limited, and details are not described herein.
Based on identical technical concept, the embodiment of the present application also provides a kind of LDPC code sending device, which can perform
Above method embodiment.
As shown in figure 5, provide a kind of LDPC code sending device structure diagram for the embodiment of the present application.
Referring to Fig. 5, which includes：
Processing unit 501, for obtaining LDPC check matrix；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
The processing unit 501 for being encoded according to the LDPC check matrix, obtains LDPC code；
Transmit-Receive Unit 502, for sending the LDPC code.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
Based on identical technical concept, the embodiment of the present application also provides a kind of LDPC code sending device, which can perform
Above method embodiment.
As shown in fig. 6, provide a kind of LDPC code sending device structure diagram for the embodiment of the present application.
Referring to Fig. 6, which includes：
Processor 601, for obtaining LDPC check matrix；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
The processor 601 for being encoded according to the LDPC check matrix, obtains LDPC code；
Transceiver 602, for sending the LDPC code.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
Based on identical technical concept, the embodiment of the present application also provides a kind of LDPC code reception device, which can perform
Above method embodiment.
As shown in fig. 7, provide a kind of LDPC code transceiver structure diagram for the embodiment of the present application.
Referring to Fig. 7, which includes：
Transmit-Receive Unit 701, for receiving LDPC code；
Processing unit 702, for according to LDPC check matrix to the LDPC code into row decoding；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
Based on identical technical concept, the embodiment of the present application also provides a kind of LDPC code reception device, which can perform
Above method embodiment.
As shown in figure 8, provide a kind of LDPC code transceiver structure diagram for the embodiment of the present application.
Referring to Fig. 8, which includes：
Transceiver 801, for receiving LDPC code；
Processor 802, for according to LDPC check matrix to the LDPC code into row decoding；
Wherein, the corresponding LDPC code prototype figure of the LDPC check matrix is the matrix of M rows N row, and the LDPC code is former
Type figure includes first portion, second portion, Part III and Part IV, includes an at least column element per part；It is described
First portion is since the 1st row in LDPC code prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A,
Z、Z、Z、Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C,
Z、Z、A、C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is opened from the 1st row in the LDPC code prototype figure
Begin, successively including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；The LDPC code prototype
Part IV is since the 1st row in figure, successively including submatrix O, I；A, B, C, D, E and Z square formation are the matrix of m rows m row,
Z square formations are the full 0 matrix of m rows m row, and O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
Optionally, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, the row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
Optionally, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
Optionally, row weight often capable in submatrix D is 3, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
Optionally, M is 22 integral multiple, and N is 24 integral multiple.
In the embodiment of the present application, Fig. 6 and Fig. 8 transceivers can be wired transceiver, transceiver or its combination.Have
Line transceiver for example can be Ethernet interface.Ethernet interface can be optical interface, electrical interface or its combination.Transceiver
Such as can be WLAN Transceivers, cellular network transceiver or its combination.Processor can be central processing unit (English
Text：Central processing unit, abbreviation：CPU), network processing unit (English：Network processor, abbreviation：
) or the combination of CPU and NP NP.Processor can further include hardware chip.Above-mentioned hardware chip can be special collection
Into circuit (English：Application-specific integrated circuit, abbreviation：ASIC), programmable logic device
(English：Programmable logic device, abbreviation：PLD) or it is combined.Above-mentioned PLD can be complex programmable logic
Device (English：Complex programmable logic device, abbreviation：CPLD), field programmable gate array
(English：Field-programmable gate array, abbreviation：FPGA), Universal Array Logic (English：generic
Array logic, abbreviation：GAL) or it is combined.
Wherein, bus interface can also be included in Fig. 6 and Fig. 8, bus interface can include any number of interconnection
Bus and bridge, the various circuits for the memory that the one or more processors and memory specifically represented by processor represent link
Together.Bus interface can also be by various other circuits of such as peripheral equipment, voltage-stablizer and management circuit or the like
It links together, these are all it is known in the art, therefore, no longer it is described further herein.Bus interface carries
For interface.Transceiver provides the unit to communicate over a transmission medium with various other equipment.Processor is responsible for bus
Framework and common processing, memory can store processor used data when performing operation.
The application is with reference to the flow according to the method for the embodiment of the present application, equipment (system) and computer program product
Figure and/or block diagram describe.It should be understood that it can be realized by computer program instructions every first-class in flowchart and/or the block diagram
The combination of flow and/or box in journey and/or box and flowchart and/or the block diagram.These computer programs can be provided
The processor of all-purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices is instructed to produce
A raw machine so that the instruction performed by computer or the processor of other programmable data processing devices is generated for real
The device for the function of being specified in present one flow of flow chart or one box of multiple flows and/or block diagram or multiple boxes.
These computer program instructions, which may also be stored in, can guide computer or other programmable data processing devices with spy
Determine in the computer-readable memory that mode works so that the instruction generation being stored in the computer-readable memory includes referring to
Make the manufacture of device, the command device realize in one flow of flow chart or multiple flows and/or one box of block diagram or
The function of being specified in multiple boxes.
These computer program instructions can be also loaded into computer or other programmable data processing devices so that counted
Series of operation steps is performed on calculation machine or other programmable devices to generate computer implemented processing, so as in computer or
The instruction offer performed on other programmable devices is used to implement in one flow of flow chart or multiple flows and/or block diagram one
The step of function of being specified in a box or multiple boxes.
Although the preferred embodiment of the application has been described, those skilled in the art once know basic creation
Property concept, then can make these embodiments other change and modification.So appended claims be intended to be construed to include it is excellent
It selects embodiment and falls into all change and modification of the application scope.
Obviously, those skilled in the art can carry out the application model of the various modification and variations without departing from the application
It encloses.In this way, if these modifications and variations of the application belong within the scope of the application claim, then the application is also intended to
Including these modification and variations.
Claims (14)
1. a kind of low-density checksum LDPC code sending method, which is characterized in that including：
Obtain LDPC check matrix；
Wherein, the matrix that the corresponding LDPC code prototype figure of the LDPC check matrix arranges for M rows N, the LDPC code prototype figure
Including first portion, second portion, Part III and Part IV, include an at least column element per part；The LDPC code
First portion is since the 1st row in prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A, Z, Z, Z,
Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C, Z, Z, A,
C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is since the 1st row in the LDPC code prototype figure, successively
Including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；In the LDPC code prototype figure
Four parts are since the 1st row, successively including submatrix O, I；A, B, C, D, E and Z square formation be m rows m row matrix, Z square formations
For the full 0 matrix of m rows m row, O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
It is encoded according to the LDPC check matrix, obtains LDPC code, and send the LDPC code.
2. according to the method described in claim 1, it is characterized in that, m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
3. method according to claim 1 or 2, which is characterized in that
The row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
4. according to the method described in claim 1, it is characterized in that, m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
5. the method according to claim 1 or 4, which is characterized in that
Row weight often capable is 3 in submatrix D, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
6. method according to any one of claims 1 to 5, which is characterized in that M is 22 integral multiple, and N is 24 integral multiple.
7. a kind of low-density checksum LDPC code method of reseptance, which is characterized in that including：
Receive LDPC code；
According to LDPC check matrix to the LDPC code into row decoding；
Wherein, the matrix that the corresponding LDPC code prototype figure of the LDPC check matrix arranges for M rows N, the LDPC code prototype figure
Including first portion, second portion, Part III and Part IV, include an at least column element per part；The LDPC code
First portion is since the 1st row in prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A, Z, Z, Z,
Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C, Z, Z, A,
C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is since the 1st row in the LDPC code prototype figure, successively
Including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；In the LDPC code prototype figure
Four parts are since the 1st row, successively including submatrix O, I；A, B, C, D, E and Z square formation be m rows m row matrix, Z square formations
For the full 0 matrix of m rows m row, O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
8. a kind of low-density checksum LDPC code sending device, which is characterized in that including：
Processing unit, for obtaining LDPC check matrix；
Wherein, the matrix that the corresponding LDPC code prototype figure of the LDPC check matrix arranges for M rows N, the LDPC code prototype figure
Including first portion, second portion, Part III and Part IV, include an at least column element per part；The LDPC code
First portion is since the 1st row in prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A, Z, Z, Z,
Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C, Z, Z, A,
C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is since the 1st row in the LDPC code prototype figure, successively
Including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；In the LDPC code prototype figure
Four parts are since the 1st row, successively including submatrix O, I；A, B, C, D, E and Z square formation be m rows m row matrix, Z square formations
For the full 0 matrix of m rows m row, O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row；
The processing unit for being encoded according to the LDPC check matrix, obtains LDPC code；
Transmit-Receive Unit, for sending the LDPC code.
9. device according to claim 8, which is characterized in that m is less than 5；
Row weight often capable is 1 in submatrix A, the row weight of each column is 1；
Row weight often capable is 2 in submatrix B, the row weight of each column is 2；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
10. device according to claim 8 or claim 9, which is characterized in that
The row weight of each column is 3 in submatrix D, and row is uniformly distributed again；
Submatrix E is lower triangular matrix, and the row weight of middle each column is respectively less than or equal to 4.
11. device according to claim 8, which is characterized in that m is greater than or equal to 5；
Row weight often capable is 3 in submatrix A, the row weight of each column is 3；
Row weight often capable is 3 in submatrix B, the row weight of each column is 3；
Row weight often capable is 3 in submatrix C, the row weight of each column is 3.
12. the device according to claim 8 or 11, which is characterized in that
Row weight often capable is 3 in submatrix D, the row weight of each column is 3；
Submatrix E is lower triangular matrix, and the row weight of each column is respectively less than or equal to 4.
13. according to any device of claim 8 to 12, which is characterized in that M is 22 integral multiple, and N is 24 integer
Times.
14. a kind of low-density checksum LDPC code reception device, which is characterized in that including：
Transmit-Receive Unit, for receiving LDPC code；
Processing unit, for according to LDPC check matrix to the LDPC code into row decoding；
Wherein, the matrix that the corresponding LDPC code prototype figure of the LDPC check matrix arranges for M rows N, the LDPC code prototype figure
Including first portion, second portion, Part III and Part IV, include an at least column element per part；The LDPC code
First portion is since the 1st row in prototype figure, successively including submatrix C, C, Z, Z, C, A, Z, Z, Z, Z, C, B, B, A, Z, Z, Z,
Z、Z、Z、Z、Z、Z；Second portion is since the 1st row in the LDPC code prototype figure, successively including submatrix D, Z, C, Z, Z, A,
C、C、A、Z、Z、Z、Z、A、C、B、B、A、Z、Z、Z、Z、Z；Part III is since the 1st row in the LDPC code prototype figure, successively
Including submatrix E, Z, Z, C, Z, Z, Z, Z, A, C, Z, Z, Z, Z, Z, Z, Z, Z, A, C, B, B, A；In the LDPC code prototype figure
Four parts are since the 1st row, successively including submatrix O, I；A, B, C, D, E and Z square formation be m rows m row matrix, Z square formations
For the full 0 matrix of m rows m row, O is the full 0 matrix of m rows N-3m row, and I is the unit matrix of M-m rows N-3m row.
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