CN108111169A - A kind of joint bearing calibration of the linear mismatches of four-way TIADC and non-linear mismatch - Google Patents
A kind of joint bearing calibration of the linear mismatches of four-way TIADC and non-linear mismatch Download PDFInfo
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Abstract
The present invention provides one kind to be directed to the time-interleaved analog-digital converter of four-way（4‑TIADC）Linear mismatch and the method for non-linear mismatch joint correction, this method is by 4 TIADC to ideal input signal slightly over-sampling, and the frequency response multinomial of appropriate rank and Taylor series characterization system linearity mismatch properties and non-linear mismatch properties are respectively adopted, using the mismatch information on 4 TIADC systems output over-sampling band, design is based on normalization minimum mean-square error（NLMS）Algorithm linear mismatch error and non-linear mismatch error are concurrently carried out it is real-time while estimation while compensate, so as to obtain joint correction export.4 TIADC system linearities and nonlinearity erron are all accounted for scope and using the technology of combined in parallel correction by this method, and better calibration result is compensated so as to obtain comparing arbitrary single error.This method considers the mismatch errors of TIADC systems more comprehensively, and simple and practicable, and compensation effect is good.
Description
Technical field
The present invention relates to signal sampling and processing technology field, more particularly, to a kind of linear mismatches of four-way TIADC
With the joint bearing calibration of non-linear mismatch.
Background technology
With the continuous development of integrated circuit technique, the popularization of digitizing technique, to the sampling speed of modulus switching device ADC
The requirement of rate and sampling precision is higher and higher, and not requiring nothing more than data collecting system has high sample rate, also to there is high sampling
Precision.In actual utilization, there is high dependence to real-time sampling rate and sampling precision.However the maximum of ADC is adopted
Sample rate-constrained is a pair of contradictory body between resolution ratio and sampling rate, high sampling rate requirement is shorter in its resolution ratio
Conversion time, and high-resolution then requires longer conversion time.According to current IC design technologies, adopting for higher speed is realized
Sample rate is, it is necessary to develop a kind of ADC module based on new construction and new method.What the prior art was provided can realize ultrahigh speed
The system of sampling is exactly the ADC system (TIADC) using time-interleaved (Time-interleaved) structure.
The ADC system of this structure has identical sample rate f using M piecessSingle ADC module, using parallel structure,
Every ADC module is to be separated by 1/ (M*fs) time interval sampled, to reach sample rate as M*fs(total sampling rate f=M*
fs) effect.Theoretically, the ADC system of this M channel parallels alternating sampling enables to the sampling rate of whole system to singly
M times of a ADC module.But due to manufacturing process inherently the shortcomings that, it is impossible to so that per an a piece of ADC module complete mould
Equally, so there are mismatch error between will necessarily causing the ADC module of each passage, and every ADC itself with differential and
Integral nonlinearity characteristic, so as to seriously reduce the signal-to-noise ratio of entire ADC system.
At present, most methods are estimated and school mainly for linear mismatch, such as gain error, time error etc.
Just, Part Methods mismatch caused by analog-digital converter (ADC) integration and differential nonlinearity of itself is estimated and is corrected.
However, in order to improve the overall performance of TIADC, whether linear mismatch and non-linear mismatch, all should account for scope simultaneously
Estimated and corrected.Also there is the method for the linear mismatch of binary channels TIADC and the joint correction of non-linear mismatch before this, be
Two passages are expanded to the even more sampling of four-way by the sampling rate of the system of raising to adapt to wider application scenarios
Passage is that have to inquire into researching value and effective method.Certainly, the extension of ampling channel number is necessarily accompanied with more
Complicated aliasing error, which needs to analyze and designs corresponding correcting algorithm, to be compensated.
The content of the invention
The present invention only individually carries out linear mismatch error or non-linear mismatch error to solve above existing TIADC technologies
The bad technological deficiency of calibration result caused by estimation and compensation provides linear mismatches of a kind of four-way TIADC and non-thread
The joint bearing calibration of property mismatch.
For realization more than goal of the invention, the technical solution adopted is that：
The joint bearing calibration of a kind of linear mismatches of four-way TIADC and non-linear mismatch, comprises the following steps：
S1. input signal x (t) is set to meet nyquist sampling theorem, and 4-TIADCs is obtained using slight over-sampling
The output y [n] of system；
S2. determine the exponent number P of channel frequence receptance function, utilize P rank multinomials characterization 4-TIADCs system linearity frequencies
Ring mismatch：The discrete frequency receptance function time-domain expression of each passage of system is0≤m≤3, wherein
αm,pFor the p rank multinomial coefficients of m passages, dp[n] is p grades of discrete differential devices；
S3. make
It is expected that linearity error can be expressed asWherein xp
[n]=dp[n]*x[n]；X [n] is the input of 4-TIADCs systems；
S4. linearity error coefficient is made0≤p≤P-1, it is assumed that its estimate at certain moment isLinearity error is reconstructed using the x [n] in y [n] approximate substitution step S3, is obtained
The estimate of certain time line error isWherein
yp[n]=dp[n]*y[n]；
S5. determine nonlinear transfer function exponent number L, utilize the non-linear mistake of Taylor series characterization 4-TIADCs system channels
With characteristic:The nonlinear transmission characteristic function of each passage of system0≤m≤3, whereinRepresent 4-
The coefficient of the l ranks of TIADCs system m passage Taylor polynomials, xl[n] represents the l powers of x [n]；
S6. make
It is expected that nonlinearity erron can be expressed as：
S7. nonlinearity erron coefficient is made2≤l≤L, it is assumed that it is in the estimation at some moment
It is worth and isNonlinearity erron is reconstructed using the x [n] in y [n] approximate substitution step S6, is obtained
Estimate to certain moment nonlinearity erron isWherein
yl[n] represents the l power of y [n]；
S8. subtract the linear mismatch error of step S4 reconstruct using the output y [n] of 4-TIADCs systems and step S7 is reconstructed
Non-linear mismatch error, the result after being compensatedIt is exported, i.e. the correction output at certain moment
Preferably, in the step S4 linear error coefficient estimateAnd S7
The estimate of middle nonlinearity erron coefficientSpecific estimation procedure it is as follows：
Corresponding high-pass filter f [n] is designed, makes the cutoff frequency of high-pass filter f [n] higher than ideal signal
Cutoff frequency defines cost function
WhereinWhenAndWhen, ε [n] → 0, with
This design NLMS algorithm is to linearity error coefficients RpWith nonlinearity erron coefficient SlEstimation is iterated, iterative formula is as follows：
Wherein μtAnd μhIt is convergence factor, cont is the positive number of a very little, avoids zero except problem.
Preferably, the differentiator used in the step S3 is linear phase digital differentiator.
Compared with prior art, the beneficial effects of the invention are as follows：
The present invention solves existing TIADC technologies and only individually linear mismatch error or non-linear mismatch error is estimated
The bad technological deficiency with the calibration result caused by compensation, and sampled compared with binary channels, sampling channel is expanded to four
Passage can improve sampling rate to adapt to wider application scenarios.It is time-interleaved for four-way the present invention provides one kind
The linear mismatch of analog-digital converter (4-TIADC) and the method for non-linear mismatch joint correction, this method is by 4-TIADC to ideal
Input signal slightly over-sampling, and the frequency response multinomial of appropriate rank and Taylor series characterization system linearity mismatch is respectively adopted
Characteristic and non-linear mismatch properties, using the mismatch information on 4-TIADC systems output over-sampling band, design is based on normalization most
Small mean square error (NLMS) algorithm linear mismatch error and non-linear mismatch error are concurrently carried out it is real-time while estimation while compensate,
So as to obtain joint correction output.4-TIADC system linearities and nonlinearity erron are all accounted for scope and adopted by this method
The technology corrected with combined in parallel, better calibration result is compensated so as to obtain comparing arbitrary single error.This method pair
The mismatch errors of TIADC systems considers more comprehensively, and simple and practicable, and compensation effect is good.
Description of the drawings
Fig. 1 is the structure diagram of time-interleaved analog-digital converter.
Fig. 2 is the four-way TIADC model schematics with linear processes mismatch.
Fig. 3 is the fundamental block diagram of joint bearing calibration provided by the invention.
Fig. 4 is the implementation schematic diagram of adaptive combined bearing calibration provided by the invention.
Fig. 5 is the flow chart of bearing calibration.
Specific embodiment
Attached drawing is only for illustration, it is impossible to be interpreted as the limitation to this patent；
Below in conjunction with drawings and examples, the present invention is further elaborated.
Embodiment 1
As shown in figure 5, method provided by the invention has specifically included following steps：
S1. input signal x (t) is set to meet nyquist sampling theorem, and 4-TIADCs is obtained using slight over-sampling
The output y [n] of system；
S2. determine the exponent number P of channel frequence receptance function, utilize P rank multinomials characterization 4-TIADCs system linearity frequencies
Ring mismatch：The discrete frequency receptance function time-domain expression of each passage of system is0≤m≤3, wherein
αm,pFor the p rank multinomial coefficients of m passages, dp[n] is p grades of discrete differential devices；
S3. make Phase
Hope linearity error that can be expressed asWherein xp[n]
=dp[n]*x[n]；
S4. makeAssuming that its estimate at certain moment isLinearity error is reconstructed using the x [n] in y [n] approximate substitution step S3, is obtained
Estimate to certain time line error isWhereinyp
[n]=dp[n]*y[n]；
S5. determine nonlinear transfer function exponent number L, utilize the non-linear mistake of Taylor series characterization 4-TIADCs system channels
With characteristic:The nonlinear transmission characteristic function of each passage of system0≤m≤3, whereinRepresent 4-
The coefficient of the l ranks of TIADCs system m passage Taylor polynomials, xl[n] represents the l powers of x [n]；
S6. make
It is expected that nonlinearity erron can be expressed as
Wherein v [n]=x [n]+et[n] represents that input signal passes through the sample variance signal that channel frequence receptance function generates, due to by mistake
Poor et[n] relative input signal x [n] is very small, therefore they are mutually added in e under power computingt[n] is negligible, i.e. vl[n]=
(x[n]+et[n])l≈xl[n], then it is expected nonlinearity erron can using approximate representation as
S7. makeAssuming that its estimate at some moment is
Nonlinearity erron is reconstructed using the x [n] in y [n] approximate substitution step S6, obtains the estimation of certain moment nonlinearity erron
It is worth and isWhereinyl[n] table
Show the l power of y [n]；
S8. subtract the linear mismatch error of step S4 reconstruct using the output y [n] of 4-TIADCs systems and step S7 is reconstructed
Non-linear mismatch error, the result after being compensatedIt is exported, i.e. the correction output at certain moment
In specific implementation process, the estimate of linear error coefficient in the step S4
And in S7 nonlinearity erron coefficient estimate
Specific estimation procedure it is as follows：
Corresponding high-pass filter f [n] is designed, makes the cutoff frequency of high-pass filter f [n] higher than ideal signal
Cutoff frequency defines cost function
WhereinWhenAndWhen, ε [n] → 0, with
This design NLMS algorithm is to linearity error coefficients RpWith nonlinearity erron coefficient SlEstimation is iterated, iterative formula is as follows：
Wherein μtAnd μhIt is convergence factor, cont is the positive number of a very little, avoids zero except problem.
Embodiment 2
The present embodiment has carried out specific experiment on the basis of embodiment 1：
It is the structure diagram of time-interleaved analog-digital converter as shown in Figure 1, input signal is inputted with M passages, and every logical
Road samples high-rate input signals with identical sample rate but different sampling instant (adjacency channel differs the moment), final to merge
Go out to export signal, the analog-to-digital conversion of high-speed sampling is realized with this.The experiment test narrowband input signal of the present embodiment, using 22
The multitone sinusoidal signal of frequency is as input, by four-way TIADC systems shown in Fig. 2, the TIADC outputs before being corrected
y[n].
TIADC system linear mismatches are modeled using 3 order frequencies response multinomial, i.e. P=3, using 3 rank (i.e. P=
3) linear polynomial carries out channel frequence receptance function approximate, and obtaining linearity error parameter is：R0=[0.005,0.003,
0.01]T, R1=[- 0.01,0.02, -0.003]T, R2=[0.001, -0.001,0.004]T, filtered using the fdatool of matlab
Ripple device design tool bag designs the differentiator of 40 rank of level-one, and the differentiator of higher level is obtained by convolution algorithm.
Equally nonlinear characteristic is described using 3 ranks (i.e. L=3) nonlinear polynomial, the parameter setting of each passage
It is as follows：
Nonlinearity erron parameter is obtained as S2=10-4[2,-1.5,-3,-0.5]T, S3=10-4[1.75,-0.75,1.75,2.25]T。
The fundamental block diagram of the present embodiment is illustrated in figure 3, linear mismatch and non-linear mismatch are combined using parallel mode
Estimation estimation correction if Fig. 4 shows the specific schematic diagram of the adaptive combined bearing calibration, sets convergence factor μt=0.005,
μh=0.0005, using designing to obtain the high-pass filter of 40 ranks using fdatool kits.
The iterative process of linear mismatch parameter and non-linear mismatch parameter is observed in experimentation, convergence curve starts just
Shi Bianhua Amplitude Ratios are larger, but in sampled data points to 104After basically reach convergence state, and main affecting parameters can be by mistake
Exact value is converged in poor allowed band.
Before signal is without overcorrect, there are the signal peaks that many places are generated due to aliasing mismatch, i.e., there are substantial amounts of noise hairs
Thorn, and since the presence of non-linear mismatch causes the rising (at -75dBc) of error plane, SFDR at this time is (without spuious dynamic
Scope) for 34.08dBc, Signal to Noise Ratio (SNR)=31.8631dB.And by correction after, due to mismatch generate signal peaks base
This disappearance, noise spectrum are suppressed, and error plane drops to -100dBc by -75dBc previous and locates, after correction
SFDR=54.451dBc, SNR=52.0186dB basically reach correction desired effects.
Embodiment 3
The present embodiment on the basis of embodiment 1, using with same systematic parameter in embodiment 2 and differentiator and height
Bandpass filter has carried out specific experiment：
The experiment test wideband input signal of the present embodiment uses an average as zero, and the white Gaussian noise that variance is 1 leads to
One is crossed as 0~0.8f obtained by fdatool tool designss(fsFor system sampling frequency) low-pass filter (meet system mistake
Sampling condition), input of the gained signal as TIADC, by four-way TIADC systems shown in Fig. 2, before being corrected
TIADC exports y [n]
Convergence factor μ is sett=0.1, μh=0.01, signal y [n] is passed through into adaptive combined bearing calibration shown in Fig. 4
Schematic diagram is embodied, the iterative process of linear mismatch parameter and non-linear mismatch parameter, convergence curve are observed in experimentation
It is larger to change Amplitude Ratio in firm start, but in sampled data points to 104After basically reach convergence state, and main affecting parameters
Exact value can be converged in allowable range of error.
Before signal does not correct, since the presence of linear processes error causes on the over-sampling band of this no signal energy
Error energy is generated, error plane is probably at -88.99dBc, Signal to Noise Ratio (SNR)=34.7593dB at this time；Pass through
After correction, the error plane on over-sampling band drops to general -120dBc and locates, Signal to Noise Ratio (SNR)=61.2817dB after correction,
Calibration result is preferable.
Obviously, the above embodiment of the present invention is only intended to clearly illustrate example of the present invention, and is not pair
The restriction of embodiments of the present invention.For those of ordinary skill in the art, may be used also on the basis of the above description
To make other variations or changes in different ways.There is no necessity and possibility to exhaust all the enbodiments.It is all this
All any modification, equivalent and improvement made within the spirit and principle of invention etc., should be included in the claims in the present invention
Protection domain within.
Claims (3)
1. a kind of joint bearing calibration of linear mismatches of four-way TIADC and non-linear mismatch, it is characterised in that：Including following step
Suddenly：
S1. input signal x (t) is set to meet nyquist sampling theorem, and 4-TIADCs systems are obtained using slight over-sampling
Output y [n]；
S2. determine the exponent number P of channel frequence receptance function, lost using the characterization 4-TIADCs system linearities frequency response of P rank multinomials
Match somebody with somebody：The discrete frequency receptance function time-domain expression of each passage of system isWherein αm,p
For the p rank multinomial coefficients of m passages, dp[n] is p grades of discrete differential devices；
S3. make
It is expected that linearity error can be expressed asWherein xp
[n]=dp[n]*x[n]；X [n] is the input of 4-TIADCs systems；
S4. linearity error coefficient is madeAssuming that its estimate at certain moment isLinearity error is reconstructed using the x [n] in y [n] approximate substitution step S3, is obtained
The estimate of certain time line error isWherein
yp[n]=dp[n]*y[n]；
S5. nonlinear transfer function exponent number L is determined, the non-linear mismatch using Taylor series characterization 4-TIADCs system channels is special
Property:The nonlinear transmission characteristic function of each passage of systemWhereinRepresent 4-TIADCs
The coefficient of the l ranks of system m passage Taylor polynomials, xl[n] represents the l powers of x [n]；
S6. make
It is expected that nonlinearity erron can be expressed as：
S7. nonlinearity erron coefficient is madeAssuming that its estimate at some moment isNonlinearity erron is reconstructed using the x [n] in y [n] approximate substitution step S6, obtains some time
Carve nonlinearity erron estimate beWhereinyl
[n] represents the l power of y [n]；
S8. using 4-TIADCs systems output y [n] subtract step S4 reconstruct linear mismatch error and step S7 reconstruct it is non-
Linear mismatch error, the result after being compensatedIt is exported, i.e. the correction output at certain moment
2. the joint bearing calibration of the linear mismatches of four-way TIADC according to claim 1 and non-linear mismatch, feature
It is：The estimate of linear error coefficient in the step S4It is and non-linear in S7
The estimate of error coefficientSpecific estimation procedure it is as follows：
Corresponding high-pass filter f [n] is designed, the cutoff frequency of high-pass filter f [n] is made to be higher than the cut-off of ideal signal
Frequency defines cost function
WhereinWhenAndWhen, ε [n] → 0, with
This design NLMS algorithm is to linearity error coefficients RpWith nonlinearity erron coefficient SlEstimation is iterated, iterative formula is as follows：
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Wherein μtAnd μhIt is convergence factor, cont is the positive number of a very little, avoids zero except problem.
3. the joint bearing calibration of the linear mismatches of four-way TIADC according to claim 1 and non-linear mismatch, feature
It is：The differentiator used in the step S3 is linear phase digital differentiator.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109361389A (en) * | 2018-09-03 | 2019-02-19 | 北京新岸线移动多媒体技术有限公司 | A kind of timesharing interleaved analog-digital converter multichannel mismatch error calibration method and system |
| CN110113049A (en) * | 2019-04-12 | 2019-08-09 | 中国人民解放军国防科技大学 | Double-channel TIADC nonlinear mismatch self-adaptive estimation method |
| CN111988046A (en) * | 2020-08-19 | 2020-11-24 | 中国电子科技集团公司第三十六研究所 | Nonlinear system correction method and device and electronic equipment |
| CN113517890A (en) * | 2021-07-21 | 2021-10-19 | 电子科技大学 | Extraction method for sampling time mismatch of time-interleaved ADC (analog to digital converter) |
| CN115801009A (en) * | 2023-01-30 | 2023-03-14 | 上海芯炽科技集团有限公司 | Method for compensating time offset error of TIADC parallel acquisition system |
| CN115941078A (en) * | 2022-10-31 | 2023-04-07 | 西安微电子技术研究所 | Receiver multichannel consistency calibration method based on intermediate frequency processing unit |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080122673A1 (en) * | 2006-11-29 | 2008-05-29 | Dyer Kenneth C | Gain and linearity matching for multi-channel time-interleaved pipelined ADC |
| US20120326902A1 (en) * | 2009-06-26 | 2012-12-27 | Anthony Michael P | Background calibration of offsets in interleaved analog to digital converters |
| CN103746695A (en) * | 2013-12-27 | 2014-04-23 | 电子科技大学 | Mismatch correction method of time-interleaved analog-to-digital converter inter-channel sampling time |
| CN103825612A (en) * | 2014-01-17 | 2014-05-28 | 电子科技大学 | Sampling clock mismatch background correction method based on time-to-digital converter |
| US20170227653A1 (en) * | 2016-02-05 | 2017-08-10 | Thales | Method for calibrating a satellite radio navigation receiver |
| CN107302357A (en) * | 2017-05-15 | 2017-10-27 | 中山大学 | A kind of joint bearing calibration of the linear frequency response mismatches of binary channels TIADC and non-linear mismatch |
| CN106788436B (en) * | 2016-11-09 | 2020-05-22 | 上海芯圣电子股份有限公司 | Voltage coefficient calibration method applied to PIP capacitor array in SARADC |
-
2018
- 2018-01-03 CN CN201810005682.3A patent/CN108111169B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080122673A1 (en) * | 2006-11-29 | 2008-05-29 | Dyer Kenneth C | Gain and linearity matching for multi-channel time-interleaved pipelined ADC |
| US20120326902A1 (en) * | 2009-06-26 | 2012-12-27 | Anthony Michael P | Background calibration of offsets in interleaved analog to digital converters |
| CN103746695A (en) * | 2013-12-27 | 2014-04-23 | 电子科技大学 | Mismatch correction method of time-interleaved analog-to-digital converter inter-channel sampling time |
| CN103825612A (en) * | 2014-01-17 | 2014-05-28 | 电子科技大学 | Sampling clock mismatch background correction method based on time-to-digital converter |
| US20170227653A1 (en) * | 2016-02-05 | 2017-08-10 | Thales | Method for calibrating a satellite radio navigation receiver |
| CN106788436B (en) * | 2016-11-09 | 2020-05-22 | 上海芯圣电子股份有限公司 | Voltage coefficient calibration method applied to PIP capacitor array in SARADC |
| CN107302357A (en) * | 2017-05-15 | 2017-10-27 | 中山大学 | A kind of joint bearing calibration of the linear frequency response mismatches of binary channels TIADC and non-linear mismatch |
Non-Patent Citations (2)
| Title |
|---|
| YINAN WANG: "Joint Blind Calibration for Mixed Mismatches in Two-Channel Time-Interleaved ADCs", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS》 * |
| 洪亮: "交替并行模数转换器系统通道的失配误差", 《上海大学学报（自然科学版）》 * |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109361389A (en) * | 2018-09-03 | 2019-02-19 | 北京新岸线移动多媒体技术有限公司 | A kind of timesharing interleaved analog-digital converter multichannel mismatch error calibration method and system |
| CN109361389B (en) * | 2018-09-03 | 2022-09-16 | 北京新岸线移动多媒体技术有限公司 | Time-division alternative analog-to-digital converter multi-channel mismatch error calibration method and system |
| CN110113049A (en) * | 2019-04-12 | 2019-08-09 | 中国人民解放军国防科技大学 | Double-channel TIADC nonlinear mismatch self-adaptive estimation method |
| CN110113049B (en) * | 2019-04-12 | 2022-09-09 | 中国人民解放军国防科技大学 | Double-channel TIADC nonlinear mismatch self-adaptive estimation method |
| CN111988046A (en) * | 2020-08-19 | 2020-11-24 | 中国电子科技集团公司第三十六研究所 | Nonlinear system correction method and device and electronic equipment |
| CN111988046B (en) * | 2020-08-19 | 2021-11-19 | 中国电子科技集团公司第三十六研究所 | Nonlinear system correction method and device and electronic equipment |
| CN113517890A (en) * | 2021-07-21 | 2021-10-19 | 电子科技大学 | Extraction method for sampling time mismatch of time-interleaved ADC (analog to digital converter) |
| CN115941078A (en) * | 2022-10-31 | 2023-04-07 | 西安微电子技术研究所 | Receiver multichannel consistency calibration method based on intermediate frequency processing unit |
| CN115801009A (en) * | 2023-01-30 | 2023-03-14 | 上海芯炽科技集团有限公司 | Method for compensating time offset error of TIADC parallel acquisition system |
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