CN108068980A - The instrument disk control circuit framework of B-PLC Bus systems - Google Patents
The instrument disk control circuit framework of B-PLC Bus systems Download PDFInfo
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- CN108068980A CN108068980A CN201610995351.XA CN201610995351A CN108068980A CN 108068980 A CN108068980 A CN 108068980A CN 201610995351 A CN201610995351 A CN 201610995351A CN 108068980 A CN108068980 A CN 108068980A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
- B60R16/00—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
- B60R16/02—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
- B60R16/023—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements for transmission of signals between vehicle parts or subsystems
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B62—LAND VEHICLES FOR TRAVELLING OTHERWISE THAN ON RAILS
- B62M—RIDER PROPULSION OF WHEELED VEHICLES OR SLEDGES; POWERED PROPULSION OF SLEDGES OR SINGLE-TRACK CYCLES; TRANSMISSIONS SPECIALLY ADAPTED FOR SUCH VEHICLES
- B62M6/00—Rider propulsion of wheeled vehicles with additional source of power, e.g. combustion engine or electric motor
- B62M6/40—Rider propelled cycles with auxiliary electric motor
- B62M6/45—Control or actuating devices therefor
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- Combustion & Propulsion (AREA)
- Mechanical Engineering (AREA)
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Abstract
The present invention provides a kind of instrument disk control circuit framework of B PLC Bus systems, the electric vehicle instrument disk control circuit instrument SOC chip, the instrument SOC chip includes identification number memory module (FLASH ID storages)；The identification number memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle.The present invention has been greatly saved connecting line quantity, simplifies maintenance program, while the generation that electric accessory motor is promoted to seek unity of standard；The electric accessory motor produced using this programme, there is a chip with safe encryption function in the core of each accessory, chip internal has independent ID number, the special equipment only provided by producer could be changed, and effectively contain that the robber of electric accessory motor even vehicle robs behavior by thoroughly breaking off channels of stolen goods disposal.
Description
Technical field
The invention belongs to two-wheeled/three-wheeled electric vehicle field, it is related to a kind of novel electric vehicle electric-control system and its corresponding
Accessory structure.
Background technology
(two-wheeled/three-wheel) product function of electric car has tended to be perfect, and control technology for electric motor car is also progressively ripe.With electricity
The function gradual perfection of motor-car, intelligence step up, still：
1. three big electronic unit of electric car：Connecting line between electric machine speed regulation controller, instrument board, battery is more and more,
Up to ten is a plurality of at present, and length of cable is long, does not there is unified standard so far, and there are the separate standards of oneself in each producer and connect
Line mode, repair and parts exchange to electric car bring very big difficulty, while also result in the wasting of resources and security risk.
2. whole electric vehicle and its electric accessory motor are stolen, situation is serious, and it is after stolen accessory is easily renovated to trace it to its cause
Again sell and obtain sudden huge profits.
The content of the invention
Present applicant proposes the automatically controlled schemes of low cost, can be solved the above problems, are related to system：
Electric car three-wire system carrier wave 1. (B-TRI Bus) bus control system, electric car two-wire system carrier wave bus (B-PLC
Bus) control system；
2. instrument disk control circuit and its SOC chip (model MD80F9234) with safe encryption function
3. the battery controller with safe encryption function and its SOC chip (model MD80F9222)
4. electric machine speed regulation controller and its SOC chip (model MD80F9211) with safe encryption function
5. electric accessory motor identifies encryption system and traceability management system
The electric car assembled with this programme, electric machine speed regulation controller, the on line between instrument board, battery can be reduced to two
Root power cord (i.e. two-wire bus system) B-PLC Bus or two add one with signal wire (three-wire bus system) B-TRI with power cord
Bus has been greatly saved connecting line quantity, simplifies maintenance program, while the generation that electric accessory motor is promoted to seek unity of standard.
Meanwhile the electric accessory motor produced using this programme, the core of each accessory have one there is safety to add
The chip of close function, chip internal have independent ID number, this ID number, by producer's burning, is only provided when dispatching from the factory by producer
Special equipment could change.When dispatching from the factory, each accessory of an electric car is belonged to, possesses identical id number, such as
Vehicle Identify Number is the instrument disk control circuit of 9527 electric car, electric machine speed regulation controller, the ID of the chip inside battery controller
Number is all identical.It cannot be used in the accessory of 9527 vehicle frame difference id numbers above 9527 vehicles.Or second-hand accessory
It returns to genuine or is handled back to special service station.During second-hand accessory repair, provided first by electric car manufacturer special
Programmable device connects accessory by bus, reads accessory encryption ID and is shown as Quick Response Code, cell phone application scans the two dimension on programmable device
Code, and the server of manufacturer is uploaded to, manufacturer personnel after sale know the information of this accessory and sale path first, then exclude to steal and rob
After article, one group of authorization code of cell phone application is handed down to, maintenance station or maintenance personal can rely on what this authorization code was provided using manufacturer
Special programming changes the id number of the accessory, with vehicle match to be repaired.
Car owner just may be notified that in buying car to be robbed in case of stolen and can the information that vehicle is lost be offered manufacturer, if it find that dimension
The corresponding vehicle of accessory ID number repaiied, which occurs to steal, to be robbed, and manufacturer personnel can notify car owner's relevant information as foundation of reporting a case to the security authorities immediately.
It is internal that this chip is rooted in accessory (such as battery etc.), will if chip removed, it is necessary to depth disassembles accessory
The renovation or recycle value for making accessory are slumped.
In this way, it can thoroughly break off the channels of stolen goods disposal that electric car robber robs.
In view of this, present patent application mainly protects the instrument board applied to the B-PLC Bus systems to solve the above problems
Control circuit framework.
Present invention technical solution to be protected is：
The instrument disk control circuit framework of a kind of B-PLC Bus systems, including power supply circuit module, drive amplification mould
Block, buffering filter module, RF interfaces, further include carrier wave termination power and
Instrument SOC chip (preferred, instrument SOC chip uses the SOC chip of model MD80F9234), the instrument
SOC chip includes CPU and is respectively electrically connected with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), display
Control module (DISP.), symmetrical encryption/decryption module (DES.), identification number memory module (FLASH ID storages), wireless key control
Molding block (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The mark
Knowledge memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module is electrically connected respectively with binary phase modulation module (BPSK mod.) and carrier wave termination power；
Buffering filter module is electrically connected respectively with binary phase demodulation module (BPSK Demod.) and carrier wave termination power
It connects；
Carrier wave termination power is also connected with two-wire system bus；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input output mould
Block (GPIO), which is electrically connected, dials gear signal acquisition module, brake signal acquisition module and electronic lock signal acquisition module；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller)；
Further, GPS interface is further included, for being electrically connected GPS module；GPS interface and the general serial mouth mold block
(UART) it is electrically connected；
Description of the drawings
The attached drawing for forming the part of the present invention is used for providing a further understanding of the present invention, schematic reality of the invention
Example and its explanation are applied for explaining the present invention, is not constituted improper limitations of the present invention.In the accompanying drawings：
Fig. 1 is three-wire system bus control system (B-TRI Bus) structure principle chart；
Fig. 2 is the instrument disk control circuit and its SOC chip structural principle of three-wire system bus control system (B-TRI Bus)
Figure；
Fig. 3 is the battery controller and its SOC chip structure principle chart of three-wire system bus control system (B-TRI Bus)；
Fig. 4 is the electric machine speed regulation controller and its SOC chip structural principle of three-wire system bus control system (B-TRI Bus)
Figure；
Fig. 5 is two-wire system bus control system (B-PLC Bus) structure principle chart；
Fig. 6 is two-wire system bus control system (B-PLC Bus) instrument disk control circuit and its structural principle of SOC chip
Figure；
Fig. 7 is the battery controller of two-wire system bus control system (B-PLC Bus) and the structure principle chart of SOC chip；
Fig. 8 is the electric machine speed regulation controller of two-wire system bus control system (B-PLC Bus) and the structural principle of SOC chip
Figure；
Fig. 9 replaces flow chart for electric accessory motor identification encryption and the repair of traceability management system accessory
Specific embodiment
It should be noted that in the case where there is no conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
The scheme of three-wire system is introduced first.
As shown in Figure 1, electric car three-wire system bus control system (B-TRI Bus) structure, including instrument disk control circuit
1st, electric machine speed regulation controller 2 and battery controller 3；
Instrument disk control circuit 1 is electrically connected handle signal acquisition module 7, dials gear signal acquisition module 8, brake signal
Acquisition module 9, electronic lock signal acquisition module 10；
Electric machine speed regulation controller 2 is electrically connected and controls motor 5, and electric machine speed regulation controller 2 is fixed in one with motor 5；
Battery controller 3 is electrically connected battery core 4, and battery controller 3 is fixed in one with battery core 4；
It should be noted that as described herein be fixed in one, such as battery controller 3 and battery core 4, refer to be presented to the user
Be in a component, two components are that be packaged in a shell in vivo, i.e., for a user, are seen
This component of the battery being known as.If two components separated, overall structure, at least shell meeting can be destroyed
It is destroyed, so as to it is apparent recognize the component and be disassembled decomposed.
Instrument disk control circuit 1, electric machine speed regulation controller 2 and 3 three of battery controller are carried out by three-wire system bus
Electrical connection, the three-wire system bus by positive and negative electrode power cord and a signal line group into；
This bus system is primary and secondary structure, and instrument disk control circuit 1 is host, battery controller 3 and electric machine speed regulation control
Device 2 processed is slave；
In bus by bus line command be divided into control and inquiry two kinds, instrument disk control circuit 1 receive from handle, dial
The signal of the signal acquisition modules such as gear, brake, electron key/lock, is converted into bus line command, through three-wire system bus (B-TRI
Bus signal wire) is published to battery controller, electric machine speed regulation controller end；Instrument disk control circuit 1 can send inquiry simultaneously
Order, the signal wire inquiry battery information of battery controller and electric machine speed regulation controller through three-wire system bus (B-TRI Bus)
Working condition and the information such as speed.
Battery controller 3 and electric machine speed regulation controller 2 receive the bus line command from instrument disk control circuit 1, and according to
Various functions response is made in order.Three controllers of system have sleep mode, 3 shapes of Auto-Sensing Mode and operating mode respectively
State：
Sleep mode：When vehicle is closed, battery controller is in sleep mode, and battery controller control battery current limliting is defeated
Go out, maximum 100mA (500mA) electric current.At this moment instrument disk control circuit is also in sleep mode simultaneously with electric machine speed regulation controller.
Certainly, system powers at this time.
Auto-Sensing Mode：When vehicle is opened, instrument disk control circuit receives the unlatching of car key/lock signal acquisition module
Signal immediately enters Auto-Sensing Mode, carries out System self-test, the signal wire issue self-test life through three-wire system bus (B-TRI Bus)
Order, while wake up battery controller and also enter Auto-Sensing Mode with electric machine speed regulation controller.Self-test order by plain code self-test order
Word and plus overstocked id number composition, battery controller and electric machine speed regulation controller ID number is decrypted after receiving, will be decrypted
ID and the ID of itself after return to response message, response message be made of 2 parts, response plain code (matching or mismatch)
With encrypted self-ID information.
If battery controller is transformed into operating mode if it find that ID number matching, cancel current limliting output.If it find that
Oneself ID number mismatches, then is transformed into sleep mode.
Electric machine speed regulation controller is then transformed into operating mode if it find that ID number matching.If it find that oneself ID number is not
Match somebody with somebody, be then transformed into sleep mode, not driving motor.
In view of the application environment of two-wheeled/three-wheeled electric vehicle, bus is exposed, it is easy to is interfered, so this is
System sets bus length to be 2 meters maximum, semiduplex mode, signal modulation mode BPSK, and bus signals communication speed is
100kbps.Carrier frequency point is 4MHz, 0~5V of level value (the positive and negative 5V of level value).
As shown in Fig. 2, in this electric car three-wire system bus control system, this application provides instrument board control electricity
A kind of structure type of the safe encryption function of band on road 1：
Instrument disk control circuit 1 including power supply circuit module, drive amplification module, buffers filter module, RF interfaces,
It further includes
Instrument SOC chip (the instrument SOC chip in the present embodiment uses the SOC chip of model MD80F9234), it is described
Instrument SOC chip includes CPU and is respectively electrically connected with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), display
Control module (DISP.), symmetrical encryption/decryption module (DES.), identification number memory module (FLASH ID storages), wireless key control
Molding block (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The mark
Knowledge memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module respectively with binary phase modulation module (BPSK mod.) and three-wire system bus (B-TRI
Bus signal wire electrical connection)；
Buffer filter module respectively with binary phase demodulation module (BPSK Demod.) and three-wire system bus (B-TRI
Bus signal wire electrical connection)；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input output mould
Block (GPIO), which is electrically connected, dials gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller)；
Further, GPS interface is further included, for being electrically connected GPS module；GPS interface and the general serial mouth mold block
(UART) it is electrically connected；
Sleep mode：When electronic lock closing or RF car keies (wireless key) signal-off, instrument disk control circuit 1 is in
Sleep mode.
Auto-Sensing Mode：Electronic lock switch or car key signalling can wake up instrument board control circuit 1, and make instrument board control
Circuit 1 processed is in Auto-Sensing Mode.
System self-test process：The CPU of instrument SOC chip reads storage from identification number memory module (FLASH ID storages)
Unique id number corresponding with vehicle, be then encrypted by DES algoritic modules, encrypted data plus self-test order
Order by the forward error correction coding/decoding module (FEC) of electric car carrier wave bus control module (B-PLC BUS Controller) into
Row forward error correction coding is modulated using binary phase modulation module (BPSK mod.), by modulated signal output instrument
SOC chip is sent to the signal wire of three-wire system bus (B-TRI Bus) by the drive amplification module of instrument disk control circuit 1
On.
The battery controller or electric machine speed regulation controller of the bus other end are received after self-test order through three-wire system bus
The signal wire of (B-TRI Bus) beams back answer signal.Answer signal is sent back to instrument disk control circuit 1 by buffering filter module
Into the binary phase demodulation module (BPSK Demod.) of instrument SOC chip, it is demodulated after signal entangled using forward direction
Decoder module (FEC) error correction decoding of miscoding is reduced into reply data and the ID number encryption information of other side, and ID number encryption information passes through
Id number is obtained after symmetrical encryption/decryption module (DES.) decryption, CPU passes through the verification to reply data and the comparison to id number
To be confirmed whether self-test success.
Operating mode：
If CPU confirms self-test success, instrument disk control circuit 1 initially enters normal mode of operation.Instrument SOC chip
Detect the variation of handle signal acquisition module resistance, universal input and output module in real time using analog-digital converter module (ADC)
(GPIO) shape of gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10 is dialled in monitoring in real time
State.These data are sent to CPU processing.Car key signal enters wireless key control module by RF interfaces simultaneously
In (RF KEY Controller), car key signal is also directed to handle in CPU.If being circumscribed with GPS module simultaneously, lead to
The general serial mouth mold block (UART) crossed on chip carries out the reading of GPS coordinate information, and is stored in FLASH, forms driving
Track.CPU, to control command is formed, passes through electric car carrier wave bus control module (B-PLC BUS according to these state transformations
Controller forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation module (BPSK)
Mod. the drive amplification module being sent to after) modulating on instrument disk control circuit 1 is sent to three-wire system bus (B-TRI Bus)
On signal wire.
The timer TIMER that instrument disk control circuit 1 is carried by instrument SOC chip is timed, and periodically passes through three lines
The signal wire issued state querying command of bus (B-TRI Bus) processed, battery controller 3 can be by states such as remaining capacities after receiving
Information is beamed back by the signal wire of bus (B-TRI Bus)；Electric machine speed regulation controller 2 can lead to the status informations such as speed after receiving
The signal wire for crossing bus (B-TRI Bus) is beamed back.These status signals are sent back to by bus on 1 mainboard of instrument disk control circuit
The binary phase demodulation module (BPSK Demod.) for entering chip by buffering filter module is demodulated, after demodulated
Signal be reduced into reply data using forward error correction coding/decoding module (FEC) error correction decoding, after CPU handles reply data
It is output on instrument board and shown by display control module (DISP.).
As shown in figure 3, in this electric car three-wire system bus control system, this application provides the battery controllers 3
A kind of safe encryption function of band structure type：
Battery controller 3, including power supply circuit, relay, thermo-sensitive resistor, constantan-made resistances, metal-oxide-semiconductor, drive amplification electricity
Road and buffering filter circuit；
Further include battery management SOC chip, the battery management SOC chip in the present embodiment uses model MD80F9222
SOC chip, the battery management SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical
Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and impulse wave
Shape generator (PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle unique
Id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of battery management SOC chip (BPSK mod.) and control
The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside device processed；
Buffer filter module outside SOC chip, respectively with the binary phase demodulation module of battery management SOC chip
The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside (BPSK Demod.) and controller；
Thermo-sensitive resistor is electrically connected with the analog-digital converter module (ADC) in SOC chip；
For connecting battery battery core anode, the other end of constantan-made resistances is electrically connected relay for one end of constantan-made resistances
Input terminal, the input terminal of mos pipes, the analog-digital converter module (ADC) of power supply circuit and battery management SOC chip；
The output terminal of relay is electrically connected with the output terminal of metal-oxide-semiconductor on the power cord of three-wire system bus (B-TRI Bus)；
The control terminal of relay is connected in the universal input and output module (GPIO) of battery management SOC chip；
The control terminal of metal-oxide-semiconductor is connected on the pulse-pattern generator (PWM) of battery management SOC chip.
Sleep mode：When not receiving the self-test order that bus is sent, battery controller is in sleep mode.Power supply pipe at this time
SOC chip control cut-off is managed, while controls metal-oxide-semiconductor output current maximum 100mA (500mA)
Auto-Sensing Mode：Self-test command signal from instrument disk control circuit 1 makes battery controller be in Auto-Sensing Mode.
Self-test command signal from instrument disk control circuit 1 is sent out by the signal wire of three-wire system bus (B-TRI Bus)
To battery controller, the binary phase demodulation module (BPSK into power management SOC chip is filtered by buffering
Demod.), signal after demodulated using forward error correction coding/decoding module (FEC) error correction decoding be reduced into order data and
The ID number encryption information of other side, ID number encryption information obtain id number, power supply after being decrypted by symmetrical encryption/decryption module (DES.)
The CPU of management SOC reads the id number of oneself, and is confirmed whether by the verification to order data and to the comparison of id number
Self-test success.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself
Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself
Id information.Process is as follows：
The CPU of power management SOC chip reads oneself of storage from identification number memory module (FLASH ID storages)
Then unique id number corresponding with whole electric vehicle is encrypted by symmetrical encryption/decryption module (DES.), encrypted
Data are compiled plus acknowledgement command by the forward error correction of electric car carrier wave bus control module (B-PLC BUS Controller)
Decoder module (FEC) carries out forward error correction coding, modulates, will modulate using binary phase modulation module (BPSK mod.)
Signal output chip afterwards is sent to the letter of three-wire system bus (B-TRI Bus) by the drive amplification circuit of battery controller
On number line.
Operating mode：
If the CPU of power management SOC confirms self-test success, battery controller initially enters normal mode of operation.Electricity
The CPU of source control SOC closes metal-oxide-semiconductor by pulse-pattern generator (PWM) and is opened simultaneously with universal input and output module (GPIO)
It opens relay and normally powers for vehicle.The CPU of power management SOC detects temperature sensitive electricity in real time using analog-digital converter module (ADC)
The temperature of battery is noted down in the variation of resistance.Simultaneously using analog-digital converter module (ADC) to the sampling monitoring current value of constantan-made resistances
And voltage value, record and the electricity for calculating battery.By these data recordings inside FLASH.Instrument disk control circuit passes through total
Line B-TRI Bus issued state querying commands are dealt into the binary system phase that battery controller enters chip by buffering filter module
Position demodulation module (BPSK Demod.), it is demodulated after signal using forward error correction coding/decoding module (FEC) error correction decoding
Command message is reduced into, the CPU of power management SOC chooses such as battery current, battery temperature according to command message from FLASH
Etc. status informations, formed state response message, then pass through electric car carrier wave bus control module (B-PLC
BUSController forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation module (BPSK)
Mod. after) modulating, it is sent to after the amplification of drive amplification circuit on the signal wire of three-wire system bus (B-TRI Bus).
As shown in figure 4, in this electric car three-wire system bus control system, this application provides electric machine speed regulation controls
A kind of structure type of the safe encryption function of band of device 2：
Electric machine speed regulation controller 2, including power supply circuit, MOS arrays, drive amplification circuit, buffering filter circuit；
Further include electric machine speed regulation SOC chip, the electric machine speed regulation SOC chip in the present embodiment uses model MD80F9211
SOC chip, the electric machine speed regulation SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical
Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and multichannel arteries and veins
Rush waveform generator (multi-channel PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle
Unique id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of electric machine speed regulation SOC chip (BPSK mod.) and control
The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside device processed；
Buffer filter module outside electric machine speed regulation SOC chip, respectively with the binary phase solution of electric machine speed regulation SOC chip
The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside mode transfer block (BPSK Demod.) and controller；
Multiplex pulse waveform generator (multi-channel PWM) is electrically connected with the control terminal of MOS arrays；
Hall sensor is electrically connected with the analog-digital converter module (ADC) inside electric machine speed regulation SOC chip；
Wheel hub motor is electrically connected with the output terminal of MOS arrays；
Power supply circuit is connected with the power cord of three-wire system bus (B-TRI Bus).
Sleep mode：When not receiving the self-test order that bus is sent, electric machine speed regulation controller is in sleep mode.It is electric at this time
Machine speed governing SOC chip control MOS arrays are closed.
Auto-Sensing Mode：Self-test command signal from instrument disk control circuit makes electric machine speed regulation controller be in self-test mould
Formula.
Self-test command signal from instrument disk control circuit is dealt into electric machine speed regulation control by bus (B-TRI Bus)
Device enters the binary phase demodulation module (BPSK DEMOD.) of electric machine speed regulation SOC chip by buffering filter circuit, passes through
The ID number that signal after demodulation is reduced into order data and other side using forward error correction coding/decoding module (FEC) error correction decoding adds
Confidential information, ID number encryption information obtain id number after being decrypted by DES modules, and the CPU of electric machine speed regulation SOC chip reads oneself
Id number, and with verification of the team to order data and the comparison to id number come be confirmed whether self-test success.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself
Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself
Id information.Process is as follows, and the CPU of electric machine speed regulation SOC chip reads the id number of oneself of storage from FLASH, then passes through
Symmetrical encryption/decryption module (DES.) is encrypted, and encrypted data pass through electric car carrier wave bus marco mould plus acknowledgement command
The forward error correction coding/decoding module (FEC) of block (B-PLC BUS Controller) carries out forward error correction coding, by BPSK
Modulation, by modulated signal output chip, bus is sent to by the drive amplification circuit on electric machine speed regulation controller mainboard
On the signal wire of B-TRI Bus.
Operating mode：
If the CPU of electric machine speed regulation SOC chip confirms self-test success, electric machine speed regulation controller initially enters normal work
Pattern.Instrument disk control circuit is dealt into the process of electric machine speed regulation controller by bus B-TRI Bus issued state querying commands
Buffering filter circuit enters the binary phase demodulation module (BPSK DEMOD.) of chip, it is demodulated after signal using
Forward error correction coding/decoding module (FEC) error correction decoding is reduced into command message, and the CPU of electric machine speed regulation SOC chip is ordered according to these
Order control PWM module generates different control signals, controls MOS arrays on electric machine speed regulation controller mainboard, and then controls wheel hub
The speed of motor.The analog-digital converter module (ADC) of electric machine speed regulation SOC chip gathers Hall sensor or wheel hub motor three in real time
The electric current of phase, CPU carry out PID control (proportional integral derivative control).If the electric machine speed regulation control of command message requirement inquiry
The CPU formation state response messages of the status information of device, such as electronic vehicle speed etc., then electric machine speed regulation SOC chip, then pass through
Forward error correction coding/decoding module (FEC) forward error correction of electric car carrier wave bus control module (B-PLC BUS Controller)
The drive amplification circuit of electric machine speed regulation controller is sent to after coding and binary phase modulation module (BPSK mod.) modulation
It is sent on bus B-TRI Bus.
Next two-wire system scheme, i.e. electric car two-wire system carrier wave bus (B-PLC Bus) control system are introduced；
As shown in figure 5, electric car two-wire system carrier wave bus (B-PLC Bus) Control system architecture, controls including instrument board
Circuit 1, electric machine speed regulation controller 2 and battery controller 3；
Instrument disk control circuit 1 is electrically connected handle signal acquisition module 7, dials gear signal acquisition module 8, brake signal
Acquisition module 9, electronic lock signal acquisition module 10；
Electric machine speed regulation controller 2 is electrically connected and controls motor 5, and electric machine speed regulation controller 2 is fixed in one with motor 5；
Battery controller 3 is electrically connected battery core 4, and battery controller 3 is fixed in one with battery core 4；
Instrument disk control circuit 1, electric machine speed regulation controller 2 and 3 three of battery controller are carried out by two-wire system bus
Electrical connection, the two-wire system bus by positive and negative electrode source line group into；
This bus system is primary and secondary structure, and instrument disk control circuit 1 is host, battery controller 3 and electric machine speed regulation control
Device 2 processed is slave；
In bus by bus line command be divided into control and inquiry two kinds, instrument disk control circuit 1 receive from handle, dial
The signal of the signal acquisition modules such as gear, brake, electron key/lock, is converted into bus line command, through two-wire system bus (B-PLC
Bus battery controller, electric machine speed regulation controller end) are published to by carrier wave；Instrument disk control circuit 1 can send inquiry simultaneously
Order inquires about the battery information of battery controller and electric machine speed regulation controller through two-wire system bus (B-PLC Bus) by carrier wave
Working condition and the information such as speed.
Battery controller 3 and electric machine speed regulation controller 2 receive the bus line command from instrument disk control circuit 1, and according to
Various functions response is made in order.Three controllers of system have sleep mode, 3 shapes of Auto-Sensing Mode and operating mode respectively
State：
Sleep mode：When vehicle is closed, battery controller is in sleep mode, and battery controller control battery current limliting is defeated
Go out, maximum 100mA (500mA) electric current.At this moment instrument disk control circuit is also in sleep mode simultaneously with electric machine speed regulation controller.
Certainly, system powers at this time.
Auto-Sensing Mode：When vehicle is opened, instrument disk control circuit receives the unlatching of car key/lock signal acquisition module
Signal immediately enters Auto-Sensing Mode, carries out System self-test, issues self-test by carrier wave through two-wire system bus (B-PLC Bus) and orders
Order, while wake up battery controller and also enter Auto-Sensing Mode with electric machine speed regulation controller.Self-test order by plain code self-test order
Word and plus overstocked id number composition, battery controller and electric machine speed regulation controller ID number is decrypted after receiving, will be decrypted
ID and the ID of itself after return to response message, response message be made of 2 parts, response plain code (matching or mismatch)
With encrypted self-ID information.
If battery controller is transformed into operating mode if it find that ID number matching, cancel current limliting output.If it find that
Oneself ID number mismatches, then is transformed into sleep mode.
Electric machine speed regulation controller is then transformed into operating mode if it find that ID number matching.If it find that oneself ID number is not
Match somebody with somebody, be then transformed into sleep mode, not driving motor.
In view of the application environment of two-wheeled/three-wheeled electric vehicle, bus is exposed, it is easy to is interfered, so this is
System sets bus length to be 2 meters maximum, semiduplex mode, signal modulation mode BPSK, and bus signals communication speed is
100kbps.Carrier frequency point is 4MHz, 0~5V of level value (the positive and negative 5V of level value).
As shown in fig. 6, in this electric car two-wire system carrier wave bus control system, this application provides the instrument board controls
A kind of structure type of the safe encryption function of band of circuit 1 processed：
Instrument disk control circuit 1 including power supply circuit module, drive amplification module, buffers filter module, RF interfaces,
Further include carrier wave termination power and
Instrument SOC chip (the instrument SOC chip in the present embodiment uses the SOC chip of model MD80F9234), it is described
Instrument SOC chip includes CPU and is respectively electrically connected with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), display
Control module (DISP.), symmetrical encryption/decryption module (DES.), identification number memory module (FLASH ID storages), wireless key control
Molding block (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The mark
Knowledge memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module is electrically connected respectively with binary phase modulation module (BPSK mod.) and carrier wave termination power；
Buffering filter module is electrically connected respectively with binary phase demodulation module (BPSK Demod.) and carrier wave termination power
It connects；
Carrier wave termination power is also connected with two-wire system bus；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input output mould
Block (GPIO), which is electrically connected, dials gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller)；
Further, GPS interface is further included, for being electrically connected GPS module；GPS interface and the general serial mouth mold block
(UART) it is electrically connected；
Sleep mode：When electronic lock closing or RF car keies (wireless key) signal-off, instrument disk control circuit 1 is in
Sleep mode.
Auto-Sensing Mode：Electronic lock switch or car key signalling can wake up instrument board control circuit 1, and make instrument board control
Circuit 1 processed is in Auto-Sensing Mode.
System self-test process：The CPU of instrument SOC chip reads storage from identification number memory module (FLASH ID storages)
Unique id number corresponding with vehicle, be then encrypted by DES algoritic modules, encrypted data plus self-test order
Order by the forward error correction coding/decoding module (FEC) of electric car carrier wave bus control module (B-PLC BUS Controller) into
Row forward error correction coding is modulated using binary phase modulation module (BPSK mod.), by modulated signal output instrument
SOC chip is mixed into carrier wave termination power by the drive amplification module of instrument disk control circuit 1 and is sent to two-wire system bus
On (B-PLC Bus).
The battery controller or electric machine speed regulation controller of the bus other end are received after self-test order through two-wire system bus
(B-PLC Bus) beams back answer signal.Answer signal is sent back to carrier wave termination power on instrument disk control circuit 1 using slow
Rush the binary phase demodulation module (BPSK Demod.) that filter module enters instrument SOC chip, it is demodulated after signal again
Reply data and the ID number encryption information of other side are reduced by forward error correction coding/decoding module (FEC) error correction decoding, ID number adds
Confidential information obtains id number after being decrypted by symmetrical encryption/decryption module (DES.), CPU passes through to the verification of reply data and to ID
The comparison of number come be confirmed whether self-test success.
Operating mode：
If CPU confirms self-test success, instrument disk control circuit 1 initially enters normal mode of operation.Instrument SOC chip
Detect the variation of handle signal acquisition module resistance, universal input and output module in real time using analog-digital converter module (ADC)
(GPIO) shape of gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10 is dialled in monitoring in real time
State.These data are sent to CPU processing.Car key signal enters wireless key control module by RF interfaces simultaneously
In (RF KEY Controller), car key signal is also directed to handle in CPU.If being circumscribed with GPS module simultaneously, lead to
The general serial mouth mold block (UART) crossed on chip carries out the reading of GPS coordinate information, and is stored in FLASH, forms driving
Track.CPU, to control command is formed, passes through electric car carrier wave bus control module (B-PLC BUS according to these state transformations
Controller forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation module (BPSK)
Mod. the drive amplification module being sent to after) modulating on instrument disk control circuit 1 is mixed into carrier wave termination power and is sent to two lines
On bus (B-PLC Bus) processed.
The timer TIMER that instrument disk control circuit 1 is carried by instrument SOC chip is timed, and periodically passes through two lines
Bus (B-PLC Bus) issued state querying command processed, battery controller 3 can pass through the status informations such as remaining capacity after receiving
Bus (B-PLC Bus) is beamed back；The status informations such as speed can be passed through bus (B-PLC by electric machine speed regulation controller 2 after receiving
Bus) beam back.These status signals by bus be sent back to carrier wave termination power on 1 mainboard of instrument disk control circuit using
Buffering filter module enters the binary phase demodulation module (BPSK Demod.) of chip and is demodulated, it is demodulated after letter
Number reply data is reduced into using forward error correction coding/decoding module (FEC) error correction decoding, CPU passes through after reply data is handled
Display control module (DISP.), which is output on instrument board, to be shown.
As shown in fig. 7, in this electric car two-wire system carrier wave bus control system, this application provides battery controls
A kind of structure type of the safe encryption function of band of device 3：
Battery controller 3, including power supply circuit, relay, thermo-sensitive resistor, constantan-made resistances, metal-oxide-semiconductor, carrier wave coupling electricity
Road, drive amplification circuit and buffering filter circuit；
Further include battery management SOC chip, the battery management SOC chip in the present embodiment uses model MD80F9222
SOC chip, the battery management SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical
Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and impulse wave
Shape generator (PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle unique
Id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of battery management SOC chip (BPSK mod.) and carry
Ripple termination power is electrically connected；
Buffer filter module outside SOC chip, respectively with the binary phase demodulation module of battery management SOC chip
(BPSK Demod.) and carrier wave termination power are electrically connected；
Thermo-sensitive resistor is electrically connected with the analog-digital converter module (ADC) in SOC chip；
For connecting battery battery core anode, the other end of constantan-made resistances is electrically connected relay for one end of constantan-made resistances
Input terminal, the input terminal of mos pipes, the analog-digital converter module (ADC) of power supply circuit and battery management SOC chip；
The output terminal of relay is electrically connected carrier wave termination power with the output terminal of metal-oxide-semiconductor；
Carrier wave termination power is also connected with two-wire system bus (B-PLC Bus)；
The control terminal of relay is connected in the universal input and output module (GPIO) of battery management SOC chip；
The control terminal of metal-oxide-semiconductor is connected on the pulse-pattern generator (PWM) of battery management SOC chip.
Sleep mode：When not receiving the self-test order that bus is sent, battery controller is in sleep mode.Power supply pipe at this time
SOC chip control cut-off is managed, while controls metal-oxide-semiconductor output current maximum 100mA (500mA)
Auto-Sensing Mode：Self-test command signal from instrument disk control circuit 1 makes battery controller be in Auto-Sensing Mode.
Self-test command signal from instrument disk control circuit 1 is dealt into battery control by two-wire system bus (B-PLC Bus)
In the carrier wave termination power of device processed, the binary phase demodulation module of power management SOC chip is entered using buffering filtering
(BPSK Demod.), it is demodulated after signal be reduced into order using forward error correction coding/decoding module (FEC) error correction decoding
Data and the ID number encryption information of other side, ID number encryption information obtain ID number after being decrypted by symmetrical encryption/decryption module (DES.)
Code, the CPU of power management SOC read the id number of oneself, and by the verification to order data and to the comparison of id number come
It is confirmed whether self-test success.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself
Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself
Id information.Process is as follows：
The CPU of power management SOC chip reads oneself of storage from identification number memory module (FLASH ID storages)
Then unique id number corresponding with whole electric vehicle is encrypted by symmetrical encryption/decryption module (DES.), encrypted
Data are compiled plus acknowledgement command by the forward error correction of electric car carrier wave bus control module (B-PLC BUS Controller)
Decoder module (FEC) carries out forward error correction coding, modulates, will modulate using binary phase modulation module (BPSK mod.)
Signal output chip afterwards, being mixed into carrier wave termination power by the drive amplification circuit of battery controller, to be sent to two-wire system total
On line (B-PLC Bus).
Operating mode：
If the CPU of power management SOC confirms self-test success, battery controller initially enters normal mode of operation.Electricity
The CPU of source control SOC closes metal-oxide-semiconductor by pulse-pattern generator (PWM) and is opened simultaneously with universal input and output module (GPIO)
It opens relay and normally powers for vehicle.The CPU of power management SOC detects temperature sensitive electricity in real time using analog-digital converter module (ADC)
The temperature of battery is noted down in the variation of resistance.Simultaneously using analog-digital converter module (ADC) to the sampling monitoring current value of constantan-made resistances
And voltage value, record and the electricity for calculating battery.By these data recordings inside FLASH.Instrument disk control circuit passes through total
Line (B-PLC Bus) issued state querying command is dealt into the carrier wave termination power of battery controller and filters mould using buffering
Block enters the binary phase demodulation module (BPSK Demod.) of chip, it is demodulated after signal compiled using forward error correction
Decoder module (FEC) error correction decoding is reduced into command message, and the CPU of power management SOC chooses according to command message from FLASH
Such as the status informations such as battery current, battery temperature, state response message is formed, then passes through electric car carrier wave bus marco mould
Forward error correction coding/decoding module (FEC) forward error correction coding and binary phase tune of block (B-PLC BUS Controller)
After molding block (BPSK mod.) modulation, it is sent to after the amplification of drive amplification circuit in two-wire system bus (B-PLC Bus).
As shown in figure 8, in this electric car two-wire system carrier wave bus control system, this application provides the electric machine speed regulations
A kind of structure type of the safe encryption function of band of controller：
Electric machine speed regulation controller, including power supply circuit, MOS arrays, drive amplification circuit, buffering filter circuit and carrier wave
Termination power；
Further include electric machine speed regulation SOC chip, the electric machine speed regulation SOC chip in the present embodiment uses model MD80F9211
SOC chip, the electric machine speed regulation SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical
Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and multichannel arteries and veins
Rush waveform generator (multi-channel PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle
Unique id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould
Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles
Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK
Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of electric machine speed regulation SOC chip (BPSK mod.) and carry
Ripple termination power is electrically connected；
Buffer filter module outside electric machine speed regulation SOC chip, respectively with the binary phase solution of electric machine speed regulation SOC chip
Mode transfer block (BPSK Demod.) and the electrical connection of carrier wave termination power；
Multiplex pulse waveform generator (multi-channel PWM) is electrically connected with the control terminal of MOS arrays；
Hall sensor is electrically connected with the analog-digital converter module (ADC) inside electric machine speed regulation SOC chip；
Wheel hub motor is electrically connected with the output terminal of MOS arrays；
Power supply circuit is electrically connected with carrier wave termination power；
Carrier wave termination power is connected again with two-wire system bus (B-PLC Bus).
Sleep mode：When not receiving the self-test order that bus is sent, electric machine speed regulation controller is in sleep mode.It is electric at this time
Machine speed governing SOC chip control MOS arrays are closed.
Auto-Sensing Mode：Self-test command signal from instrument disk control circuit makes electric machine speed regulation controller be in self-test mould
Formula.
Self-test command signal from instrument disk control circuit is dealt into electric machine speed regulation controller by bus (B-PLC Bus)
Carrier wave termination power, enter the binary phase demodulation module (BPSK of electric machine speed regulation SOC chip using buffering filter circuit
DEMOD.), signal after demodulated using forward error correction coding/decoding module (FEC) error correction decoding be reduced into order data and
The ID number encryption information of other side, ID number encryption information obtain id number after being decrypted by DES modules, electric machine speed regulation SOC chip
CPU reads the id number of oneself, and is confirmed whether self-test success with verification of the team to order data and the comparison to id number.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself
Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself
Id information.Process is as follows, and the CPU of electric machine speed regulation SOC chip reads the id number of oneself of storage from FLASH, then passes through
Symmetrical encryption/decryption module (DES.) is encrypted, and encrypted data pass through electric car carrier wave bus marco mould plus acknowledgement command
The forward error correction coding/decoding module (FEC) of block (B-PLC BUS Controller) carries out forward error correction coding, by BPSK
Modulation, by modulated signal output chip, carrier wave is mixed by the drive amplification circuit on electric machine speed regulation controller mainboard
Termination power is sent in bus (B-PLC Bus).
Operating mode：
If the CPU of electric machine speed regulation SOC chip confirms self-test success, electric machine speed regulation controller initially enters normal work
Pattern.Instrument disk control circuit is dealt into the load of electric machine speed regulation controller by bus (B-PLC Bus) issued state querying command
Ripple termination power enters the binary phase demodulation module (BPSK DEMOD.) of chip using buffering filter circuit, by solution
Signal after tune is reduced into command message, electric machine speed regulation SOC chip using forward error correction coding/decoding module (FEC) error correction decoding
CPU generate different control signal according to these order control PWM modules, control on electric machine speed regulation controller mainboard MOS times
Row, and then control the speed of wheel hub motor.Acquisition Hall passes the analog-digital converter module (ADC) of electric machine speed regulation SOC chip in real time
The electric current of sensor or wheel hub motor three-phase, CPU carry out PID control (proportional integral derivative control).If command message requirement is looked into
The CPU formation states of the status information of the electric machine speed regulation controller of inquiry, such as electronic vehicle speed etc., then electric machine speed regulation SOC chip
Then response message passes through the forward error correction encoding and decoding of electric car carrier wave bus control module (B-PLC BUS Controller)
Electric machine speed regulation control is sent to after module (FEC) forward error correction coding and binary phase modulation module (BPSK mod.) modulation
The drive amplification circuit of device is mixed into carrier wave termination power, re-sends in bus (B-PLC Bus).
In addition, as shown in figure 9, present invention also provides a kind of electric accessory motor identification encryption and traceability management systems：
Due to the system electric car, instrument disk control circuit, battery controller and electric machine speed regulation controller and vehicle frame ID number
(unique id number i.e. corresponding with whole electric vehicle) must be one-to-one, and it is also that can not make that the accessory of other vehicles, which is changed,
, so repair and accessory, which exchange, can become the problem of new.It traces to the source pipe so being specifically designed set accessory identification encryption equipment
Reason system.
The system is formed by with lower part：
The management information server 1. vehicle accessory is traced to the source
The managing mobile phone APP softwares 2. vehicle accessory is traced to the source
3. encrypt accessory Special programming
Operation principle：
For example the battery of electric vehicle that Vehicle Identify Number is 9527 is broken, it is necessary to replace, maintenace point has 2 kinds of schemes at present, and one is
The genuine battery more renewed, the other is the battery of the good other vehicle damage of repair and replacement.Passed through first with Special programming
B-TRI Bus or B-PLC Bus are connected on the battery for wishing to replace, and Special programming is by reading inside battery encryption chip
Encrypted id number, and generate Quick Response Code on the screen, the vehicle accessory that then maintenance mans are opened on mobile phone is traced to the source management
APP inputs carriage frame number to be repaired, and scans the two-dimensional code and upload to the vehicle accessory of manufacturer and trace to the source in management server, service
Device can complete two work automatically, be the source of this accessory of certification first, if had criminal record.If any reporting a case to the security authorities, record then notifies vehicle
It is main.If source is normal, the mapping for establishing new id number and Vehicle Identify Number in the database connects.And generate new id number
Authorization code is generated, is sent back to automatically in cell phone application, authorization code is input in Special programming by maintenance personal again, starts programming,
New id number is write, completes accessory matching.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
With within principle, any modifications, equivalent replacements and improvements are made should all be included in the protection scope of the present invention god.
Claims (9)
- The instrument disk control circuit framework of 1.B-PLC Bus systems, it is characterised in that：The electric vehicle instrument disk control circuit bag Include power supply circuit module, drive amplification module, buffering filter module, RF interfaces, further include carrier wave termination power andInstrument SOC chip, the instrument SOC chip include CPU and the electric car carrier wave bus control being electrically connected respectively with CPU Molding block (B-PLC BUS Controller), analog-digital converter module (ADC), display control module (DISP.), symmetrical plus solution Close module (DES.), identification number memory module (FLASH ID storages), wireless key control module (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The identification number memory module (FLASHID storages) is stored with unique id number corresponding with vehicle.
- 2. the instrument disk control circuit framework of B-PLC Bus systems according to claim 1, it is characterised in that：The electricity Motor-car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction coding/decoding module (FEC), binary system Phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward error correction coding/decoding module (FEC) it is electrically connected respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) It connects.
- 3. the instrument disk control circuit framework of B-PLC Bus systems according to claim 1, it is characterised in that：Driving is put Big module is electrically connected respectively with binary phase modulation module (BPSK mod.) and carrier wave termination power；Buffering filter module is electrically connected respectively with binary phase demodulation module (BPSK Demod.) and carrier wave termination power.
- 4. the instrument disk control circuit framework of B-PLC Bus systems according to claim 3, it is characterised in that：Carrier wave coupling Circuit is closed also to be connected with two-wire system bus.
- 5. the instrument disk control circuit framework of B-PLC Bus systems according to claim 1, it is characterised in that：Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of the instrument SOC chip, universal input output mould Block (GPIO), which is electrically connected, dials gear signal acquisition module, brake signal acquisition module and electronic lock signal acquisition module.
- 6. the instrument disk control circuit framework of B-PLC Bus systems according to claim 1, it is characterised in that：The RF Interface is electrically connected with wireless key control module (RF KEY Controller).
- 7. the instrument disk control circuit framework of B-PLC Bus systems according to claim 1, it is characterised in that：GPS interface is further included, for being electrically connected GPS module；GPS interface is electrically connected with the general serial mouth mold block (UART).
- 8. the instrument disk control circuit framework of B-PLC Bus systems according to claim 1, it is characterised in that：The instrument Table SOC chip uses the SOC chip of model MD80F9234.
- 9. a kind of electric car, using the instrument disk control circuit of the B-PLC Bus systems as described in claim 1-8 any one Framework.
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| TWI779685B (en) * | 2021-06-24 | 2022-10-01 | 光陽工業股份有限公司 | control system of electric locomotive |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI779685B (en) * | 2021-06-24 | 2022-10-01 | 光陽工業股份有限公司 | control system of electric locomotive |
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