CN108068975A - B-TRI Bus control structures - Google Patents

B-TRI Bus control structures Download PDF

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Publication number
CN108068975A
CN108068975A CN201610994743.4A CN201610994743A CN108068975A CN 108068975 A CN108068975 A CN 108068975A CN 201610994743 A CN201610994743 A CN 201610994743A CN 108068975 A CN108068975 A CN 108068975A
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China
Prior art keywords
module
controller
bus
soc chip
electrically connected
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CN201610994743.4A
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Chinese (zh)
Inventor
甯稿姜
常彪
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TIANJIN YIHUA MICROELECTRONICS CO Ltd
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TIANJIN YIHUA MICROELECTRONICS CO Ltd
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Priority to CN201610994743.4A priority Critical patent/CN108068975A/en
Publication of CN108068975A publication Critical patent/CN108068975A/en
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
    • B60R16/00—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
    • B60R16/02—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
    • B60R16/0207—Wire harnesses
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B62—LAND VEHICLES FOR TRAVELLING OTHERWISE THAN ON RAILS
    • B62M—RIDER PROPULSION OF WHEELED VEHICLES OR SLEDGES; POWERED PROPULSION OF SLEDGES OR SINGLE-TRACK CYCLES; TRANSMISSIONS SPECIALLY ADAPTED FOR SUCH VEHICLES
    • B62M6/00—Rider propulsion of wheeled vehicles with additional source of power, e.g. combustion engine or electric motor
    • B62M6/40—Rider propelled cycles with auxiliary electric motor
    • B62M6/45—Control or actuating devices therefor

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Transportation (AREA)
  • Electric Propulsion And Braking For Vehicles (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Abstract

The present invention provides a kind of B TRI Bus control structures, including instrument disk controller, electric machine speed regulation controller and battery controller；Instrument disk controller, electric machine speed regulation controller and battery controller three are electrically connected by three-wire system bus, the three-wire system bus by positive and negative electrode power cord and a signal line group into；And the identification number memory module of the SOC chip of three is stored with unique id number corresponding with vehicle.The present invention has been greatly saved connecting line quantity, simplifies maintenance program, while the generation that electric accessory motor is promoted to seek unity of standard；The electric accessory motor produced using this programme, there is a chip with safe encryption function in the core of each accessory, chip internal has independent ID number, this ID number is when dispatching from the factory by producer's burning, the special equipment only provided by producer could be changed, and effectively contain that the robber of electric accessory motor even vehicle robs behavior by thoroughly breaking off channels of stolen goods disposal.

Description

B-TRI Bus control structures
Technical field
The invention belongs to two-wheeled/three-wheeled electric vehicle field, it is related to a kind of novel electric vehicle electric-control system and its corresponding Accessory structure.
Background technology
(two-wheeled/three-wheel) product function of electric car has tended to be perfect, and control technology for electric motor car is also progressively ripe.With electricity The function gradual perfection of motor-car, intelligence step up, still：
1. three big electronic unit of electric car：Connecting line between electric machine speed regulation controller, instrument board, battery is more and more, Up to ten is a plurality of at present, and length of cable is long, does not there is unified standard so far, and there are the separate standards of oneself in each producer and connect Line mode, repair and parts exchange to electric car bring very big difficulty, while also result in the wasting of resources and security risk.
2. whole electric vehicle and its electric accessory motor are stolen, situation is serious, and it is after stolen accessory is easily renovated to trace it to its cause Again sell and obtain sudden huge profits.
The content of the invention
Present applicant proposes the automatically controlled schemes of low cost, can be solved the above problems, are related to system：
Electric car three-wire system carrier wave 1. (B-TRI Bus) bus control system, electric car two-wire system carrier wave bus (B-PLC Bus) control system；
2. instrument disk controller and its SOC chip (model MD80F9234) with safe encryption function
3. the battery controller with safe encryption function and its SOC chip (model MD80F9222)
4. electric machine speed regulation controller and its SOC chip (model MD80F9211) with safe encryption function
5. electric accessory motor identifies encryption system and traceability management system
The electric car assembled with this programme, electric machine speed regulation controller, the on line between instrument board, battery can be reduced to two Root power cord (i.e. two-wire bus system) B-PLC Bus or two add one with signal wire (three-wire bus system) B-TRI with power cord Bus has been greatly saved connecting line quantity, simplifies maintenance program, while the generation that electric accessory motor is promoted to seek unity of standard.
Meanwhile the electric accessory motor produced using this programme, the core of each accessory have one there is safety to add The chip of close function, chip internal have independent ID number, this ID number, by producer's burning, is only provided when dispatching from the factory by producer Special equipment could change.When dispatching from the factory, each accessory of an electric car is belonged to, possesses identical id number, such as Vehicle Identify Number is the instrument disk controller of 9527 electric car, electric machine speed regulation controller, the ID number of the chip inside battery controller Code is all identical.It cannot be used in the accessory of 9527 vehicle frame difference id numbers above 9527 vehicles.Or second-hand accessory returns It returns genuine or is handled back to special service station.During the repair of second-hand accessory, the special volume that is provided first by electric car manufacturer Journey device connects accessory by bus, reads accessory encryption ID and is shown as Quick Response Code, and cell phone application scans the Quick Response Code on programmable device, And the server of manufacturer is uploaded to, manufacturer personnel after sale know the information of this accessory and sale path first, then exclude to steal and rob object After product, one group of authorization code of cell phone application is handed down to, it is special that maintenance station or maintenance personal can rely on this authorization code to be provided using manufacturer The id number of the accessory is changed with programmable device, with vehicle match to be repaired.
Car owner just may be notified that in buying car to be robbed in case of stolen and can the information that vehicle is lost be offered manufacturer, if it find that dimension The corresponding vehicle of accessory ID number repaiied, which occurs to steal, to be robbed, and manufacturer personnel can notify car owner's relevant information as foundation of reporting a case to the security authorities immediately.
It is internal that this chip is rooted in accessory (such as battery etc.), will if chip removed, it is necessary to depth disassembles accessory The renovation or recycle value for making accessory are slumped.
In this way, it can thoroughly break off the channels of stolen goods disposal that electric car robber robs.
In view of this, present patent application is mainly protected applied to the B-TRI Bus control structures to solve the above problems.
Present invention technical solution to be protected is：
B-TRI Bus control structures, including instrument disk controller, electric machine speed regulation controller and battery controller；
Instrument disk controller is electrically connected handle signal acquisition module, dials gear signal acquisition module, brake signal acquisition Module, electronic lock signal acquisition module；
Electric machine speed regulation controller is electrically connected and controls motor, and electric machine speed regulation controller is fixed in one with motor；
Battery controller is electrically connected battery core, and battery controller is fixed in one with battery core；
Instrument disk controller, electric machine speed regulation controller and battery controller three are electrically connected by three-wire system bus , the three-wire system bus by positive and negative electrode power cord and a signal line group into.
This bus system is primary and secondary structure, and instrument disk controller is main machine, battery controller and electric machine speed regulation controller For slave；
Instrument disk controller receives the signal from the signal acquisition modules such as handle, group gear, brake, electron key/lock, warp The signal wire of three-wire system bus is published to battery controller, electric machine speed regulation controller end；Instrument disk controller can send inquiry life Order, the battery information of signal wire inquiry battery controller and the information of electric machine speed regulation controller through three-wire system bus；
Battery controller and electric machine speed regulation controller receive the bus line command from instrument disk controller, and are made according to order Go out various functions response.
The instrument disk controller includes power supply circuit module, drive amplification module, buffering filter module, RF interfaces, also Including
Instrument SOC chip (the instrument SOC chip in preferred this programme uses the SOC chip of model MD80F9234), The instrument SOC chip includes CPU and is electrically connected respectively with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), display Control module (DISP.), symmetrical encryption/decryption module (DES.), identification number memory module (FLASH ID storages), wireless key control Molding block (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The mark Knowledge memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with binary phase modulation module (BPSK mod.) and three-wire system bus (B-TRI Bus signal wire electrical connection)；
Buffer filter module respectively with binary phase demodulation module (BPSK Demod.) and three-wire system bus (B-TRI Bus signal wire electrical connection)；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input output mould Block (GPIO), which is electrically connected, dials gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller)；
Further, GPS interface is further included, for being electrically connected GPS module；GPS interface and the general serial mouth mold block (UART) it is electrically connected；
In this electric car three-wire system bus control system, this application provides a kind of band safety of the battery controller The structure type of encryption function：
The battery controller, including power supply circuit, relay, thermo-sensitive resistor, constantan-made resistances, metal-oxide-semiconductor, drive amplification Circuit and buffering filter circuit；
Further include battery management SOC chip, the battery management SOC chip in the present embodiment uses model MD80F9222 SOC chip, the battery management SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and impulse wave Shape generator (PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle unique Id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of battery management SOC chip (BPSK mod.) and control The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside device processed；
Buffer filter module outside SOC chip, respectively with the binary phase demodulation module of battery management SOC chip The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside (BPSK Demod.) and controller；
Thermo-sensitive resistor is electrically connected with the analog-digital converter module (ADC) in SOC chip；
For connecting battery battery core anode, the other end of constantan-made resistances is electrically connected relay for one end of constantan-made resistances Input terminal, the input terminal of mos pipes, the analog-digital converter module (ADC) of power supply circuit and battery management SOC chip；
The output terminal of relay is electrically connected with the output terminal of metal-oxide-semiconductor on the power cord of three-wire system bus (B-TRI Bus)；
The control terminal of relay is connected in the universal input and output module (GPIO) of battery management SOC chip；
The control terminal of metal-oxide-semiconductor is connected on the pulse-pattern generator (PWM) of battery management SOC chip.
In this electric car three-wire system bus control system, this application provides a kind of bands of the electric machine speed regulation controller The structure type of safe encryption function：
Electric machine speed regulation controller, including power supply circuit, MOS arrays, drive amplification circuit, buffering filter circuit；
Further include electric machine speed regulation SOC chip, the electric machine speed regulation SOC chip in the present embodiment uses model MD80F9211 SOC chip, the electric machine speed regulation SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and multichannel arteries and veins Rush waveform generator (multi-channel PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle Unique id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of electric machine speed regulation SOC chip (BPSK mod.) and control The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside device processed；
Buffer filter module outside electric machine speed regulation SOC chip, respectively with the binary phase solution of electric machine speed regulation SOC chip The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside mode transfer block (BPSK Demod.) and controller；
Multiplex pulse waveform generator (multi-channel PWM) is electrically connected with the control terminal of MOS arrays；
Hall sensor is electrically connected with the analog-digital converter module (ADC) inside electric machine speed regulation SOC chip；
Wheel hub motor is electrically connected with the output terminal of MOS arrays；
Power supply circuit is connected with the power cord of three-wire system bus (B-TRI Bus).
Description of the drawings
The attached drawing for forming the part of the present invention is used for providing a further understanding of the present invention, schematic reality of the invention Example and its explanation are applied for explaining the present invention, is not constituted improper limitations of the present invention.In the accompanying drawings：
Fig. 1 is three-wire system bus control system (B-TRI Bus) structure principle chart；
Fig. 2 is the instrument disk controller and its SOC chip structural principle of three-wire system bus control system (B-TRI Bus) Figure；
Fig. 3 is the battery controller and its SOC chip structure principle chart of three-wire system bus control system (B-TRI Bus)；
Fig. 4 is the electric machine speed regulation controller and its SOC chip structural principle of three-wire system bus control system (B-TRI Bus) Figure；
Fig. 5 is two-wire system bus control system (B-PLC Bus) structure principle chart；
Fig. 6 is two-wire system bus control system (B-PLC Bus) instrument disk controller and its structural principle of SOC chip Figure；
Fig. 7 is the battery controller of two-wire system bus control system (B-PLC Bus) and the structure principle chart of SOC chip；
Fig. 8 is the electric machine speed regulation controller of two-wire system bus control system (B-PLC Bus) and the structural principle of SOC chip Figure；
Fig. 9 replaces flow chart for electric accessory motor identification encryption and the repair of traceability management system accessory
Specific embodiment
It should be noted that in the case where there is no conflict, the feature in embodiment and embodiment in the present invention can phase Mutually combination.
The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
The scheme of three-wire system is introduced first.
As shown in Figure 1, electric car three-wire system bus control system (B-TRI Bus) structure, including instrument disk controller 1, Electric machine speed regulation controller 2 and battery controller 3；
Instrument disk controller 1 is electrically connected handle signal acquisition module 7, group gear signal acquisition module 8, brake signal and adopts Collect module 9, electronic lock signal acquisition module 10；
Electric machine speed regulation controller 2 is electrically connected and controls motor 5, and electric machine speed regulation controller 2 is fixed in one with motor 5；
Battery controller 3 is electrically connected battery core 4, and battery controller 3 is fixed in one with battery core 4；
It should be noted that as described herein be fixed in one, such as battery controller 3 and battery core 4, refer to be presented to the user Be in a component, two components are that be packaged in a shell in vivo, i.e., for a user, are seen This component of the battery being known as.If two components separated, overall structure, at least shell meeting can be destroyed It is destroyed, so as to it is apparent recognize the component and be disassembled decomposed.
Instrument disk controller 1, electric machine speed regulation controller 2 and 3 three of battery controller are to carry out electricity by three-wire system bus Connection, the three-wire system bus by positive and negative electrode power cord and a signal line group into；
This bus system is primary and secondary structure, and instrument disk controller 1 is host, and battery controller 3 is controlled with electric machine speed regulation Device 2 is slave；
In bus by bus line command be divided into control and inquiry two kinds, instrument disk controller 1 receive from handle, dial The signal of the signal acquisition modules such as gear, brake, electron key/lock, is converted into bus line command, through three-wire system bus (B-TRI Bus signal wire) is published to battery controller, electric machine speed regulation controller end；Instrument disk controller 1 can send inquiry life simultaneously Order, the battery information and electric machine speed regulation controller of the signal wire inquiry battery controller through three-wire system bus (B-TRI Bus) The information such as working condition and speed.
Battery controller 3 and electric machine speed regulation controller 2 receive the bus line command from instrument disk controller 1, and according to life Various functions response is made in order.Three controllers of system have sleep mode, 3 states of Auto-Sensing Mode and operating mode respectively：
Sleep mode：When vehicle is closed, battery controller is in sleep mode, and battery controller control battery current limliting is defeated Go out, maximum 100mA (500mA) electric current.At this moment instrument disk controller is also in sleep mode simultaneously with electric machine speed regulation controller.When So, system powers at this time.
Auto-Sensing Mode：When vehicle is opened, instrument disk controller receives the unlatching letter of car key/lock signal acquisition module Number, Auto-Sensing Mode is immediately entered, carries out System self-test, the signal wire issue self-test order through three-wire system bus (B-TRI Bus), Battery controller is waken up simultaneously also enters Auto-Sensing Mode with electric machine speed regulation controller.Self-test order by plain code self-test command word and Overstocked id number is added to form, battery controller and electric machine speed regulation controller are decrypted ID number after receiving, by the ID of decryption With returning to response message after the ID of itself, response message be made of 2 parts, response plain code (matching mismatches) and plus Close self-ID information.
If battery controller is transformed into operating mode if it find that ID number matching, cancel current limliting output.If it find that Oneself ID number mismatches, then is transformed into sleep mode.
Electric machine speed regulation controller is then transformed into operating mode if it find that ID number matching.If it find that oneself ID number is not Match somebody with somebody, be then transformed into sleep mode, not driving motor.
In view of the application environment of two-wheeled/three-wheeled electric vehicle, bus is exposed, it is easy to is interfered, so this is System sets bus length to be 2 meters maximum, semiduplex mode, signal modulation mode BPSK, and bus signals communication speed is 100kbps.Carrier frequency point is 4MHz, 0~5V of level value (the positive and negative 5V of level value).
As shown in Fig. 2, in this electric car three-wire system bus control system, this application provides the instrument disk controllers A kind of structure type of the 1 safe encryption function of band：
Instrument disk controller 1 including power supply circuit module, drive amplification module, buffering filter module, RF interfaces, is gone back Including
Instrument SOC chip (the instrument SOC chip in the present embodiment uses the SOC chip of model MD80F9234), it is described Instrument SOC chip includes CPU and is respectively electrically connected with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), display Control module (DISP.), symmetrical encryption/decryption module (DES.), identification number memory module (FLASH ID storages), wireless key control Molding block (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The mark Knowledge memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with binary phase modulation module (BPSK mod.) and three-wire system bus (B-TRI Bus signal wire electrical connection)；
Buffer filter module respectively with binary phase demodulation module (BPSK Demod.) and three-wire system bus (B-TRI Bus signal wire electrical connection)；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input output mould Block (GPIO), which is electrically connected, dials gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller)；
Further, GPS interface is further included, for being electrically connected GPS module；GPS interface and the general serial mouth mold block (UART) it is electrically connected；
Sleep mode：When electronic lock closing or RF car keies (wireless key) signal-off, instrument disk controller 1, which is in, stops Sleep mode.
Auto-Sensing Mode：Electronic lock switch or car key signalling can wake up instrument board controller 1, and make instrument board control Device 1 is in Auto-Sensing Mode.
System self-test process：The CPU of instrument SOC chip reads storage from identification number memory module (FLASH ID storages) Unique id number corresponding with vehicle, be then encrypted by DES algoritic modules, encrypted data plus self-test order Order by the forward error correction coding/decoding module (FEC) of electric car carrier wave bus control module (B-PLC BUS Controller) into Row forward error correction coding is modulated using binary phase modulation module (BPSK mod.), by modulated signal output instrument SOC chip is sent to by the drive amplification module of instrument disk controller 1 on the signal wire of three-wire system bus (B-TRI Bus).
The battery controller or electric machine speed regulation controller of the bus other end are received after self-test order through three-wire system bus The signal wire of (B-TRI Bus) beams back answer signal.Answer signal be sent back to instrument disk controller 1 by buffering filter module into Enter the binary phase demodulation module (BPSK Demod.) of instrument SOC chip, it is demodulated after signal using forward error correction Coding/decoding module (FEC) error correction decoding is reduced into reply data and the ID number encryption information of other side, and it is right that ID number encryption information passes through Encryption/decryption module (DES.) is claimed to obtain id number after decrypting, CPU comes by the verification to reply data and the comparison to id number It is confirmed whether self-test success.
Operating mode：
If CPU confirms self-test success, instrument disk controller 1 initially enters normal mode of operation.Instrument SOC chip profit Detect the variation of handle signal acquisition module resistance, universal input and output module in real time with analog-digital converter module (ADC) (GPIO) shape of gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10 is dialled in monitoring in real time State.These data are sent to CPU processing.Car key signal enters wireless key control module by RF interfaces simultaneously In (RF KEY Controller), car key signal is also directed to handle in CPU.If being circumscribed with GPS module simultaneously, lead to The general serial mouth mold block (UART) crossed on chip carries out the reading of GPS coordinate information, and is stored in FLASH, forms driving Track.CPU, to control command is formed, passes through electric car carrier wave bus control module (B-PLC BUS according to these state transformations Controller forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation module (BPSK) Mod. the drive amplification module being sent to after) modulating on instrument disk controller 1 is sent to the letter of three-wire system bus (B-TRI Bus) On number line.
The timer TIMER that instrument disk controller 1 is carried by instrument SOC chip is timed, and periodically passes through three-wire system The signal wire issued state querying command of bus (B-TRI Bus), battery controller 3 can believe the states such as remaining capacity after receiving Breath is beamed back by the signal wire of bus (B-TRI Bus)；Electric machine speed regulation controller 2 can pass through the status informations such as speed after receiving The signal wire of bus (B-TRI Bus) is beamed back.These status signals, which are sent back to by bus on 1 mainboard of instrument disk controller, to be passed through Buffering filter module enters the binary phase demodulation module (BPSK Demod.) of chip and is demodulated, it is demodulated after letter Number reply data is reduced into using forward error correction coding/decoding module (FEC) error correction decoding, CPU passes through after reply data is handled Display control module (DISP.), which is output on instrument board, to be shown.
As shown in figure 3, in this electric car three-wire system bus control system, this application provides the battery controllers 3 A kind of safe encryption function of band structure type：
Battery controller 3, including power supply circuit, relay, thermo-sensitive resistor, constantan-made resistances, metal-oxide-semiconductor, drive amplification electricity Road and buffering filter circuit；
Further include battery management SOC chip, the battery management SOC chip in the present embodiment uses model MD80F9222 SOC chip, the battery management SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and impulse wave Shape generator (PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle unique Id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of battery management SOC chip (BPSK mod.) and control The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside device processed；
Buffer filter module outside SOC chip, respectively with the binary phase demodulation module of battery management SOC chip The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside (BPSK Demod.) and controller；
Thermo-sensitive resistor is electrically connected with the analog-digital converter module (ADC) in SOC chip；
For connecting battery battery core anode, the other end of constantan-made resistances is electrically connected relay for one end of constantan-made resistances Input terminal, the input terminal of mos pipes, the analog-digital converter module (ADC) of power supply circuit and battery management SOC chip；
The output terminal of relay is electrically connected with the output terminal of metal-oxide-semiconductor on the power cord of three-wire system bus (B-TRI Bus)；
The control terminal of relay is connected in the universal input and output module (GPIO) of battery management SOC chip；
The control terminal of metal-oxide-semiconductor is connected on the pulse-pattern generator (PWM) of battery management SOC chip.
Sleep mode：When not receiving the self-test order that bus is sent, battery controller is in sleep mode.Power supply pipe at this time SOC chip control cut-off is managed, while controls metal-oxide-semiconductor output current maximum 100mA (500mA)
Auto-Sensing Mode：Self-test command signal from instrument disk controller 1 makes battery controller be in Auto-Sensing Mode.
Self-test command signal from instrument disk controller 1 is dealt by the signal wire of three-wire system bus (B-TRI Bus) Battery controller enters the binary phase demodulation module (BPSK Demod.) of power management SOC chip by buffering filtering, Signal after demodulated is reduced into order data and the ID of other side using forward error correction coding/decoding module (FEC) error correction decoding Number encryption information, ID number encryption information obtain id number after being decrypted by symmetrical encryption/decryption module (DES.), power management SOC's CPU reads the id number of oneself, and is confirmed whether self-test success by the verification to order data and to the comparison of id number.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself Id information.Process is as follows：
The CPU of power management SOC chip reads oneself of storage from identification number memory module (FLASH ID storages) Then unique id number corresponding with whole electric vehicle is encrypted by symmetrical encryption/decryption module (DES.), encrypted Data are compiled plus acknowledgement command by the forward error correction of electric car carrier wave bus control module (B-PLC BUS Controller) Decoder module (FEC) carries out forward error correction coding, modulates, will modulate using binary phase modulation module (BPSK mod.) Signal output chip afterwards is sent to the letter of three-wire system bus (B-TRI Bus) by the drive amplification circuit of battery controller On number line.
Operating mode：
If the CPU of power management SOC confirms self-test success, battery controller initially enters normal mode of operation.Electricity The CPU of source control SOC closes metal-oxide-semiconductor by pulse-pattern generator (PWM) and is opened simultaneously with universal input and output module (GPIO) It opens relay and normally powers for vehicle.The CPU of power management SOC detects temperature sensitive electricity in real time using analog-digital converter module (ADC) The temperature of battery is noted down in the variation of resistance.Simultaneously using analog-digital converter module (ADC) to the sampling monitoring current value of constantan-made resistances And voltage value, record and the electricity for calculating battery.By these data recordings inside FLASH.Instrument disk controller passes through bus B-TRI Bus issued state querying commands are dealt into the binary phase that battery controller enters chip by buffering filter module Demodulation module (BPSK Demod.), it is demodulated after signal using forward error correction coding/decoding module (FEC) error correction decoding also Original chooses such as battery current, battery temperature etc. according to command message into command message, the CPU of power management SOC from FLASH Status information forms state response message, then passes through electric car carrier wave bus control module (B-PLC BUS Controller forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation module (BPSK) Mod. after) modulating, it is sent to after the amplification of drive amplification circuit on the signal wire of three-wire system bus (B-TRI Bus).
As shown in figure 4, in this electric car three-wire system bus control system, this application provides electric machine speed regulation controls A kind of structure type of the safe encryption function of band of device 2：
Electric machine speed regulation controller 2, including power supply circuit, MOS arrays, drive amplification circuit, buffering filter circuit；
Further include electric machine speed regulation SOC chip, the electric machine speed regulation SOC chip in the present embodiment uses model MD80F9211 SOC chip, the electric machine speed regulation SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and multichannel arteries and veins Rush waveform generator (multi-channel PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle Unique id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of electric machine speed regulation SOC chip (BPSK mod.) and control The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside device processed；
Buffer filter module outside electric machine speed regulation SOC chip, respectively with the binary phase solution of electric machine speed regulation SOC chip The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside mode transfer block (BPSK Demod.) and controller；
Multiplex pulse waveform generator (multi-channel PWM) is electrically connected with the control terminal of MOS arrays；
Hall sensor is electrically connected with the analog-digital converter module (ADC) inside electric machine speed regulation SOC chip；
Wheel hub motor is electrically connected with the output terminal of MOS arrays；
Power supply circuit is connected with the power cord of three-wire system bus (B-TRI Bus).
Sleep mode：When not receiving the self-test order that bus is sent, electric machine speed regulation controller is in sleep mode.It is electric at this time Machine speed governing SOC chip control MOS arrays are closed.
Auto-Sensing Mode：Self-test command signal from instrument disk controller makes electric machine speed regulation controller be in Auto-Sensing Mode.
Self-test command signal from instrument disk controller is dealt into electric machine speed regulation controller by bus (B-TRI Bus), Enter the binary phase demodulation module (BPSK DEMOD.) of electric machine speed regulation SOC chip by buffering filter circuit, it is demodulated The ID number that signal afterwards is reduced into order data and other side using forward error correction coding/decoding module (FEC) error correction decoding encrypts letter Breath, ID number encryption information obtain id number after being decrypted by DES modules, and the CPU of electric machine speed regulation SOC chip reads the ID number of oneself Code, and with verification of the team to order data and the comparison to id number come be confirmed whether self-test success.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself Id information.Process is as follows, and the CPU of electric machine speed regulation SOC chip reads the id number of oneself of storage from FLASH, then passes through Symmetrical encryption/decryption module (DES.) is encrypted, and encrypted data pass through electric car carrier wave bus marco mould plus acknowledgement command The forward error correction coding/decoding module (FEC) of block (B-PLC BUS Controller) carries out forward error correction coding, by BPSK Modulation, by modulated signal output chip, bus is sent to by the drive amplification circuit on electric machine speed regulation controller mainboard On the signal wire of B-TRI Bus.
Operating mode：
If the CPU of electric machine speed regulation SOC chip confirms self-test success, electric machine speed regulation controller initially enters normal work Pattern.Instrument disk controller by bus B-TRI Bus issued state querying commands, be dealt into electric machine speed regulation controller through too slow Rush the binary phase demodulation module (BPSK DEMOD.) that filter circuit enters chip, it is demodulated after signal using preceding Command message is reduced into error correction coding/decoding module (FEC) error correction decoding, the CPU of electric machine speed regulation SOC chip is ordered according to these PWM module is controlled to generate different control signals, controls MOS arrays on electric machine speed regulation controller mainboard, and then controls wheel hub electricity The speed of machine.The analog-digital converter module (ADC) of electric machine speed regulation SOC chip gathers Hall sensor or wheel hub motor three-phase in real time Electric current, CPU carry out PID control (proportional integral derivative control).If the electric machine speed regulation controller of command message requirement inquiry Status information, such as electronic vehicle speed etc., then the CPU of electric machine speed regulation SOC chip form state response message, then pass through electricity Forward error correction coding/decoding module (FEC) forward error correction of motor-car carrier wave bus control module (B-PLC BUS Controller) is compiled The drive amplification circuit hair of electric machine speed regulation controller is sent to after code and binary phase modulation module (BPSK mod.) modulation It is sent on bus B-TRI Bus.
Next two-wire system scheme, i.e. electric car two-wire system carrier wave bus (B-PLC Bus) control system are introduced；
As shown in figure 5, electric car two-wire system carrier wave bus (B-PLC Bus) Control system architecture, controls including instrument board Device 1, electric machine speed regulation controller 2 and battery controller 3；
Instrument disk controller 1 is electrically connected handle signal acquisition module 7, group gear signal acquisition module 8, brake signal and adopts Collect module 9, electronic lock signal acquisition module 10；
Electric machine speed regulation controller 2 is electrically connected and controls motor 5, and electric machine speed regulation controller 2 is fixed in one with motor 5；
Battery controller 3 is electrically connected battery core 4, and battery controller 3 is fixed in one with battery core 4；
Instrument disk controller 1, electric machine speed regulation controller 2 and 3 three of battery controller are to carry out electricity by two-wire system bus Connection, the two-wire system bus by positive and negative electrode source line group into；
This bus system is primary and secondary structure, and instrument disk controller 1 is host, and battery controller 3 is controlled with electric machine speed regulation Device 2 is slave；
In bus by bus line command be divided into control and inquiry two kinds, instrument disk controller 1 receive from handle, dial The signal of the signal acquisition modules such as gear, brake, electron key/lock, is converted into bus line command, through two-wire system bus (B-PLC Bus battery controller, electric machine speed regulation controller end) are published to by carrier wave；Instrument disk controller 1 can send inquiry life simultaneously Order inquires about the battery information of battery controller and electric machine speed regulation controller through two-wire system bus (B-PLC Bus) by carrier wave The information such as working condition and speed.
Battery controller 3 and electric machine speed regulation controller 2 receive the bus line command from instrument disk controller 1, and according to life Various functions response is made in order.Three controllers of system have sleep mode, 3 states of Auto-Sensing Mode and operating mode respectively：
Sleep mode：When vehicle is closed, battery controller is in sleep mode, and battery controller control battery current limliting is defeated Go out, maximum 100mA (500mA) electric current.At this moment instrument disk controller is also in sleep mode simultaneously with electric machine speed regulation controller.When So, system powers at this time.
Auto-Sensing Mode：When vehicle is opened, instrument disk controller receives the unlatching letter of car key/lock signal acquisition module Number, Auto-Sensing Mode is immediately entered, carries out System self-test, self-test order is issued by carrier wave through two-wire system bus (B-PLC Bus), Battery controller is waken up simultaneously also enters Auto-Sensing Mode with electric machine speed regulation controller.Self-test order by plain code self-test command word and Overstocked id number is added to form, battery controller and electric machine speed regulation controller are decrypted ID number after receiving, by the ID of decryption With returning to response message after the ID of itself, response message be made of 2 parts, response plain code (matching mismatches) and plus Close self-ID information.
If battery controller is transformed into operating mode if it find that ID number matching, cancel current limliting output.If it find that Oneself ID number mismatches, then is transformed into sleep mode.
Electric machine speed regulation controller is then transformed into operating mode if it find that ID number matching.If it find that oneself ID number is not Match somebody with somebody, be then transformed into sleep mode, not driving motor.
In view of the application environment of two-wheeled/three-wheeled electric vehicle, bus is exposed, it is easy to is interfered, so this is System sets bus length to be 2 meters maximum, semiduplex mode, signal modulation mode BPSK, and bus signals communication speed is 100kbps.Carrier frequency point is 4MHz, 0~5V of level value (the positive and negative 5V of level value).
As shown in fig. 6, in this electric car two-wire system carrier wave bus control system, this application provides the instrument board controls A kind of structure type of the safe encryption function of band of device 1 processed：
Instrument disk controller 1 including power supply circuit module, drive amplification module, buffering filter module, RF interfaces, is gone back Including carrier wave termination power and
Instrument SOC chip (the instrument SOC chip in the present embodiment uses the SOC chip of model MD80F9234), it is described Instrument SOC chip includes CPU and is respectively electrically connected with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), display Control module (DISP.), symmetrical encryption/decryption module (DES.), identification number memory module (FLASH ID storages), wireless key control Molding block (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The mark Knowledge memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module is electrically connected respectively with binary phase modulation module (BPSK mod.) and carrier wave termination power；
Buffering filter module is electrically connected respectively with binary phase demodulation module (BPSK Demod.) and carrier wave termination power It connects；
Carrier wave termination power is also connected with two-wire system bus；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input output mould Block (GPIO), which is electrically connected, dials gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller)；
Further, GPS interface is further included, for being electrically connected GPS module；GPS interface and the general serial mouth mold block (UART) it is electrically connected；
Sleep mode：When electronic lock closing or RF car keies (wireless key) signal-off, instrument disk controller 1, which is in, stops Sleep mode.
Auto-Sensing Mode：Electronic lock switch or car key signalling can wake up instrument board controller 1, and make instrument board control Device 1 is in Auto-Sensing Mode.
System self-test process：The CPU of instrument SOC chip reads storage from identification number memory module (FLASH ID storages) Unique id number corresponding with vehicle, be then encrypted by DES algoritic modules, encrypted data plus self-test order Order by the forward error correction coding/decoding module (FEC) of electric car carrier wave bus control module (B-PLC BUS Controller) into Row forward error correction coding is modulated using binary phase modulation module (BPSK mod.), by modulated signal output instrument SOC chip is mixed into carrier wave termination power by the drive amplification module of instrument disk controller 1 and is sent to two-wire system bus (B- PLC Bus) on.
The battery controller or electric machine speed regulation controller of the bus other end are received after self-test order through two-wire system bus (B-PLC Bus) beams back answer signal.Answer signal is sent back to carrier wave termination power on instrument disk controller 1 using buffering Filter module enters the binary phase demodulation module (BPSK Demod.) of instrument SOC chip, it is demodulated after signal pass through again It crosses forward error correction coding/decoding module (FEC) error correction decoding and is reduced into reply data and the ID number encryption information of other side, ID number encryption Information obtains id number after being decrypted by symmetrical encryption/decryption module (DES.), CPU passes through to the verification of reply data and to ID number Code comparison come be confirmed whether self-test success.
Operating mode：
If CPU confirms self-test success, instrument disk controller 1 initially enters normal mode of operation.Instrument SOC chip profit Detect the variation of handle signal acquisition module resistance, universal input and output module in real time with analog-digital converter module (ADC) (GPIO) shape of gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10 is dialled in monitoring in real time State.These data are sent to CPU processing.Car key signal enters wireless key control module by RF interfaces simultaneously In (RF KEY Controller), car key signal is also directed to handle in CPU.If being circumscribed with GPS module simultaneously, lead to The general serial mouth mold block (UART) crossed on chip carries out the reading of GPS coordinate information, and is stored in FLASH, forms driving Track.CPU, to control command is formed, passes through electric car carrier wave bus control module (B-PLC BUS according to these state transformations Controller forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation module (BPSK) Mod. the drive amplification module being sent to after) modulating on instrument disk controller 1 is mixed into carrier wave termination power and is sent to two-wire system In bus (B-PLC Bus).
The timer TIMER that instrument disk controller 1 is carried by instrument SOC chip is timed, and periodically passes through two-wire system Bus (B-PLC Bus) issued state querying command, battery controller 3 can pass through the status informations such as remaining capacity total after receiving Line (B-PLC Bus) is beamed back；The status informations such as speed can be passed through bus (B-PLC Bus) by electric machine speed regulation controller 2 after receiving It beams back.The carrier wave termination power that these status signals are sent back to by bus on 1 mainboard of instrument disk controller is filtered using buffering The binary phase demodulation module (BPSK Demod.) that ripple module enters chip is demodulated, it is demodulated after signal pass through again It crosses forward error correction coding/decoding module (FEC) error correction decoding and is reduced into reply data, CPU is controlled after reply data is handled by showing Molding block (DISP.), which is output on instrument board, to be shown.
As shown in fig. 7, in this electric car two-wire system carrier wave bus control system, this application provides battery controls A kind of structure type of the safe encryption function of band of device 3：
Battery controller 3, including power supply circuit, relay, thermo-sensitive resistor, constantan-made resistances, metal-oxide-semiconductor, carrier wave coupling electricity Road, drive amplification circuit and buffering filter circuit；
Further include battery management SOC chip, the battery management SOC chip in the present embodiment uses model MD80F9222 SOC chip, the battery management SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and impulse wave Shape generator (PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle unique Id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of battery management SOC chip (BPSK mod.) and carry Ripple termination power is electrically connected；
Buffer filter module outside SOC chip, respectively with the binary phase demodulation module of battery management SOC chip (BPSK Demod.) and carrier wave termination power are electrically connected；
Thermo-sensitive resistor is electrically connected with the analog-digital converter module (ADC) in SOC chip；
For connecting battery battery core anode, the other end of constantan-made resistances is electrically connected relay for one end of constantan-made resistances Input terminal, the input terminal of mos pipes, the analog-digital converter module (ADC) of power supply circuit and battery management SOC chip；
The output terminal of relay is electrically connected carrier wave termination power with the output terminal of metal-oxide-semiconductor；
Carrier wave termination power is also connected with two-wire system bus (B-PLC Bus)；
The control terminal of relay is connected in the universal input and output module (GPIO) of battery management SOC chip；
The control terminal of metal-oxide-semiconductor is connected on the pulse-pattern generator (PWM) of battery management SOC chip.
Sleep mode：When not receiving the self-test order that bus is sent, battery controller is in sleep mode.Power supply pipe at this time SOC chip control cut-off is managed, while controls metal-oxide-semiconductor output current maximum 100mA (500mA)
Auto-Sensing Mode：Self-test command signal from instrument disk controller 1 makes battery controller be in Auto-Sensing Mode.
Self-test command signal from instrument disk controller 1 is dealt into battery control by two-wire system bus (B-PLC Bus) In the carrier wave termination power of device, the binary phase demodulation module (BPSK of power management SOC chip is entered using buffering filtering Demod.), signal after demodulated using forward error correction coding/decoding module (FEC) error correction decoding be reduced into order data and The ID number encryption information of other side, ID number encryption information obtain id number, power supply after being decrypted by symmetrical encryption/decryption module (DES.) The CPU of management SOC reads the id number of oneself, and is confirmed whether by the verification to order data and to the comparison of id number Self-test success.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself Id information.Process is as follows：
The CPU of power management SOC chip reads oneself of storage from identification number memory module (FLASH ID storages) Then unique id number corresponding with whole electric vehicle is encrypted by symmetrical encryption/decryption module (DES.), encrypted Data are compiled plus acknowledgement command by the forward error correction of electric car carrier wave bus control module (B-PLC BUS Controller) Decoder module (FEC) carries out forward error correction coding, modulates, will modulate using binary phase modulation module (BPSK mod.) Signal output chip afterwards, being mixed into carrier wave termination power by the drive amplification circuit of battery controller, to be sent to two-wire system total On line (B-PLC Bus).
Operating mode：
If the CPU of power management SOC confirms self-test success, battery controller initially enters normal mode of operation.Electricity The CPU of source control SOC closes metal-oxide-semiconductor by pulse-pattern generator (PWM) and is opened simultaneously with universal input and output module (GPIO) It opens relay and normally powers for vehicle.The CPU of power management SOC detects temperature sensitive electricity in real time using analog-digital converter module (ADC) The temperature of battery is noted down in the variation of resistance.Simultaneously using analog-digital converter module (ADC) to the sampling monitoring current value of constantan-made resistances And voltage value, record and the electricity for calculating battery.By these data recordings inside FLASH.Instrument disk controller passes through bus (B-PLC Bus) issued state querying command is dealt into the carrier wave termination power of battery controller using buffering filter module Into the binary phase demodulation module (BPSK Demod.) of chip, it is demodulated after signal using forward error correction compile solve Code module (FEC) error correction decoding is reduced into command message, and the CPU of power management SOC chooses example according to command message from FLASH Such as status informations such as battery current, battery temperatures, state response message is formed, then passes through electric car carrier wave bus control module Forward error correction coding/decoding module (FEC) forward error correction coding and binary phase modulation of (B-PLC BUS Controller) After module (BPSK mod.) modulation, it is sent to after the amplification of drive amplification circuit in two-wire system bus (B-PLC Bus).
As shown in figure 8, in this electric car two-wire system carrier wave bus control system, this application provides the electric machine speed regulations A kind of structure type of the safe encryption function of band of controller：
Electric machine speed regulation controller, including power supply circuit, MOS arrays, drive amplification circuit, buffering filter circuit and carrier wave Termination power；
Further include electric machine speed regulation SOC chip, the electric machine speed regulation SOC chip in the present embodiment uses model MD80F9211 SOC chip, the electric machine speed regulation SOC chip includes CPU and is electrically connected respectively with CPU
It is electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical Encryption/decryption module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and multichannel arteries and veins Rush waveform generator (multi-channel PWM)；The identification number memory module (FLASH ID storages) is stored with corresponding with whole electric vehicle Unique id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction encoding and decoding mould Block (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward direction entangles Miscode decoder module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of electric machine speed regulation SOC chip (BPSK mod.) and carry Ripple termination power is electrically connected；
Buffer filter module outside electric machine speed regulation SOC chip, respectively with the binary phase solution of electric machine speed regulation SOC chip Mode transfer block (BPSK Demod.) and the electrical connection of carrier wave termination power；
Multiplex pulse waveform generator (multi-channel PWM) is electrically connected with the control terminal of MOS arrays；
Hall sensor is electrically connected with the analog-digital converter module (ADC) inside electric machine speed regulation SOC chip；
Wheel hub motor is electrically connected with the output terminal of MOS arrays；
Power supply circuit is electrically connected with carrier wave termination power；
Carrier wave termination power is connected again with two-wire system bus (B-PLC Bus).
Sleep mode：When not receiving the self-test order that bus is sent, electric machine speed regulation controller is in sleep mode.It is electric at this time Machine speed governing SOC chip control MOS arrays are closed.
Auto-Sensing Mode：Self-test command signal from instrument disk controller makes electric machine speed regulation controller be in Auto-Sensing Mode.
Self-test command signal from instrument disk controller is dealt into electric machine speed regulation controller by bus (B-PLC Bus) Carrier wave termination power enters the binary phase demodulation module (BPSK of electric machine speed regulation SOC chip using buffering filter circuit DEMOD.), signal after demodulated using forward error correction coding/decoding module (FEC) error correction decoding be reduced into order data and The ID number encryption information of other side, ID number encryption information obtain id number after being decrypted by DES modules, electric machine speed regulation SOC chip CPU reads the id number of oneself, and is confirmed whether self-test success with verification of the team to order data and the comparison to id number.
If unsuccessful CPU controls transitions to sleep mode, while sends the acknowledgement command of self-test mistake and adding for oneself Close id information.If success CPU controls transitions to operating mode, while sends the correct acknowledgement command of self-test and the encryption of oneself Id information.Process is as follows, and the CPU of electric machine speed regulation SOC chip reads the id number of oneself of storage from FLASH, then passes through Symmetrical encryption/decryption module (DES.) is encrypted, and encrypted data pass through electric car carrier wave bus marco mould plus acknowledgement command The forward error correction coding/decoding module (FEC) of block (B-PLC BUS Controller) carries out forward error correction coding, by BPSK Modulation, by modulated signal output chip, carrier wave is mixed by the drive amplification circuit on electric machine speed regulation controller mainboard Termination power is sent in bus (B-PLC Bus).
Operating mode：
If the CPU of electric machine speed regulation SOC chip confirms self-test success, electric machine speed regulation controller initially enters normal work Pattern.Instrument disk controller is dealt into the carrier wave of electric machine speed regulation controller by bus (B-PLC Bus) issued state querying command Termination power enters the binary phase demodulation module (BPSK DEMOD.) of chip using buffering filter circuit, demodulated Signal afterwards is reduced into command message using forward error correction coding/decoding module (FEC) error correction decoding, electric machine speed regulation SOC chip CPU generates different control signals according to these order control PWM modules, controls MOS arrays on electric machine speed regulation controller mainboard, And then control the speed of wheel hub motor.The analog-digital converter module (ADC) of electric machine speed regulation SOC chip gathers Hall sensor in real time Or the electric current of wheel hub motor three-phase, CPU carry out PID control (proportional integral derivative control).If command message requirement inquiry The CPU formation state responses of the status information of electric machine speed regulation controller, such as electronic vehicle speed etc., then electric machine speed regulation SOC chip Then message passes through the forward error correction coding/decoding module of electric car carrier wave bus control module (B-PLC BUS Controller) (FEC) it is sent to electric machine speed regulation controller after forward error correction coding and binary phase modulation module (BPSK mod.) modulation Drive amplification circuit is mixed into carrier wave termination power, re-sends in bus (B-PLC Bus).
In addition, as shown in figure 9, present invention also provides a kind of electric accessory motor identification encryption and traceability management systems：
Due to the system electric car, instrument disk controller, battery controller and electric machine speed regulation controller and vehicle frame ID number (i.e. Unique id number corresponding with whole electric vehicle) must be one-to-one, it is also that can not use that the accessory of other vehicles, which is changed, , so repair and accessory, which exchange, can become the problem of new.It traces to the source management so being specifically designed set accessory identification encryption equipment System.
The system is formed by with lower part：
The management information server 1. vehicle accessory is traced to the source
The managing mobile phone APP softwares 2. vehicle accessory is traced to the source
3. encrypt accessory Special programming
Operation principle：
For example the battery of electric vehicle that Vehicle Identify Number is 9527 is broken, it is necessary to replace, maintenace point has 2 kinds of schemes at present, and one is The genuine battery more renewed, the other is the battery of the good other vehicle damage of repair and replacement.Passed through first with Special programming B-TRI Bus or B-PLC Bus are connected on the battery for wishing to replace, and Special programming is by reading inside battery encryption chip Encrypted id number, and generate Quick Response Code on the screen, the vehicle accessory that then maintenance mans are opened on mobile phone is traced to the source management APP inputs carriage frame number to be repaired, and scans the two-dimensional code and upload to the vehicle accessory of manufacturer and trace to the source in management server, service Device can complete two work automatically, be the source of this accessory of certification first, if had criminal record.If any reporting a case to the security authorities, record then notifies vehicle It is main.If source is normal, the mapping for establishing new id number and Vehicle Identify Number in the database connects.And generate new id number Authorization code is generated, is sent back to automatically in cell phone application, authorization code is input in Special programming by maintenance personal again, starts programming, New id number is write, completes accessory matching.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention With within principle, any modifications, equivalent replacements and improvements are made should all be included in the protection scope of the present invention god.

Claims (10)

1.B-TRI Bus control structures, it is characterised in that：It is controlled including instrument disk controller, electric machine speed regulation controller and battery Device；
Instrument disk controller be electrically connected handle signal acquisition module, dial gear signal acquisition module, brake signal acquisition module, Electronic lock signal acquisition module；
Electric machine speed regulation controller is electrically connected and controls motor, and electric machine speed regulation controller is fixed in one with motor；
Battery controller is electrically connected battery core, and battery controller is fixed in one with battery core；
Instrument disk controller, electric machine speed regulation controller and battery controller three are electrically connected by three-wire system bus, institute State three-wire system bus by positive and negative electrode power cord and a signal line group into.
2. B-TRI Bus control structures according to claim 1, it is characterised in that：For primary and secondary structure, instrument board control Device is host, and battery controller is slave with electric machine speed regulation controller；
Instrument disk controller receives the signal from the signal acquisition modules such as handle, group gear, brake, electron key/lock, through three lines The signal wire of bus processed is published to battery controller, electric machine speed regulation controller end；Instrument disk controller can send querying command, warp The battery information of signal wire inquiry battery controller of three-wire system bus and the information of electric machine speed regulation controller；
Battery controller and electric machine speed regulation controller receive the bus line command from instrument disk controller, and are made respectively according to order Kind functional response.
3. B-TRI Bus control structures according to claim 1, which is characterized in that the instrument disk controller includes supplying Electric circuit module, drive amplification module, buffering filter module, RF interfaces, further include
Instrument SOC chip, the instrument SOC chip include CPU and the electric car carrier wave bus control being electrically connected respectively with CPU Molding block (B-PLC BUS Controller), analog-digital converter module (ADC), display control module (DISP.), symmetrical plus solution Close module (DES.), identification number memory module (FLASH ID storages), wireless key control module (RF KEY Controller), universal input and output module (GPIO) and general serial mouth mold block (UART)；The identification number memory module (FLASH ID storages) is stored with unique id number corresponding with vehicle；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction coding/decoding module (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward error correction Coding/decoding module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with binary phase modulation module (BPSK mod.) and three-wire system bus (B-TRI Bus) Signal wire is electrically connected；
Buffer filter module respectively with binary phase demodulation module (BPSK Demod.) and three-wire system bus (B-TRI Bus) Signal wire electrical connection；
Analog-digital converter module (ADC) the electrical connection handle signal acquisition module of instrument SOC chip, universal input and output module (GPIO) it is electrically connected and dials gear signal acquisition module 8, brake signal acquisition module 9 and electronic lock signal acquisition module 10；
RF interfaces are electrically connected with wireless key control module (RF KEY Controller).
4. B-TRI Bus control structures according to claim 3, it is characterised in that：The instrument SOC chip uses model For the SOC chip of MD80F9234.
5. B-TRI Bus control structures according to claim 3, it is characterised in that：GPS interface is further included, for being electrically connected Connect GPS module；GPS interface is electrically connected with the general serial mouth mold block (UART).
6. B-TRI Bus control structures according to claim 1, it is characterised in that：The battery controller, including supplying Circuit, relay, thermo-sensitive resistor, constantan-made resistances, metal-oxide-semiconductor, drive amplification circuit and buffering filter circuit；
Further include battery management SOC chip, the battery management SOC chip includes CPU and is electrically connected respectively with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical plus solution Close module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and impulse waveform hair Raw device (PWM)；The identification number memory module (FLASH ID storages) is stored with unique ID number corresponding with whole electric vehicle Code；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction coding/decoding module (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward error correction Coding/decoding module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with the binary phase modulation module of battery management SOC chip (BPSK mod.) and controller The signal wire electrical connection of outer three-wire system bus (B-TRI Bus)；
Buffer filter module outside SOC chip, respectively with the binary phase demodulation module (BPSK of battery management SOC chip Demod. the signal wire electrical connection of the three-wire system bus (B-TRI Bus)) and outside controller；
Thermo-sensitive resistor is electrically connected with the analog-digital converter module (ADC) in SOC chip；
For connecting battery battery core anode, the other end of constantan-made resistances is electrically connected the input of relay for one end of constantan-made resistances The analog-digital converter module (ADC) at end, the input terminal of mos pipes, power supply circuit and battery management SOC chip；
The output terminal of relay is electrically connected with the output terminal of metal-oxide-semiconductor on the power cord of three-wire system bus (B-TRI Bus)；
The control terminal of relay is connected in the universal input and output module (GPIO) of battery management SOC chip；
The control terminal of metal-oxide-semiconductor is connected on the pulse-pattern generator (PWM) of battery management SOC chip.
7. B-TRI Bus control structures according to claim 6, it is characterised in that：, the battery management SOC chip adopts With the SOC chip of model MD80F9222.
8. B-TRI Bus control structures according to claim 1, it is characterised in that：Electric machine speed regulation controller, including supplying Circuit, MOS arrays, drive amplification circuit, buffering filter circuit；
Further include electric machine speed regulation SOC chip, the electric machine speed regulation SOC chip includes CPU and is electrically connected respectively with CPU
Electric car carrier wave bus control module (B-PLC BUS Controller), analog-digital converter module (ADC), symmetrical plus solution Close module (DES.), identification number memory module (FLASH ID storages), universal input and output module (GPIO) and multiplex pulse ripple Shape generator (multi-channel PWM)；The identification number memory module (FLASH ID storages) be stored with it is corresponding with whole electric vehicle only One id number；
The electric car carrier wave bus control module (B-PLC BUS Controller) includes forward error correction coding/decoding module (FEC), binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.), forward error correction Coding/decoding module (FEC) respectively with binary phase modulation module (BPSK mod.) and binary phase demodulation module (BPSK Demod.) it is electrically connected；
Drive amplification module respectively with outside the binary phase modulation module of electric machine speed regulation SOC chip (BPSKmod.) and controller Three-wire system bus (B-TRI Bus) signal wire electrical connection；
Buffer filter module outside electric machine speed regulation SOC chip, respectively with the binary phase solution mode transfer of electric machine speed regulation SOC chip The signal wire electrical connection of three-wire system bus (B-TRI Bus) outside block (BPSK Demod.) and controller；
Multiplex pulse waveform generator (multi-channel PWM) is electrically connected with the control terminal of MOS arrays；
Hall sensor is electrically connected with the analog-digital converter module (ADC) inside electric machine speed regulation SOC chip；
Wheel hub motor is electrically connected with the output terminal of MOS arrays；
Power supply circuit is connected with the power cord of three-wire system bus (B-TRI Bus).
9. B-TRI Bus control structures according to claim 8, it is characterised in that：The electric machine speed regulation SOC chip uses The SOC chip of model MD80F9211.
10. a kind of electric car, it is characterised in that employ the B-TRIBus control knots as described in claim 1 to 9 any one Structure.
CN201610994743.4A 2016-11-11 2016-11-11 B-TRI Bus control structures Pending CN108068975A (en)

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Application Number Priority Date Filing Date Title
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112985508A (en) * 2021-03-16 2021-06-18 四川通信科研规划设计有限责任公司 Coding and communication method for multifunctional sensor output
CN113911254A (en) * 2021-10-28 2022-01-11 南京懂玫驱动技术有限公司 Motor and electric power-assisted bicycle driving system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112985508A (en) * 2021-03-16 2021-06-18 四川通信科研规划设计有限责任公司 Coding and communication method for multifunctional sensor output
CN113911254A (en) * 2021-10-28 2022-01-11 南京懂玫驱动技术有限公司 Motor and electric power-assisted bicycle driving system
CN113911254B (en) * 2021-10-28 2023-04-07 南京懂玫驱动技术有限公司 Motor and electric power-assisted bicycle driving system

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