CN108039937B - Resource optimization method and device in baseband processing and electronic equipment - Google Patents
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Abstract
The invention provides a resource optimization method, a device and electronic equipment in baseband processing, relates to the technical field of communication, and is applied to a DVB-T2 system sending end, wherein the method comprises the following steps: and acquiring data to be transmitted, writing the data to be transmitted into the RAM according to the writing rule of cell interleaving, and reading the written data to be transmitted from the RAM according to the output rule of time interleaving. The resource optimization method, the resource optimization device and the electronic equipment in the baseband processing reduce occupied RAM resources and improve the running speed of a T2 system by combining cell interleaving and time interleaving into a whole.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a resource optimization method and apparatus in baseband processing, and an electronic device.
Background
DVB (Digital Video Broadcasting) -T2 is a second generation european Digital terrestrial television broadcast transmission standard, and the highest TS Stream (Transport Stream) transmission rate supported within the 8MHz spectral bandwidth is about 50.1 Mbit/s. The service to be transmitted is transmitted by a DVB-T2 system (hereinafter referred to as T2 system).
In the prior art, a transmitting end of a T2 system usually includes four consecutive modules, namely, constellation mapping, constellation rotation, cell interleaving, and time interleaving, and is used to perform baseband processing on data to be transmitted. As shown in fig. 1, the data to be transmitted (with bit width of 8) after serial-to-parallel conversion is transformed into a data stream with 32 bit width through constellation mapping, and at this time, if there is constellation rotation, a pair of data streams with bit width of 32 and depth of N needs to pass throughcellsThe ping-pong RAM (random access memory) sends the data stream to the constellation rotation module, and then passes through a pair of bits with a width of 32 and a depth of (N)cells×Nfec) The ping-pong RAM completes cell interleaving, and then a pair of cells with a bit width of 32 and a depth of (N)cells×Nfec) The ping-pong RAM completes time interleaving, thereby obtaining the data to be transmitted after baseband processing. It is composed ofIn the method, the data to be transmitted is composed of a plurality of cells after serial-to-parallel conversion, NcellsIndicates the number of cells, N, corresponding to a Forward Error Correction (FEC) block after serial-to-parallel conversionfecIndicating the corresponding FEC block number in one cell interleaving module.
When the T2 system is used for baseband processing, if there is constellation rotation, the occupied RAM resource is: (32 XN)cells×2+32×Ncells×Nfec×2+32×Ncells×NfecX 2); if there is no constellation rotation, the occupied RAM resources are: (32 XN)cells×Nfec×2+32×Ncells×NfecX 2). It can be seen that the existing T2 system occupies more RAM resources when performing baseband processing, which results in a slow operating speed of the T2 system.
Disclosure of Invention
In view of this, an object of the present invention is to provide a method and an apparatus for optimizing resources in baseband processing, and an electronic device, so as to reduce occupied RAM resources and improve the operating speed of a T2 system.
In a first aspect, an embodiment of the present invention provides a resource optimization method in baseband processing, where the method is applied to a sending end of a DVB-T2 system, and the method includes:
acquiring data to be transmitted;
writing the data to be transmitted into the RAM according to the writing rule of cell interleaving;
and reading the written data to be transmitted from the RAM according to the time-interleaved output rule.
With reference to the first aspect, an embodiment of the present invention provides a first possible implementation manner of the first aspect, where the obtaining data to be transmitted includes:
receiving data to be transmitted output by the serial-parallel conversion module; the data to be transmitted is formed by corresponding cells after a plurality of forward error correction FEC blocks are respectively subjected to serial-parallel conversion;
the method further comprises the following steps:
and carrying out constellation mapping operation on the data to be transmitted read out from the RAM to obtain constellation point data corresponding to the data to be transmitted.
With reference to the first possible implementation manner of the first aspect, an embodiment of the present invention provides a second possible implementation manner of the first aspect, where the reading the written data to be transmitted from the RAM according to the time-interleaved output rule includes:
and directly reading out the disordered cells of the data to be transmitted from the RAM according to the time-interleaved output rule.
With reference to the second possible implementation manner of the first aspect, an embodiment of the present invention provides a third possible implementation manner of the first aspect, where the method further includes:
and performing ping-pong operation on the constellation point data, and then performing constellation rotation operation to obtain constellation point data after constellation rotation.
With reference to the first possible implementation manner of the first aspect, an embodiment of the present invention provides a fourth possible implementation manner of the first aspect, where the reading, from the RAM, the data to be transmitted that is written according to the time-interleaved output rule includes:
reading two paths of interleaved data from the RAM, wherein the two paths of interleaved data are two continuous cells before cell interleaving, and one path of interleaved data is a cell which is directly read from the RAM and in which the data to be transmitted is out of order according to the output rule of time interleaving;
the constellation point data includes two constellation data corresponding to the two interleaved data, and the method further includes:
and carrying out constellation rotation operation on the two paths of constellation data to obtain constellation data after constellation rotation.
In a second aspect, an embodiment of the present invention further provides a device for optimizing resources in baseband processing, where the device is applied to a sending end of a DVB-T2 system, and the device includes a cell interleaving and time interleaving fusion module, where the cell interleaving and time interleaving fusion module includes:
the data acquisition unit is used for acquiring data to be transmitted;
a write-in unit, which is used for writing the data to be transmitted into the RAM according to the write-in rule of cell interleaving;
and the reading unit is used for reading the written data to be transmitted from the RAM according to the time-interleaved output rule.
With reference to the second aspect, an embodiment of the present invention provides a first possible implementation manner of the second aspect, where the data obtaining unit is specifically configured to:
receiving data to be transmitted output by the serial-parallel conversion module; the data to be transmitted is formed by corresponding cells after a plurality of forward error correction FEC blocks are respectively subjected to serial-parallel conversion;
the device further comprises:
and the constellation mapping module is used for carrying out constellation mapping operation on the data to be transmitted read out from the reading unit to obtain constellation point data corresponding to the data to be transmitted.
With reference to the first possible implementation manner of the second aspect, an embodiment of the present invention provides a second possible implementation manner of the second aspect, where the readout unit is specifically configured to:
and directly reading out the disordered cells of the data to be transmitted from the RAM according to the time-interleaved output rule.
With reference to the first possible implementation manner of the second aspect, an embodiment of the present invention provides a third possible implementation manner of the second aspect, where the readout unit is specifically configured to:
reading two paths of interleaved data from the RAM, wherein the two paths of interleaved data are two continuous cells before cell interleaving, and one path of interleaved data is a cell which is directly read from the RAM and in which the data to be transmitted is out of order according to the output rule of time interleaving;
the constellation point data includes two constellation data corresponding to the two interleaved data, and the apparatus further includes:
and the constellation rotation module is used for carrying out constellation rotation operation on the two paths of constellation data to obtain constellation data after constellation rotation.
In a third aspect, an embodiment of the present invention further provides an electronic device, including a memory and a processor, where the memory stores a computer program that is executable on the processor, and the processor executes the computer program to implement the method described in the first aspect and any possible implementation manner thereof.
The embodiment of the invention has the following beneficial effects:
in the embodiment of the invention, the data to be transmitted is firstly acquired, then the data to be transmitted is written into the RAM according to the writing rule of cell interleaving, and the written data to be transmitted is read out from the RAM according to the output rule of time interleaving. In the resource optimization method, device and electronic equipment in baseband processing provided by this embodiment, cell interleaving and time interleaving are combined into one, so that while the bit error rate is ensured, the RAM resource occupied by the cell interleaving and the time interleaving is reduced to half of the original RAM resource, the occupied RAM resource is reduced, and the operating speed of the T2 system is increased.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic flow chart of a baseband process using a conventional T2 system;
fig. 2 is a schematic flowchart of a resource optimization method in baseband processing according to an embodiment of the present invention;
fig. 3 is a schematic flowchart of another resource optimization method in baseband processing according to an embodiment of the present invention;
fig. 4 is a schematic diagram of jump writing in a resource optimization method in baseband processing according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a time interleaving rule according to an embodiment of the present invention;
fig. 6 is a schematic flowchart of another resource optimization method in baseband processing according to an embodiment of the present invention;
fig. 7 is a flowchart illustrating another resource optimization method in baseband processing according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a resource optimization apparatus in baseband processing according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another resource optimization apparatus in baseband processing according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
At present, the existing T2 system occupies more RAM resources when performing baseband processing, which results in a slow running speed of the T2 system. Based on this, the method, the device and the electronic device for optimizing resources in baseband processing provided by the embodiments of the present invention reduce occupied RAM resources and improve the operating speed of the T2 system by combining cell interleaving and time interleaving into one.
For the convenience of understanding the present embodiment, a detailed description will be first given of a resource optimization method in baseband processing disclosed in the present embodiment.
The first embodiment is as follows:
the resource optimization method in baseband processing provided by the embodiment of the invention is applied to a sending end of a DVB-T2 system, and the method reduces the using amount of RAM in the implementation of a T2 system by combining a cell interleaving module and a time interleaving module of the sending end of the DVB-T2 system into a whole.
Fig. 2 is a schematic flowchart of a resource optimization method in baseband processing according to an embodiment of the present invention, and as shown in fig. 2, the method includes the following steps:
step S201, data to be transmitted is acquired.
The data to be transmitted is composed of a plurality of cells, and may be data output after constellation rotation or data output after serial-to-parallel conversion, which is not limited herein.
Step S202, the data to be transmitted is written into the RAM according to the writing rule of cell interleaving.
The writing order of the data to be transmitted is disturbed in the frequency domain by the writing rule of cell interleaving, so that the error rate is reduced. The cell interleaving adopts a hopping sequence mode to write data to be transmitted, and the specific writing rule is the same as the corresponding prior art, which is not described herein again.
And step S203, reading the written data to be transmitted from the RAM according to the output rule of time interleaving.
The time interleaving rule is that the cell interleaving and the time interleaving RAM space are the same, and the data output in the original T2 system in the order of the cell interleaving is written into the time interleaving RAM in turn, so the data to be transmitted written in the cell interleaving is directly read out according to the time interleaving output rule, the same effect can be obtained, the bit error rate is ensured, the occupied RAM resource is reduced, and the running speed of the T2 system is improved. The output rule of time interleaving is the same as that of the prior art, and is not described herein again.
In the embodiment of the invention, the data to be transmitted is firstly acquired, then the data to be transmitted is written into the RAM according to the writing rule of cell interleaving, and the written data to be transmitted is read out from the RAM according to the output rule of time interleaving. In the resource optimization method in baseband processing provided by this embodiment, cell interleaving and time interleaving are combined into one, so that while the bit error rate is ensured, the RAM resource occupied by the cell interleaving and the time interleaving is reduced to half of the original RAM resource, the occupied RAM resource is reduced, and the operating speed of the T2 system is improved.
Fig. 3 is a schematic flow chart of another resource optimization method in baseband processing according to an embodiment of the present invention, and as shown in fig. 3, the method does not have constellation rotation operation, and includes the following steps:
step S301, receiving the data to be transmitted output by the serial-parallel conversion module.
The data to be transmitted is composed of corresponding cells after serial-to-parallel conversion of a plurality of forward error correction FEC blocks respectively. The FEC block is a bit stream data block output by channel coding, has a bit width of 1, and includes information bits and check bits. At the transmitting end of the T2 system, the data may be converted into, but not limited to, an 8-bit wide cell stream through serial-to-parallel conversion, and the bit width of the data to be transmitted is taken as an example to be specifically described below.
Step S302, through ping-pong operation, the data to be transmitted is written into the RAM according to the writing rule of cell interleaving.
The ping-pong operation means: the input data stream is isochronously distributed to two data buffer modules by an 'input data selection unit'. In the first buffering period, buffering the input data stream to a 'data buffering module I'; in the 2 nd buffering period, the input data stream is buffered to the data buffering module II through the switching of the input data selection unit, and meanwhile, the 1 st period data buffered by the data buffering module I is sent to the data stream operation processing module for operation processing through the selection of the output data selection unit; and in the 3 rd buffering period, the input data stream is buffered to the first data buffering module through switching of the input data selection unit, and meanwhile, the data in the 2 nd period buffered by the second data buffering module is switched through the output data selection unit and sent to the data stream operation processing module for operation processing. And the process is circulated. Buffer space can be saved through ping-pong operation, and high-speed data can be processed by the low-speed module.
Fig. 4 is a schematic diagram of jump sequence writing in a resource optimization method in baseband processing according to an embodiment of the present invention, where each cell represents a writing address of one cell, and each column in the diagram shows only a writing sequence of 5 addresses. As shown in fig. 4, the number of lines after each group of data to be transmitted is written is NcellsColumn number NfecWherein N iscellsIndicating the number of cells, N, corresponding to an FEC block after serial-to-parallel conversionfecIndicating the corresponding FEC block number in one cell interleaving module. And mapping the cells corresponding to each FEC block to the corresponding columns according to a writing rule, wherein the specific mapping rule is as follows:
let the data output by parallel-to-serial conversion be gr,qWherein r has a value ranging from 0 to Nfec-1; q ranges from 0 to Ncells-1; is provided with
Wherein,
is the address to be written, then
Lr(q)＝[L0(q)+P(r)]modNcellsWhere P (r) is the starting offset address of each column, L0(q) is the corresponding write address for each column without offset.
First, L is given0(q) rules. Let NcellsIs NdI.e. Nd＝[log2(Ncells)]Setting a bit width of NdArray S composed of data ofiWherein i is 0, 1, 2 ·Nd-1。
Then SiThe value rule of each bit is as follows:
Si[Nd-1]＝(i mod 2)；
i＝0，1：
Si[Nd-2,Nd-3,…1,0]＝0,0,…,0,0
i＝2：
S2[Nd-2,Nd-3,…1,0]＝0,0,…,0,1
2<i<2Nd：
Si[Nd-3,Nd-4,…1,0]＝Si-1[Nd-2,Nd-3,…2,1]；
when N is presentdWhen the number is equal to 11,
when N is presentdWhen the number is equal to 12, the number is as follows,
when N is presentdWhen the number is equal to 13, the number is as follows,
when N is presentdWhen the number is equal to 14, the number is 14,
when N is presentdWhen the number is 15,
to obtain SiAfter, L0(q) is equal to SiMiddle throw off is greater than NcellsThe process is as follows:
next, the rule of P (r) is given, let QkIs bit wide as NcellsValue from 0 to 2NcellsAn incremental array of-1, let QkData of' are QkThe data bit of each data is inverted, then P (r) is Qk' middle planing is greater than NcellsThe process is as follows:
storing the serial-parallel converted data into RAM with cell interleaving according to the above rule, wherein the RAM has a pair of 8 bit wide and (N) depthcells×Nfec) The ping-pong RAM of (1).
Step S303, according to the output rule of time interleaving, directly reading out the cell after the data to be transmitted is out of order from the RAM.
Fig. 5 is a schematic diagram of a time interleaving rule according to an embodiment of the present invention, and as shown in fig. 5, the time interleaving rule is listed, where Nr is Ncells/5，Nc＝5×Nfec。
Since the sizes of the RAM spaces of the cell interleaving and the time interleaving are the same, the data to be transmitted written in the cell interleaving is directly read out according to the output rule of the time interleaving, the same effect can be obtained, and the obtained data is the original data when constellation rotation is not performed.
Step S304, the output cell is carried out the constellation mapping operation to obtain the constellation point data corresponding to the data to be transmitted.
And constellation mapping is carried out on the output cells according to a constellation mapping mode, the cells are mapped to corresponding constellation points, and the bit width of the mapped constellation point data is 32 (16 bits in a real part and 16 bits in an imaginary part).
In this embodiment, after the constellation mapping is shifted to time interleaving, the data bit width of the interleaving module is 8, so that the RAM resources occupied by the above steps in fig. 3 are: (8 XN)cells×NfecX 2). When there is no constellation rotation, the RAM resources occupied by the prior art are: (32 XN)cells×Nfec×2+32×Ncells×NfecX 2), it can be seen that the RAM resource occupied by the present embodiment is only 1/8 in the prior art, thereby increasing the operating speed of the T2 system.
Fig. 6 is a schematic flowchart of another resource optimization method in baseband processing according to an embodiment of the present invention, where based on fig. 3, the method adds constellation rotation operation. In order to realize constellation rotation, a ping-pong operation is added before the constellation rotation operation, as shown in fig. 6, the method includes the following steps:
step S601, receiving data to be transmitted output by the serial-parallel conversion module.
Step S602, writing the data to be transmitted into the RAM according to the writing rule of cell interleaving through ping-pong operation.
Step S603, according to the time-interleaved output rule, directly reading out the cell after the data to be transmitted is out of order from the RAM.
Step S604, the output cell is subjected to constellation mapping operation to obtain constellation point data corresponding to the data to be transmitted.
Step S605, after performing ping-pong operation on the constellation point data, performing constellation rotation operation to obtain constellation point data after constellation rotation.
By a pair of bit width of 32 and depth of (N)cells×Nfec) The ping-pong RAM sends the constellation point data to the constellation rotation module to perform constellation rotation operation, and constellation point data after constellation rotation can be obtained. Constellation rotation is prior art and will not be described in detail here.
The RAM resources occupied by the above method when constellation rotation is provided in this embodiment are: (8 XN)cells×Nfec×2+32×Ncells×NfecX 2). When the constellation rotates, the RAM resources occupied by the prior art are: (32 XN)cells×2+32×Ncells×Nfec×2+32×Ncells×NfecX 2), it can be seen that the RAM resource occupied by the present embodiment is less than 0.625 in the prior art, thereby increasing the operating speed of the T2 system.
In order to further reduce the RAM resources occupied by constellation rotation, another resource optimization method in baseband processing is provided in the embodiments of the present invention, as shown in fig. 7, the method includes the following steps:
step S701, receiving data to be transmitted output by the serial-parallel conversion module.
Step S702, writing the data to be transmitted into the RAM according to the writing rule of cell interleaving through ping-pong operation.
Step S703 reads out two paths of interleaved data from the RAM, where the two paths of interleaved data are two consecutive cells before cell interleaving, and one path of interleaved data is a cell after data to be transmitted is directly read out from the RAM out of order according to an output rule of time interleaving.
When constellation rotation is used, the data because of constellation rotation operation is gr,qAnd gr,q-1Wherein q is 0 to Ncells-1, g when q is 0r,q-1Is composed of
Let gr,qAnd gr,q-1The positions of the writing cell interleaving modules are respectively
And
therefore, in this embodiment, when outputting
When the cell of the position is at the same time
And (4) outputting the cell of the position, namely outputting two paths of interleaving data simultaneously. By directly outputting two paths of interleaving data for constellation rotation in interleaving, ping-pong operation is not needed before constellation rotation, so that RAM resources occupied by ping-pong operation are further reduced.
Step S704, performing constellation mapping operation on the two output interleaved data to obtain two constellation data corresponding to the data to be transmitted.
Step S705, performing constellation rotation operation on the two paths of constellation data to obtain constellation data after constellation rotation.
The constellation rotation principle is as follows:
wherein e is0、eqAll represent cell positions after constellation rotation; rRQDIs a rotation factor, depending on the constellation mapping manner; since constellation rotation is column independent, in step S703 above
Are respectively denoted herein
Since the two-way interleaved data outputted in step S703 are just two consecutive cells before cell interleaving (when one of them is the first cell of the FEC block, it corresponds to the last cell of the FEC block), the output result at this time is just the same as the prior art.
In this embodiment, since the input of constellation rotation directly includes two paths of data for rotation, RAM storage is not needed, that is, when there is constellation rotation, the RAM resource used by the method provided in this embodiment is (8 × N)cells×NfecX 2), and the RAM resources occupied by the prior art are: (32 XN)cells×2+32×Ncells×Nfec×2+32×Ncells×NfecX 2), it can be seen that the RAM resource occupied by the present embodiment is much smaller than 1/8 in the prior art, thereby improving the performance of the T2 systemThe speed of operation.
Example two:
corresponding to the method in the first embodiment, an embodiment of the present invention further provides a resource optimization device in baseband processing, where the device is also applied to a sending end of a DVB-T2 system, as shown in fig. 8, the device includes a cell interleaving and time interleaving fusion module 80, and the cell interleaving and time interleaving fusion module 80 includes:
a data acquisition unit 81 configured to acquire data to be transmitted;
a write unit 82, configured to write the data to be transmitted into the RAM according to a write rule of cell interleaving;
and a reading unit 83, configured to read the written data to be transmitted from the RAM according to the output rule of time interleaving.
In the embodiment of the invention, the data to be transmitted is firstly acquired, then the data to be transmitted is written into the RAM according to the writing rule of cell interleaving, and the written data to be transmitted is read out from the RAM according to the output rule of time interleaving. The resource optimization device in baseband processing provided by this embodiment combines cell interleaving and time interleaving into one through the cell interleaving and time interleaving fusion module 80, so that while the error rate is ensured, the RAM resource occupied by the cell interleaving and the time interleaving is reduced to half of the original RAM resource, the occupied RAM resource is reduced, and the operating speed of the T2 system is improved.
Fig. 9 is a schematic structural diagram of another resource optimization apparatus in baseband processing according to an embodiment of the present invention, and as shown in fig. 9, the cell interleaving and time interleaving fusion module 80 is connected to a serial-to-parallel conversion module 90, and the data obtaining unit 81 is specifically configured to: receiving data to be transmitted output by the serial-parallel conversion module 90; the data to be transmitted is composed of corresponding cells after serial-to-parallel conversion of a plurality of forward error correction FEC blocks respectively.
As shown in fig. 9, on the basis of fig. 8, the apparatus further includes: the constellation mapping module 91 is configured to perform constellation mapping operation on the data to be transmitted read by the reading unit 83 to obtain constellation point data corresponding to the data to be transmitted.
In some possible embodiments, the readout unit 83 is specifically configured to: and directly reading out the disordered cells of the data to be transmitted from the RAM according to the time-interleaved output rule.
In other possible embodiments, the readout unit 83 is specifically configured to: reading out two paths of interweaving data from the RAM, wherein the two paths of interweaving data are two continuous cells before cell interweaving, and the one path of interweaving data is the cell which is directly read out from the RAM and has data to be transmitted out of order according to the output rule of time interweaving. At this time, the constellation point data includes two paths of constellation data corresponding to the two paths of interleaving data, as shown in fig. 9, the apparatus further includes: and the constellation rotating module 92 is configured to perform constellation rotating operation on the two paths of constellation data to obtain constellation data after constellation rotation.
In fig. 9, the data (bit width is 8) output from the serial-to-parallel conversion module 90 directly passes through a pair of bits (bit width is 8) and depth is (N)cells×Nfec) The cell and time interleaving (ping-pong operation) is completed by the RAM, then the cell and time interleaving is performed by the constellation mapping module 91 (the bit width is changed into 32), and then the constellation rotating module 92 (the bit width is 32), because the input of the constellation rotating module 92 directly comprises two paths of data for rotation, the RAM is not required to be stored, so the RAM resource used by the device is (8 × N)cells×Nfec×2)。
Example three:
referring to fig. 10, an embodiment of the present invention further provides an electronic device 100, including: a processor 1001, a memory 1002, a bus 1003 and a communication interface 1004, wherein the processor 1001, the communication interface 1004 and the memory 1002 are connected through the bus 1003; the processor 1001 is used to execute executable modules, such as computer programs, stored in the memory 1002.
The Memory 1002 may include a high-speed Random Access Memory (RAM) and may further include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. The communication connection between the network element of the system and at least one other network element is realized through at least one communication interface 1004 (which may be wired or wireless), and the internet, a wide area network, a local network, a metropolitan area network, and the like can be used.
The bus 1003 may be an ISA bus, PCI bus, EISA bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one double-headed arrow is shown in FIG. 10, but this does not indicate only one bus or one type of bus.
The memory 1002 is used for storing a program, and the processor 1001 executes the program after receiving an execution instruction, and the method executed by the apparatus defined by the flow process disclosed in any of the foregoing embodiments of the present invention may be applied to the processor 1001, or implemented by the processor 1001.
The processor 1001 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be implemented by integrated logic circuits of hardware or instructions in the form of software in the processor 1001. The Processor 1001 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the device can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 1002, and the processor 1001 reads the information in the memory 1002 and performs the steps of the method in combination with the hardware.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the apparatus and the electronic device described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
The resource optimization device and the electronic device in baseband processing provided by the embodiment of the invention have the same technical characteristics as the resource optimization method in baseband processing provided by the embodiment of the invention, so that the same technical problems can be solved, and the same technical effects can be achieved.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The computer program product for performing the resource optimization method in the baseband processing according to the embodiment of the present invention includes a computer-readable storage medium storing a nonvolatile program code executable by a processor, where instructions included in the program code may be used to execute the method described in the foregoing method embodiment, and specific implementation may refer to the method embodiment, which is not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed method, apparatus, and electronic device may be implemented in other manners. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a non-volatile computer-readable storage medium executable by a processor. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present invention, which are used for illustrating the technical solutions of the present invention and not for limiting the same, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope of the present disclosure; such modifications, changes or substitutions do not depart from the spirit and scope of the embodiments of the present invention, and they should be construed as being included therein. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A resource optimization method in baseband processing is applied to a transmitting end of a DVB-T2 system, and the method comprises the following steps:
acquiring data to be transmitted;
writing the data to be transmitted into the RAM according to the writing rule of cell interleaving;
reading the written data to be transmitted from the RAM according to the time-interleaved output rule;
and carrying out constellation mapping operation on the data to be transmitted read out from the RAM to obtain constellation point data corresponding to the data to be transmitted.
2. The method of claim 1, wherein the obtaining data to be transmitted comprises:
receiving data to be transmitted output by the serial-parallel conversion module; the data to be transmitted is composed of corresponding cells after serial-to-parallel conversion of a plurality of forward error correction FEC blocks respectively.
3. The method according to claim 2, wherein the reading out the written data to be transmitted from the RAM according to the time-interleaved output rule comprises:
and directly reading out the disordered cells of the data to be transmitted from the RAM according to the time-interleaved output rule.
4. The method of claim 3, further comprising:
and performing ping-pong operation on the constellation point data, and then performing constellation rotation operation to obtain constellation point data after constellation rotation.
5. The method according to claim 2, wherein the reading out the written data to be transmitted from the RAM according to the time-interleaved output rule comprises:
reading two paths of interleaved data from the RAM, wherein the two paths of interleaved data are two continuous cells before cell interleaving, and one path of interleaved data is a cell which is directly read from the RAM and in which the data to be transmitted is out of order according to the output rule of time interleaving;
the constellation point data includes two constellation data corresponding to the two interleaved data, and the method further includes:
and carrying out constellation rotation operation on the two paths of constellation data to obtain constellation data after constellation rotation.
6. A resource optimization device in baseband processing is characterized in that the device is applied to a sending end of a DVB-T2 system, and the device comprises a cell interleaving and time interleaving fusion module, wherein the cell interleaving and time interleaving fusion module comprises:
the data acquisition unit is used for acquiring data to be transmitted;
a write-in unit, which is used for writing the data to be transmitted into the RAM according to the write-in rule of cell interleaving;
the reading unit is used for reading the written data to be transmitted from the RAM according to the output rule of time interleaving;
and the constellation mapping module is used for carrying out constellation mapping operation on the data to be transmitted read out from the reading unit to obtain constellation point data corresponding to the data to be transmitted.
7. The apparatus according to claim 6, wherein the data acquisition unit is specifically configured to:
receiving data to be transmitted output by the serial-parallel conversion module; the data to be transmitted is composed of corresponding cells after serial-to-parallel conversion of a plurality of forward error correction FEC blocks respectively.
8. The apparatus of claim 7, wherein the readout unit is specifically configured to:
and directly reading out the disordered cells of the data to be transmitted from the RAM according to the time-interleaved output rule.
9. The apparatus of claim 7, wherein the readout unit is specifically configured to:
reading two paths of interleaved data from the RAM, wherein the two paths of interleaved data are two continuous cells before cell interleaving, and one path of interleaved data is a cell which is directly read from the RAM and in which the data to be transmitted is out of order according to the output rule of time interleaving;
the constellation point data includes two constellation data corresponding to the two interleaved data, and the apparatus further includes:
and the constellation rotation module is used for carrying out constellation rotation operation on the two paths of constellation data to obtain constellation data after constellation rotation.
10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method of any of claims 1 to 5 when executing the computer program.
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