CN108022548A - Drive control method therefor, gate driving circuit and display device - Google Patents
Drive control method therefor, gate driving circuit and display device Download PDFInfo
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- CN108022548A CN108022548A CN201810103391.8A CN201810103391A CN108022548A CN 108022548 A CN108022548 A CN 108022548A CN 201810103391 A CN201810103391 A CN 201810103391A CN 108022548 A CN108022548 A CN 108022548A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
Present disclose provides a kind of drive control method therefor, gate driving circuit and display device.Applied to display technology field.The drive control method therefor includes：First switch unit, for being turned under the control of the signal of first node, the output signal of the first shift register is inputted to the second shift register；First compensating unit, for being turned under the control of power supply signal, first node is transmitted to by first direction selection signal；First coupling unit, is connected between the second shift register and first node；Second switch unit, for being turned under the control of the signal of section point, the output signal of the 3rd shift register is inputted to the second shift register；Second compensating unit, for being turned under the control of power supply signal, section point is transmitted to by second direction selection signal；Second coupling unit, is connected between the second shift register and section point.The signal that the disclosure can export drive control method therefor compensates.
Description
Technical field
This disclosure relates to display technology field, more particularly to a kind of drive control method therefor, gate driving circuit and
Display device.
Background technology
With the development of optical technology and semiconductor technology, with liquid crystal display (Liquid Crystal Display,
LCD) and organic light emitting diode display (Organic Light Emitting Diode, OLED) be representative FPD
Utensil has the features such as body is frivolous, energy consumption is low, reaction speed is fast, excitation purity is good and contrast is high, is widely used in each
Electron-like is shown in product.
At present, display device mainly realizes its display function by picture element matrix.In the worked of display device
Cheng Zhong, is converted into control pixel by modules such as shift registers by the signal of input by gate driving circuit and turns on/off
Scanning signal, then the scanning signal is sequentially applied on the scanning grid line of each row pixel of display device, to realize to each
The gating of row pixel.
The scan mode of gate driving circuit mainly includes simple scanning and bilateral scanning.Grid with bilateral scanning function
Pole drive circuit has special application in some cases ...Such as, it is possible to achieve Circuit verification, that is, verify the bad specific of circuit
Which row appeared in；Furthermore it is also possible in the case where realizing not change data signal transmission order, realize as shown in Figure 1
Image Reversal etc..
In gate driving circuit when realizing bilateral scanning function, generally require to set drive control method therefor.It is but existing
There is the drive control method therefor in technology to still suffer from the part that is left to be desired, such as the output signal wave of drive control method therefor
There is delay and compared with large deformation in shape.
It should be noted that information is only used for strengthening the reason to the background of the disclosure disclosed in above-mentioned background section
Solution, therefore can include not forming the information to the prior art known to persons of ordinary skill in the art.
The content of the invention
The purpose of the disclosure is to provide a kind of drive control method therefor and scanning direction control method, display device,
And then the defeated of caused by the limitation of correlation technique and defect drive control method therefor is overcome at least to a certain extent
Go out the problem of signal waveform is in the presence of delay and compared with large deformation.
According to one aspect of the disclosure, there is provided a kind of drive control method therefor, including：
First switch unit, for being turned under the control of the signal of first node, by the defeated of the first shift register
Go out signal to input to second shift register adjacent with first shift register；
First compensating unit, for being turned under the control of power supply signal, institute is transmitted to by first direction selection signal
State first node；
First coupling unit, is connected between second shift register and the first node；
Second switch unit, for being turned under the control of the signal of section point, by the defeated of the 3rd shift register
Go out signal to input to second shift register adjacent with the 3rd shift register；
Second compensating unit, for being turned under the control of the power supply signal, second direction selection signal is transmitted
To the section point；
Second coupling unit, is connected between second shift register and the section point.
In a kind of exemplary embodiment of the disclosure, the first switch unit includes the first transistor, and described first mends
Repaying unit includes second transistor, and the second switch unit includes third transistor, and second compensating unit includes the 4th
Transistor, first coupling unit include the first capacitance, and second coupling unit includes the second capacitance.
In a kind of exemplary embodiment of the disclosure, wherein：
The control terminal of the first transistor is connected with the first node, first end and first shift register
Output terminal connection, second end are connected with the input terminal of second shift register；
The control terminal of the second transistor receives the power supply signal, first end receives the first direction selection letter
Number, second end is connected with the first node；
The first end of first capacitance is connected with the input terminal of second shift register, second end and described first
Node connects；
The control terminal of the third transistor is connected with the section point, first end and the 3rd shift register
Output terminal connection, second end are connected with the input terminal of second shift register；
The control terminal of 4th transistor receives the power supply signal, first end receives the second direction selection letter
Number, second end is connected with the section point；
The first end of second capacitance is connected with the input terminal of second shift register, second end and described second
Node connects.
In a kind of exemplary embodiment of the disclosure, the characterisitic parameter of the first transistor and the second transistor
Characterisitic parameter is identical；The characterisitic parameter of the third transistor is identical with the characterisitic parameter of the 4th transistor.
In a kind of exemplary embodiment of the disclosure, first to fourth transistor is P-type TFT, described
Power supply signal is low level signal.
In a kind of exemplary embodiment of the disclosure, first to fourth transistor is N-type TFT, described
Power supply signal is high level signal.
In a kind of exemplary embodiment of the disclosure, first to fourth transistor be amorphous silicon film transistor,
Metal oxide thin-film transistor or low-temperature polysilicon film transistor.
In a kind of exemplary embodiment of the disclosure, the phase of first direction selection signal and the second direction selection signal
Position is opposite.
According to one aspect of the disclosure, there is provided a kind of gate driving circuit, including described in multiple above-mentioned any one
Drive control method therefor and multiple shift registers of cascade；Wherein：
The letter of the first switch unit and M-1 grades of shift registers in drive control method therefor described in m-th
The connection of number output terminal, second switch unit are connected with the signal output part of M+1 grades of shift registers, and are scanned described in m-th
The output terminal of directional control circuit is connected with the input terminal of M grades of shift registers.
According to one aspect of the disclosure, there is provided a kind of display device, including the raster data model described in above-mentioned any one
Circuit.
In a kind of drive control method therefor that a kind of exemplary embodiment of the disclosure provides, by setting the first compensation single
Member and the first coupling unit, can in a first direction selection signal gate when, the threshold voltage of the first compensating unit is passed through
Coupling unit is coupled to the output terminal of drive control method therefor, and then can be to being led due to the threshold voltage of first switch unit
The signal delay of cause and signal deformation compensate；By setting the second compensating unit and the second coupling unit, Neng Gou
When second direction selection signal gates, the threshold voltage of the second compensating unit is controlled by coupling unit coupled to scanning direction
The output terminal of circuit, so can to signal delay caused by the threshold voltage due to second switch unit and signal deformation into
Row compensation.Since the output signal of drive control method therefor is compensated, it can make it that present shift register is defeated
The scanning signal gone out is more accurate, and then can realize more preferable display effect.
It should be noted that information is only used for strengthening the reason to the background of the disclosure disclosed in above-mentioned background section
Solution, therefore can include not forming the information to the prior art known to persons of ordinary skill in the art.
Brief description of the drawings
It is described in detail its exemplary embodiment by referring to accompanying drawing, the above and other feature and advantage of the disclosure will become
Obtain more obvious.It should be evident that drawings in the following description are only some embodiments of the present disclosure, it is common for this area
For technical staff, without creative efforts, other attached drawings can also be obtained according to these attached drawings.Attached
In figure：
Fig. 1 is the schematic diagram of Image Reversal；
Fig. 2 is a kind of structure diagram of gate drivers in correlation technique；
Fig. 3 is a kind of structure diagram of drive control method therefor in correlation technique；
Fig. 4 is the output signal simulation figure of drive control method therefor in Fig. 3；
Fig. 5 is a kind of structure diagram of drive control method therefor in disclosure exemplary embodiment；
Fig. 6 is a kind of structure diagram of drive control method therefor in disclosure exemplary embodiment；
Fig. 7 is a kind of structure diagram of gate drivers in disclosure exemplary embodiment；
Fig. 8 is the output signal simulation figure of drive control method therefor in Fig. 6；
Fig. 9 is a kind of structure diagram of drive control method therefor in disclosure exemplary embodiment；
Figure 10 is a kind of structure diagram of display device in disclosure exemplary embodiment.
Embodiment
Example embodiment is described more fully with referring now to attached drawing.However, example embodiment can be real in a variety of forms
Apply, and be not understood as limited to embodiment set forth herein；On the contrary, these embodiments are provided so that the disclosure will be comprehensively and complete
It is whole, and the design of example embodiment is comprehensively communicated to those skilled in the art.Described feature, structure or characteristic can
To be incorporated in any suitable manner in one or more embodiments.In the following description, there is provided many details from
And provide and embodiment of the disclosure is fully understood.It will be appreciated, however, by one skilled in the art that the disclosure can be put into practice
Technical solution is without one or more in the specific detail, or can use other methods, constituent element, material, dress
Put, step etc..In other cases, it is not shown in detail or describes each side of the known solution to avoid the fuzzy disclosure.
In addition, attached drawing is only the schematic illustrations of the disclosure, not necessarily it is drawn to scale.Identical attached drawing in figure
Mark identifies the same or similar part, thus will omit repetition thereof.
In the related art, by cmos device, such as phase inverter, transmission gate in cmos device etc., it is easy to real
Existing drive control method therefor.Refering to what is shown in Fig. 2, be a kind of gate driving circuit with bilateral scanning function, main bag
The shift register SR1 of cascade is included to shift register SR5, and drive control method therefor；Wherein, scanning direction control electricity
Road is mainly made of transmission gate.Passed for example, being controlled by first direction selection signal SEL1 to fourth direction selection signal SEL4
Defeated door TG2, TG3, TG6, TG7 conducting, you can realize the forward scan of gate driving circuit, i.e. scanning direction is from shift LD
Device SR1 to shift register SR5；Pass through first direction selection signal SEL1 to fourth direction selection signal SEL4 controlling transmission doors
TG8, TG5, TG4, TG1 are turned on, you can realize the reverse scan of gate driving circuit, i.e. scanning direction is from shift register
SR5 to shift register SR1.
But in current plane Display Technique, the use for above-mentioned cmos device is less, usually using only PMOS device
Or using only nmos device.As shown in Figure 3, it is in correlation technique, the scanning direction formed using only PMOS device controls
Circuit GC, it mainly includes the first transistor M1 and third transistor M3；Fig. 4 is the output signal of drive control method therefor GC
Simulation result.As can be seen that the signal of shift register SR3 outputs passes through the first transistor M1 or shift register SR5
The signal of output can produce delay and signal deformation after third transistor M3, be unable to reach the minimum of initial signal.This
Problem be caused by the threshold voltage vt h of the first transistor M1 and third transistor M3, can not be by optimizing the first transistor
The size of M1 and third transistor M3 eliminates.
In view of the above-mentioned problems, it provide firstly a kind of drive control method therefor in this example embodiment.With reference to Fig. 5 institutes
Show, which can include：First switch unit, the first compensating unit, the first coupling unit, second switch
Unit, the second compensating unit and the second coupling unit.Wherein, the first switch unit can be used for first node N1's
Turned under the control of signal, the output signal of the first shift register is inputted to adjacent with first shift register
Second shift register；First compensating unit can be used under the control of power supply signal turning on, and first direction is selected to believe
Number SEL1 is transmitted to the first node N1；First coupling unit is connected to second shift register and the first node
Between N1；Second switch unit can be used under the control of the signal of section point N2 turning on, by the 3rd shift register
Output signal input to second shift register adjacent with the 3rd shift register；Second compensating unit can be with
For being turned under the control of the power supply signal, second direction selection signal SEL2 is transmitted to the section point N2；
Second coupling unit, is connected between second shift register and the section point N2.
In the drive control method therefor of the present exemplary embodiment, by setting the first compensating unit and the first coupling
Unit, can in a first direction selection signal SEL1 gate when, the threshold voltage of the first compensating unit is passed through into coupling unit coupling
The output terminal of drive control method therefor is bonded to, and then signal caused by the threshold voltage due to first switch unit can be prolonged
Late and signal deformation compensates；By setting the second compensating unit and the second coupling unit, can be selected in second direction
When selecting signal SEL2 gatings, by the threshold voltage of the second compensating unit by coupling unit coupled to drive control method therefor
Output terminal, and then signal delay caused by the threshold voltage due to second switch unit and signal deformation can be mended
Repay.Since the output signal of drive control method therefor is compensated, it can cause what present shift register exported
Scanning signal is more accurate, and then can realize more preferable display effect.
In the following, more detailed introduction will be carried out to each several part of drive control method therefor in the present exemplary embodiment.
Refering to what is shown in Fig. 6, in this example embodiment, the first switch unit can include the first transistor M1, institute
Second transistor M2 can be included by stating the first compensating unit, and the second switch unit can be described including third transistor M3
Second compensating unit can include the 4th transistor M4, and first coupling unit can include the first capacitance C1, and described second
Coupling unit can include the second capacitance C2.For example, the first transistor M1 to the 4th transistor M4 can be non-
Crystal silicon (a-Si) thin film transistor (TFT), or be low temperature polycrystalline silicon (LTPS) thin film transistor (TFT), can also be metal oxide
(Oxide) thin film transistor (TFT) etc.；The type of the first capacitance C1 and the second capacitance C2 can make choice according to demand, example
Such as, the capacitance can be mos capacitance, metal capacitance or double polycrystalline capacitances etc., and it is special that the present exemplary embodiment does not make this
Limit.Certainly, in other exemplary embodiments of the disclosure, which can also have other kinds of open
Close device or capacitor element is formed, this also belongs to the protection domain of the disclosure.
With continued reference to shown in Fig. 6, the first transistor M1, second transistor M2, third transistor M3 and the 4th are brilliant
Body pipe M4 is respectively provided with control terminal, first end and second end.Wherein, the control terminal of the first transistor M1 and the first segment
Point N1 connections, the first end (i.e. first input end IN1) of the first transistor M1 and the output of first shift register
End connection, the second end (i.e. output terminal OUT) of the first transistor M1 are connected with the input terminal of second shift register.
Described in the first end of control terminal reception the power supply signal VGL, the second transistor M2 of the second transistor M2 receive
First direction selection signal SEL1, the second end of the second transistor M2 are connected with the first node N1.First electricity
The first end for holding C1 is connected with the input terminal of second shift register, the second end and described first of the first capacitance C1
Node N1 connections.The control terminal of the third transistor M3 is connected with the section point N2, and the of the third transistor M3
(i.e. the second input terminal IN2) is connected with the output terminal of the 3rd shift register for one end, and the second of the third transistor M3
End (i.e. output terminal OUT) is connected with the input terminal of second shift register.The control terminal of the 4th transistor M4 receives
The first end of the power supply signal VGL, the 4th transistor M4 receives the second direction selection signal SEL2, and the described 4th
The second end of transistor M4 is connected with the section point N2.The first end of the second capacitance C2 and second shift LD
The input terminal connection of device, the second end of the second capacitance C2 are connected with the section point N2.
In this example embodiment, the first end of each transistor can be the source electrode of transistor, each crystal
The second end of pipe can be the drain electrode of transistor, and the control terminal of each transistor is the grid of transistor.Certainly, show at other
In example property embodiment, the first end of each transistor can also be the drain electrode of transistor, the second end of each transistor
It can be the source electrode of transistor, particular determination is not done to this in the disclosure.
Further, accurately compensated in order to ensure realizing, in this example embodiment, the spy of the second transistor M2
Property parameter is preferably identical with the characterisitic parameter of the first transistor M1；The characterisitic parameter of the 4th transistor M4 preferably with institute
The characterisitic parameter for stating third transistor M3 is identical.For example, the first transistor M1 and the second transistor M2 can be used
Same material, prepared by same technique, and the first transistor M1 and second transistor M2 has identical ruler
Very little (such as aspect ratio is mutually equal).Similar, the third transistor M3 and the 4th transistor M4 can use same material
Expect, prepared by same technique, and third transistor M3 and the 4th transistor M4 are of the same size (such as length and width
Than mutually equal).
Further, a kind of gate driving circuit is additionally provided in this example embodiment.It is described in reference diagram 7, the grid
Drive circuit except the first shift register SR1 including cascade, the second shift register SR2, the 3rd shift register SR3,
N number of shift registers such as the 4th shift register SR4, the 5th shift register SR5 (remaining more shift register is not shown),
Further include N number of drive control method therefor such as drive control method therefor GC1~GC5 (remaining more drive control method therefor
It is not shown)；Wherein, each drive control method therefor is the above-mentioned drive control method therefor of this example embodiment.
In above-mentioned gate driving circuit, the first switch unit in drive control method therefor described in m-th with
The signal output part of the signal output part connections of M-1 grades of shift registers, second switch unit and M+1 grades of shift registers
Connection, and the output terminal of drive control method therefor described in m-th is connected with the input terminal of M grades of shift registers；Wherein, 1<
M<N。
For example, by taking the 3rd drive control method therefor GC3 as an example, it will be appreciated from fig. 6 that drive control method therefor GC3
The first transistor M1 first end, that is, first input end IN1, the first of the second transistor M2 of drive control method therefor GC3
The second end of end i.e. the second input terminal IN1, the first transistor M1 and second transistor M2 of drive control method therefor GC3, that is, defeated
Outlet OUT；Wherein, the signal output of first input end IN1 and the 2nd grade of shift register SR2 of drive control method therefor GC3
Hold OUT connections, the defeated end OUT of signal of second input terminal IN2 and the 4th grade of shift register SR4 of drive control method therefor GC3
Connection, the output terminal OUT of drive control method therefor GC3 are connected with the input terminal IN of 3rd level shift register.Similar, sweep
The first input end IN1 for retouching directional control circuit GC4 is connected with the signal output part OUT of 3rd level shift register SR3, scanning
The second input terminal IN2 of directional control circuit GC4 is connected with the defeated end OUT of the signal of the 5th grade of shift register SR5, scanning direction
The output terminal OUT of control circuit GC4 is connected with the input terminal IN of the 4th grade of shift register.
In this example embodiment, the phase of the first direction selection signal SEL1 and second direction selection signal SEL2
Conversely；Can be that first direction selection signal SEL1 is favorable selection signal, second direction selection signal SEL2 is Negative selection
Signal；It is of course also possible to it is that first direction selection signal SEL1 is Negative selection signal, second direction selection signal SEL2 is just
To selection signal.It is P-type TFT with first to fourth transistor M4 in drive control method therefor GC3, it is described
Exemplified by power supply signal is low level signal VGL：
When first direction selection signal SEL1 is low level, second direction selection signal SEL2 is high level；Second is brilliant
Body pipe M2 and the 4th transistor M4 are in the conduction state, first direction selection signal SEL1 by second transistor M2 input to
First node N1, turns on the first transistor M1；Second direction selection signal SEL2 is inputted to second by the 4th transistor M4
Node N2, turns off third transistor M3.After the first transistor M1 conductings, the output signal transmission of the 2nd grade of shift register SR2
To the output terminal OUT of drive control method therefor GC3, and then it is transmitted to 3rd level shift register SR3；Meanwhile second transistor
The threshold voltage vt h of M2 is coupled to the output terminal OUT of drive control method therefor by the first capacitance C1, and then will can scan
The signal of the output terminal OUT of directional control circuit further drags down, and realizes the letter to the output terminal OUT of drive control method therefor
Number compensation, it is ensured that 3rd level shift register SR3, which is received, accurately enters signal.Similar, 3rd level shift register SR3
Output signal will be transmitted to the 4th grade of shift register SR4, the output signal of the 4th grade of shift register SR4 will be transmitted to the 5th
Level shift register SR5, and so on, realize forward scan.
When second direction selection signal SEL2 is low level, first direction selection signal SEL1 is high level；Second is brilliant
Body pipe M2 and the 4th transistor M4 are in the conduction state, first direction selection signal SEL1 by second transistor M2 input to
First node N1, turns off the first transistor M1；Second direction selection signal SEL2 is inputted to second by the 4th transistor M4
Node N2, turns on third transistor M3.After third transistor M3 conductings, the output signal transmission of the 4th grade of shift register SR4
To the output terminal OUT of drive control method therefor GC3, and then it is transmitted to 3rd level shift register SR3；Meanwhile the 4th transistor
The threshold voltage vt h of M4 is coupled to the output terminal OUT of drive control method therefor by the second capacitance C2, and then will can scan
The signal of the output terminal OUT of directional control circuit further drags down, and realizes the letter to the output terminal OUT of drive control method therefor
Number compensation, it is ensured that 3rd level shift register SR3, which is received, accurately enters signal.Similar, 3rd level shift register SR3
Output signal will be transmitted to the 2nd grade of shift register SR2, the output signal of the 2nd grade of shift register SR2 will be transmitted to the 1st
Level shift register SR1, and so on, realize reverse scan.
In addition, refering to what is shown in Fig. 8, in this example embodiment drive control method therefor output signal emulation knot
Fruit；Compare for Fig. 4, it can be seen that in this example embodiment the delay of the output signal of drive control method therefor and
Waveform is obviously improved.
In the above exemplary embodiments, it is to be carried out so that first to fourth transistor M4 is P-type TFT as an example
Explanation；But refering to what is shown in Fig. 9, in other exemplary embodiments of the disclosure, the first transistor M1 to the 4th crystal
Pipe M4 can also be N-type TFT, correspondingly, the power supply signal is high level signal VGH.Those skilled in the art
It is easily understood that being directed to different types of transistor, the level signal and its time sequence status of each signal end input can be sent out
Raw corresponding change.
This example embodiment also provides a kind of display device, and with reference to figure 10, display device 1000 can include display surface
Plate 1001 and above-mentioned gate driving circuit 1002.Due to the scanning signal of the output of included gate driving circuit 1002
It is more accurate, therefore the display device can realize more preferable display effect, progress can further lift user experience.
Further, the display device in this example embodiment can be liquid crystal display device, OLED (Organic
Light Emitting Diode, Organic Light Emitting Diode) display device, PLED (Polymer Light-Emitting
Diode, polymer LED) display device, PDP (Plasma Display Panel, plasma are shown) display device
Etc. a variety of panel display apparatus, it is not particularly limited here for the applicable of display device.
It should be noted that：The detail of each modular unit is controlled in corresponding scanning direction in the display device
It is described in detail in circuit processed, therefore which is not described herein again.
It should be noted that although some modules or list of the equipment for action executing are referred in above-detailed
Member, but this division is not enforceable.In fact, according to embodiment of the present disclosure, it is above-described two or more
Either the feature of unit and function can embody module in a module or unit.A conversely, above-described mould
Either the feature of unit and function can be further divided into being embodied by multiple modules or unit block.
Those skilled in the art will readily occur to the disclosure its after considering specification and putting into practice invention disclosed herein
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Person's adaptive change follows the general principle of the disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.Description and embodiments are considered only as exemplary, and the true scope and spirit of the disclosure are by appended
Claim is pointed out.
Claims (10)
- A kind of 1. drive control method therefor, it is characterised in that including：First switch unit, for being turned under the control of the signal of first node, the output of the first shift register is believed Number input is to second shift register adjacent with first shift register；First compensating unit, for being turned under the control of power supply signal, described is transmitted to by first direction selection signal One node；First coupling unit, is connected between second shift register and the first node；Second switch unit, for being turned under the control of the signal of section point, the output of the 3rd shift register is believed Number input is to second shift register adjacent with the 3rd shift register；Second compensating unit, for being turned under the control of the power supply signal, institute is transmitted to by second direction selection signal State section point；Second coupling unit, is connected between second shift register and the section point.
- 2. drive control method therefor according to claim 1, it is characterised in that the first switch unit includes first Transistor, first compensating unit include second transistor, and the second switch unit includes third transistor, and described second Compensating unit includes the 4th transistor, and first coupling unit includes the first capacitance, and second coupling unit includes second Capacitance.
- 3. drive control method therefor according to claim 2, it is characterised in that：The control terminal of the first transistor is connected with the first node, the output of first end and first shift register End connection, second end are connected with the input terminal of second shift register；The control terminal of the second transistor receives the power supply signal, first end receives the first direction selection signal, the Two ends are connected with the first node；The first end of first capacitance is connected with the input terminal of second shift register, second end and the first node Connection；The control terminal of the third transistor is connected with the section point, the output of first end and the 3rd shift register End connection, second end are connected with the input terminal of second shift register；The control terminal of 4th transistor receives the power supply signal, first end receives the second direction selection signal, the Two ends are connected with the section point；The first end of second capacitance is connected with the input terminal of second shift register, second end and the section point Connection.
- 4. the drive control method therefor according to Claims 2 or 3, it is characterised in that the characteristic of the first transistor Parameter is identical with the characterisitic parameter of the second transistor；The characterisitic parameter of the third transistor and the 4th transistor Characterisitic parameter is identical.
- 5. drive control method therefor according to claim 4, it is characterised in that first to fourth transistor is P-type TFT, the power supply signal are low level signal.
- 6. drive control method therefor according to claim 4, it is characterised in that first to fourth transistor is N-type TFT, the power supply signal are high level signal.
- 7. drive control method therefor according to claim 4, it is characterised in that first to fourth transistor is Amorphous silicon film transistor, metal oxide thin-film transistor or low-temperature polysilicon film transistor.
- 8. according to the drive control method therefor described in claims 1 to 3 or 5~7 any one, it is characterised in that first party To the opposite in phase of selection signal and the second direction selection signal.
- 9. a kind of gate driving circuit, including multiple drive control method therefors according to claim 1~8 any one And multiple shift registers of cascade；Wherein：The signal of the first switch unit and M-1 grades of shift registers in drive control method therefor described in m-th is defeated Outlet connection, second switch unit are connected with the signal output part of M+1 grades of shift registers, and scanning direction described in m-th The output terminal of control circuit is connected with the input terminal of M grades of shift registers.
- 10. a kind of display device, it is characterised in that including gate driving circuit according to claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810103391.8A CN108022548B (en) | 2018-02-01 | 2018-02-01 | Scanning direction control circuit, grid drive circuit and display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810103391.8A CN108022548B (en) | 2018-02-01 | 2018-02-01 | Scanning direction control circuit, grid drive circuit and display device |
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| Publication Number | Publication Date |
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| CN108022548A true CN108022548A (en) | 2018-05-11 |
| CN108022548B CN108022548B (en) | 2021-04-23 |
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| CN201810103391.8A Active CN108022548B (en) | 2018-02-01 | 2018-02-01 | Scanning direction control circuit, grid drive circuit and display device |
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| CN108022548B (en) | 2021-04-23 |
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