CN108009348A - Plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay - Google Patents
Plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay Download PDFInfo
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Abstract
The present invention relates to circuit sequence to optimize field, discloses a kind of plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay, including：Each logical device in circuit is traveled through, determines one group of optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination in circuit；The input bit matrixing that the plus/minus musical instruments used in a Buddhist or Taoist mass is combined, positive number input bit are stored in positive matrix number, and negative input bit is stored in negative matrix；According to the time delay of input bit, each row aligned respectively in matrix number and negative matrix are ranked up from short to long by time delay, come each row foremost by input bit time delay is shortest；According to the valid data row in the positive matrix number and negative matrix, N number of adder or subtracter, and the optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination described in the combination replacement of N number of adder or subtracter are created successively.The optimization method according to the order of input bit time delay from low to high by being calculated, and while the physics magnitude for reducing logic circuit is taken into account, maximumlly optimizes the sequential in RTL circuits.
Description
Technical field
The present invention relates to circuit sequence to optimize field, the plus/minus musical instruments used in a Buddhist or Taoist mass optimization method more particularly to based on input bit time delay.
Background technology
During RTL circuit synthesis, the problem of being one very common is optimized to one group of plus/minus musical instruments used in a Buddhist or Taoist mass.It is usually right
The optimization method of plus/minus musical instruments used in a Buddhist or Taoist mass is the physics series that one group of plus/minus musical instruments used in a Buddhist or Taoist mass tree-shaped is reduced to logic circuit, reaches optimization RTL
The target of logic circuit.For example, there is the physical arrangement of the plus/minus musical instruments used in a Buddhist or Taoist mass " a1+a2-a3-a4+a5+a6+a7-a8 " of one group of chain
As shown in Figure 1, by after this group of plus/minus musical instruments used in a Buddhist or Taoist mass tree-shaped, its physical arrangement is usually as shown in Figure 2.Adder chain after tree-shaped,
The physics series of plus/minus musical instruments used in a Buddhist or Taoist mass in RTL circuits can maximumlly be reduced.
The tree-shaped of plus/minus musical instruments used in a Buddhist or Taoist mass chain, can maximumlly reduce the physics series of the plus/minus musical instruments used in a Buddhist or Taoist mass in RTL circuits, so
And the minimum circuit of a physics series be not necessarily in sequential it is best.It does not optimize RTL circuits maximumlly
The Temporal dependency of middle plus/minus musical instruments used in a Buddhist or Taoist mass.For example, in optimization method shown in Fig. 2, if after ' a5+a6 ' calculates result, the number of a8
According to not reaching yet.Then a7 need not be after the data of a8 reach at this time, then subtract each other with a8, but can first with ' a5+a6 '
Results added, then subtracts each other with a8 again, its physical arrangement is as shown in Figure 3.Comparison diagram 3 and Fig. 2 can be seen that circuit shown in Fig. 3
Physics series and circuit shown in Fig. 2 want more level-ones, but its sequential is better than the circuit shown in Fig. 2.
Further, if the input terminal in Fig. 3 is all 8, and a5 [2:0] data are in a7 [2:0] reached after, i.e. phase
For a7 [2:0], a5 [2:0] there are more delays before reaching the input terminal of adder, its physical arrangement is as shown in Figure 4.
The circuit of tree-shaped can not realize the timing optimization to circuit as shown in Figure 4 at present, it is therefore desirable to when one kind is based on input bit
The plus/minus musical instruments used in a Buddhist or Taoist mass optimization method prolonged optimizes the circuit.
The content of the invention
It is an object of the invention to provide a kind of plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay, the optimization side
Method is taking into account the same of the physics magnitude of reduction logic circuit by being calculated according to the order of input bit time delay from low to high
When, maximumlly optimize the sequential in RTL circuits.
This application involves a kind of plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay, comprise the following steps：
Each logical device in circuit is traveled through, determines one group of optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination in circuit；
The input bit matrixing that the plus/minus musical instruments used in a Buddhist or Taoist mass is combined, positive number input bit are stored in positive matrix number, negative input
Position is stored in negative matrix；
According to the time delay of input bit, each row aligned respectively in matrix number and negative matrix are carried out from short to long by time delay
Sequence, comes each row foremost by input bit time delay is shortest；
According to the valid data row in the positive matrix number and negative matrix, N number of adder or subtracter are created successively, and
The optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination described in the combination replacement of N number of adder or subtracter；Wherein, N >=1.
It is described " according to the valid data row in the positive matrix number and negative matrix, to create successively in a preference
N number of adder or subtracter, and the optimizable plus/minus musical instruments used in a Buddhist or Taoist mass group described in the combination replacement of N number of adder or subtracter
The step of conjunction ", includes：
Two data rows of time delay minimum are chosen from the positive matrix number and negative matrix；
Adder or subtracter are created using described two data rows；
The newly-built adder or subtracter are realized using carry chain, and calculate carry-out bit；
If the positive matrix number and negative matrix add the carry-out bit of the calculating also there are effective data row
Into the positive matrix number or negative matrix；
Above step is repeated, until effective data row is not present in the positive matrix number and negative matrix；
Optimizable plus/minus musical instruments used in a Buddhist or Taoist mass described in the adder or the combination replacement of subtracter realized with the carry chain combines.
In a preference, optimizable plus/minus musical instruments used in a Buddhist or Taoist mass is combined and included in the definite circuit：
If in the combination of plus/minus musical instruments used in a Buddhist or Taoist mass in addition to least significant end adder or subtracter, other each adders or subtracter
An input terminal during output terminal is at least combined with the plus/minus musical instruments used in a Buddhist or Taoist mass connects, it is determined that is combined for optimizable plus/minus musical instruments used in a Buddhist or Taoist mass.
In a preference, two data rows that time delay minimum is chosen from the positive matrix number and negative matrix
Including：
In each data row of the positive matrix number and negative matrix, the time delay value that maximum is chosen from each data row is made
For the maximum delay of the data row, two data rows of selection maximum delay minimum.
In a preference, " two data rows for choosing maximum delay minimum " include：
Described two data rows both are from positive matrix number；Or
Described two data rows both are from negative matrix；Or
One comes from positive matrix number in described two data rows, another comes from negative matrix.
In a preference, the described two data rows of the use, which create adder or subtracter, to be included：
If described two data rows both are from positive matrix number, an adder is created；
If described two data rows both are from negative matrix, an adder is created；
If one comes from positive matrix number in described two data rows, another comes from negative matrix, then creating one subtracts
Musical instruments used in a Buddhist or Taoist mass.
In a preference, the carry-out bit by the calculating is added in the positive matrix number or negative matrix and wraps
Include：
If described two data rows both are from positive matrix number, the carry-out bit is added in positive matrix number；
If described two data rows both are from negative matrix, the carry-out bit is added in negative matrix；
If one comes from positive matrix number in described two data rows, another comes from negative matrix, according to matrix columns
Mesh, i.e. final output bit wide fill the sign bit of the carry-out bit, and are put into as signed number in positive matrix number.
In a preference, the plus/minus musical instruments used in a Buddhist or Taoist mass includes：Adder combination, or subtracter combination, or add
Musical instruments used in a Buddhist or Taoist mass and subtracter combination, or one or more three input the above adder, or one or more three input with
On subtracter.
In a preference, the plus/minus musical instruments used in a Buddhist or Taoist mass includes：The plus/minus musical instruments used in a Buddhist or Taoist mass combination of chain, or the plus/minus method of tree-shaped
Device.
In a preference, the carry chain is realized by one-bit full addres.
Embodiment of the present invention compared with prior art, at least with following difference and effect：
The computation sequence of the input of plus/minus musical instruments used in a Buddhist or Taoist mass optimization method adjustment different delayed time described herein, can more rapidly, more
IC design automated software is effectively helped to produce more preferable circuit sequence when logic synthesis optimizes.
Further, the optimization method optimizes the series of plus/minus musical instruments used in a Buddhist or Taoist mass group so that from the defeated of the plus/minus musical instruments used in a Buddhist or Taoist mass group
Enter the logic series smaller to output.And on the basis of optimization logic series, optimize the key of the plus/minus musical instruments used in a Buddhist or Taoist mass group
Sequential on path so that the delay for being input to output from the plus/minus musical instruments used in a Buddhist or Taoist mass group is shorter.
It is appreciated that within the scope of the present invention, above-mentioned each technical characteristic of the invention and below (such as embodiment and
Example) in specifically describe each technical characteristic between can be combined with each other, so as to form new or preferable technical solution.Limit
In length, not repeated them here.
Brief description of the drawings
Fig. 1 is the structure chart of one group of chain plus/minus musical instruments used in a Buddhist or Taoist mass in the prior art.
Fig. 2 is the structure chart of one group of plus/minus musical instruments used in a Buddhist or Taoist mass tree-shaped in the prior art.
Fig. 3 is a kind of structure chart of the plus/minus musical instruments used in a Buddhist or Taoist mass tree-shaped based on sequential in the prior art.
Fig. 4 is a kind of structure chart of the plus/minus musical instruments used in a Buddhist or Taoist mass tree that different input bits are delayed in the prior art.
Fig. 5 is a kind of signal of the plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay in the application first embodiment
Figure.
Fig. 6 is the structure chart that a kind of carry chain realizes addition and subtraction in the application first embodiment.
Fig. 7 is a kind of complement code subtraction exemplary plot in the application first embodiment.
Fig. 8 is that a carry chain realizes adder (1) in the embodiment of the present application.
Fig. 9 is that a carry chain realizes subtracter (2) in the embodiment of the present application.
Figure 10 is that a carry chain realizes adder (3) in the embodiment of the present application.
Embodiment
In the following description, many ins and outs are proposed in order to make reader more fully understand the application.But this
Even if the those of ordinary skill in field is appreciated that without these ins and outs and many variations based on following embodiment
And modification, it can also realize the application technical solution claimed.
This application involves term explanation：
Time delay：Refer to the terminal required time that a data are transmitted to component in integrated circuit.
Method at Register Transfer Level：Register Transfer Level (RTL), a kind of hardware circuit description of higher level
Method.
It is comprehensive：Synthesis, the process by high-level hardware description format change into low level hardware description form.
Adder：It is a kind of digital circuit part for being used to perform add operation, is to form the micro- place of electronic computer core
Manage the basis of arithmetic logic unit in device.
Subtracter：In digital circuit, the subtraction of binary number can be by adding a negative to complete indirectly.
Full adder：Two bits are added by full-adder, full adder, and according to the low order carry received
Signal, output and, carry-out.Three input signals of full adder are two addends A, B and low order carry Cin.[3] full adder
Usually the basic of multidigit (such as 8,16,32) addition of binary number device can be formed by way of cascading (cascade)
Part.
MSB：Most Significant Bit, highest significant position.
LSB：Least Significant Bit, least significant bit.
Arrival time：Arrival Time, refer to the time that signal reaches experience required for circuit designated position.
FPGA (Field-Programmable Gate Array), i.e. field programmable gate array, it be PAL,
The product further developed on the basis of the programming devices such as GAL, CPLD.It is as in application-specific integrated circuit (ASIC) field
A kind of semi-custom circuit and occur, not only solved the deficiency of custom circuit, but also overcome original programming device gate circuit
The shortcomings that number is limited.
Plus/minus musical instruments used in a Buddhist or Taoist mass：Combined including adder combination, or subtracter, or adder and subtracter combination, or
Person be one or more three input the above adders, or one or more three input the above subtracter；It is wherein described
It is one or more situations that combination, which includes number of devices,.
Complement code：It is a kind of method that number is shown with binary form, and a kind of mode of sign reversion by numeral,
Often used in computer science.The numeral is exactly made bit inversion computing (i.e. radix-minus-one complement) by one digital complement, then will knot
Fruit adds 1.In patch system, a positive number keeps original value constant, and a negative then corresponds to the complement code of positive number come table with it
Show.
Complement addition：In complement of two's two's complement system, digital addition is identical with general addition, and after the completion of computing just
It can be seen that the sign of result, is not required to particularly handle.
Complement code subtraction：It is generally converted to addition and carries out computing, subtrahend is taken into benefit and then carries out addition fortune with minuend
Calculate, you can must go on business.
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with implementation of the attached drawing to the present invention
Mode is described in further detail.
The application embodiment is related to a kind of plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay, and Fig. 5 is the application
A kind of schematic diagram of the plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay in one embodiment.The optimization side as shown in Figure 1
Method comprises the following steps：
Step 101, each logical device in circuit is traveled through, RTL circuits is optionally, whether is deposited in decision circuitry module
Combined in optimizable plus/minus musical instruments used in a Buddhist or Taoist mass, including：
Judge whether one group of plus/minus musical instruments used in a Buddhist or Taoist mass combination, least significant end adder or subtracter are removed in plus/minus musical instruments used in a Buddhist or Taoist mass combination
Outside, the input terminal connection during the output terminal of other each adders or subtracter is at least combined with the plus/minus musical instruments used in a Buddhist or Taoist mass.
If it is judged that being yes, there are the combination of optimizable plus/minus musical instruments used in a Buddhist or Taoist mass, then continue to optimize；
If it is judged that being no, there is no the combination of optimizable plus/minus musical instruments used in a Buddhist or Taoist mass, then terminate to optimize.
Then into step 102, the input matrix that the plus/minus musical instruments used in a Buddhist or Taoist mass is combined, positive number input bit is stored in positive number
In matrix, negative input bit is stored in negative matrix.In positive matrix number and negative matrix, first row represents sign bit.
In one embodiment, one group of chain plus/minus musical instruments used in a Buddhist or Taoist mass is " a1+a2-a3-a4+a5+a6+a7-a8 ", it is inputted
Storage mode in matrix is as shown in table 1：
1 matrix storage mode of table
Then into step 103, according to the time delay of input bit, align respectively each row in matrix number and negative matrix by
Time delay is ranked up from short to long, comes each row foremost by input bit time delay is shortest.
Then into step 104, two data rows of time delay minimum are taken out from two matrixes, are comprised the following steps：
Maximum delay of the time delay value of maximum as the data row is chosen from each data row, it is minimum to choose maximum delay
Two data rows, including：
Two minimum data rows both are from positive matrix number；Or
Two minimum data rows both are from negative matrix；Or
Two minimum data row a line come from positive matrix number, and another row comes from negative matrix.
Then into step 105, an adder or subtracter are created using two data rows of above-mentioned selection, including：
If two data rows both are from positive matrix number, an adder is created；
If two data rows both are from negative matrix, an adder is created；
If in two data rows one from positive matrix number, another come from negative matrix, a newly-built subtracter.
In circuit design, binary add/subtraction is realized usually using complement code mode.Fig. 7 illustrates output bit wide
For 8 when " 7-8 " two kinds of complement code subtraction processes.When result of calculation " 11111111 " is used as signed number, represent " -1 "
Complement code.Fig. 7 (a) is first completion input terminal sign bit, then the process calculated, it needs 8 full adders to realize；Fig. 7 (b) is
First calculate, then the process of completion output terminal sign bit, it only needs 4 full adders to realize.Fig. 7 (b) institutes are used in the present invention
The mode shown carries out addition and subtraction calculating.Therefore input of the result of calculation of complement code plus/minus method as next plus/minus method computing is worked as
When, if digit is insufficient, need the bit wide completion sign bit by final output.
Then into step 106, above-mentioned newly-built adder or subtracter are realized using carry chain, and calculate its output
Position.Carry chain can effectively improve adder or the arithmetic speed of subtracter.Preferably, the carry chain is complete by one
Add device to build.
In one embodiment, in FPGA shown in the basic structure of carry chain such as Fig. 6 (a).' s is realized with FPGA carry chains
[5:0]=a [4:0]+b[4:0] shown in such as Fig. 6 (b) of result '.' s [5 is realized with carry chain:0]=a [4:0]-b[4:0] '
As a result as shown in Fig. 6 (c).
Then into step 107, judging two matrixes, also whether there are effective data row：
If it is judged that being yes, then the carry-out bit is added in positive matrix number or negative matrix, including：
If two data rows both are from positive matrix number, the carry-out bit is added in positive matrix number；
If two data rows both are from negative matrix, the carry-out bit is added in negative matrix；
If one comes from positive matrix number in two data rows, another comes from negative matrix, according to matrix column number (i.e.
Final output bit wide) subtracter output outcome symbol position is filled, and be put into as signed number in positive matrix number.It is excellent
Selection of land, the matrix column number are final output bit wides.
Hereafter repeat to enter step 103, until effective data row is not present in the positive matrix number and negative matrix.
If it is judged that be it is no, then it is optimizable described in the combination replacement of all newly-built adders or subtracter
Plus/minus musical instruments used in a Buddhist or Taoist mass combines.
Hereafter terminate to optimize.
In one embodiment of the application, a kind of plus/minus musical instruments used in a Buddhist or Taoist mass of one group of chain in RTL circuits is：
s[6:0]=a [3:0]+b[3:0]-c[3:0]-d[3:0],
Wherein input terminal a, b, c, the time delay (unit of each data bit of d：Ns) as shown in table 2：
2 input port arrival time of table
| A [3]=4 | A [2]=4 | A [1]=2 | A [0]=2 |
| B [3]=3 | B [2]=3 | B [1]=3 | B [0]=3 |
| C [3]=1 | C [2]=1 | C [1]=1 | C [0]=1 |
| D [3]=1 | D [2]=1 | D [1]=1 | D [0]=1 |
It is as follows to the delay Optimization of the input terminal of the plus/minus musical instruments used in a Buddhist or Taoist mass of the chain：
Each logical device in RTL circuits is traveled through, finds optimizable plus/minus musical instruments used in a Buddhist or Taoist mass：
s[6:0]=a [3:0]+b[3:0]-c[3:0]-d[3:0]；
By the input matrix of this group of plus/minus musical instruments used in a Buddhist or Taoist mass, as shown in table 3.Positive number input a and b is stored in positive matrix number, is born
Number input c and d is stored in negative matrix.Wherein, column number is output port digit, when input port digit is insufficient before mend
0。
3 input data bit matrix of table
According to the time delay of input bit, each row in matrix are ranked up from short to long by time delay, by input bit time delay
It is shortest to come each row foremost.Shown in result table 4 after sequence.
4 matrix of table sorts by input bit time delay
Two data rows of maximum delay value minimum are selected from two matrixes.By table 4 it can be calculated that positive number square
The maximum delay of each row of data is respectively 3,4 in battle array；It is respectively per the maximum delay of data row in negative matrix：1,1.Thus may be used
Know, two data behaviors of time delay minimum：
An adder or subtracter are created using the two data rows.Since two data rows both are from negative square
Battle array, therefore an adder is created, it is denoted as e [4:0]=c [3:0]+d[3:0].
Newly-built adder is realized using carry chain, and calculates its output.As shown in Figure 8.
Judging two matrixes, also whether there are effective data row.Judging result is yes, then continues to optimize.
Matrix is there are effective data row, and e [4:0] it is the sum of two negatives.Therefore by e [4:0] negative matrix is added
In.Data row at this time in positive matrix number and negative matrix is as shown in table 5.
Matrix after the wheel optimization of table 5 the 1st
According to the time delay of input bit, each row in matrix are ranked up from short to long by time delay.Due to negative matrix
In only data line, so ranking results are still as shown in table 5.
Two data rows of time delay minimum are taken out from two matrixes.By table 5 it can be calculated that often being counted in positive matrix number
It is respectively 3,4 according to capable maximum delay；The maximum delay of every data row is respectively 2 in negative matrix.It follows that time delay is minimum
Two data behaviors：
An adder or subtracter are created using the two data rows.Since the first row in two data rows is from just
Matrix number, the second row comes from negative matrix, therefore creates a subtracter, is denoted as f [5:0]={ b [3:2],a[1:0]}-e[4:
0]；Wherein, f [5] is sign bit.
Newly-built subtracter is realized using carry chain and calculates its output.As shown in Figure 9.
Judging two matrixes, also whether there are effective data row.Judging result is yes, then continues to optimize.
There are effective data row in matrix, and f [5:0] result of negative is added for positive number.Therefore, according to matrix column number
(i.e. final output bit wide 7) filling output result f [5:0] sign bit (f [5]), the result after filling are { f [5], f [5:
0]}.Again by result { f [5], f [5:0] } add in positive matrix number.
In one embodiment, shown in complement code subtraction such as Fig. 6 (c), use " all positions of a2 negate again plus 1 " represent-
The complement code of a2, then calculate a1+ (- a2).
Data row at this time in positive matrix number and negative matrix is as shown in table 6.
Matrix after the wheel optimization of table 6 the 2nd
According to the time delay of input bit, each row in matrix are ranked up from short to long by time delay.Due to there was only positive number
There are two data rows in matrix, so ranking results are still as shown in table 7.
Two data rows of time delay minimum are taken out from two matrixes.Due to only remaining in positive matrix number, there are two data
OK.Therefore the two data rows are directly taken out.
An adder is created using the two data rows.It is denoted as：
s[6:0]={ a [3:2],b[1:0]}+{f[5],f[5:0]}.
Newly-built adder is realized using carry chain and calculates its carry-out bit.As shown in Figure 10.
Judging two matrixes, also whether there are effective data row.Judging result is no, then with all newly-built adders
Or the optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination of combination replacement of subtracter
s[6:0]=a [3:0]+b[3:0]-c[3:0]-d[3:0].
Hereafter terminate to optimize.
It should be noted that in the application documents of this patent, relational terms such as first and second and the like are only
For distinguishing one entity or operation from another entity or operation, without necessarily requiring or implying these entities
Or there are any actual relationship or order between operation.Moreover, term " comprising ", "comprising" or its any other
Variation is intended to non-exclusive inclusion, so that process, method, article or equipment including a series of elements are not only
Including those key elements, but also including other elements that are not explicitly listed, or further include as this process, method, thing
Product or the intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence " including one ", not
Also there are other identical element in the process, method, article or apparatus that includes the element for exclusion.The application of this patent
In file, if it is mentioned that certain behavior is performed according to certain key element, then refers to the meaning that the behavior is performed according at least to the key element, wherein
Include two kinds of situations：The behavior is performed according only to the key element and the behavior is performed according to the key element and other key elements.
All references mentioned in the present invention is incorporated herein by reference, independent just as each document
It is incorporated as with reference to such.In addition, it should also be understood that, after reading the above teachings of the present invention, those skilled in the art can
To be made various changes or modifications to the present invention, such equivalent forms equally fall within the application scope claimed.
Claims (10)
1. a kind of plus/minus musical instruments used in a Buddhist or Taoist mass optimization method based on input bit time delay, it is characterised in that comprise the following steps：
Each logical device in circuit is traveled through, determines one group of optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination in circuit；
The input bit matrixing that the plus/minus musical instruments used in a Buddhist or Taoist mass is combined, positive number input bit are stored in positive matrix number, and negative input bit is deposited
It is placed in negative matrix；
According to the time delay of input bit, each row aligned respectively in matrix number and negative matrix are arranged from short to long by time delay
Sequence, comes each row foremost by input bit time delay is shortest；
According to the valid data row in the positive matrix number and negative matrix, N number of adder or subtracter are created successively, and use institute
State optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination described in the combination replacement of N number of adder or subtracter；Wherein, N >=1.
2. optimization method according to claim 1, it is characterised in that described " according to the positive matrix number and negative matrix
In valid data row, create N number of adder or subtracter successively, and with N number of adder or the combination replacement of subtracter
The step of optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination ", includes：
Two data rows of time delay minimum are chosen from the positive matrix number and negative matrix；
Adder or subtracter are created using described two data rows；
The newly-built adder or subtracter are realized using carry chain, and calculate carry-out bit；
If the carry-out bit of the calculating is added to institute by the positive matrix number and negative matrix also there are effective data row
State in positive matrix number or negative matrix；
Above step is repeated, until effective data row is not present in the positive matrix number and negative matrix；
The optimizable plus/minus musical instruments used in a Buddhist or Taoist mass combination described in the combination replacement of the newly-built adder or subtracter.
3. optimization method according to claim 1, it is characterised in that optimizable plus/minus musical instruments used in a Buddhist or Taoist mass in the definite circuit
Combination includes：
If in the combination of plus/minus musical instruments used in a Buddhist or Taoist mass in addition to least significant end adder or subtracter, the output of other each adders or subtracter
An input terminal during end is at least combined with the plus/minus musical instruments used in a Buddhist or Taoist mass connects, it is determined that is combined for optimizable plus/minus musical instruments used in a Buddhist or Taoist mass.
4. optimization method according to claim 2, it is characterised in that described to be selected from the positive matrix number and negative matrix
Taking two data rows of time delay minimum includes：
In each data row of the positive matrix number and negative matrix, the time delay value conduct that maximum is chosen from each data row should
The maximum delay of data row, chooses two data rows of maximum delay minimum.
5. optimization method according to claim 4, it is characterised in that described " to choose two data of maximum delay minimum
OK " include：
Described two data rows both are from positive matrix number；Or
Described two data rows both are from negative matrix；Or
One comes from positive matrix number in described two data rows, another comes from negative matrix.
6. optimization method according to claim 2, it is characterised in that described to create adder using described two data rows
Or subtracter includes：
If described two data rows both are from positive matrix number, an adder is created；
If described two data rows both are from negative matrix, an adder is created；
If one comes from positive matrix number in described two data rows, another comes from negative matrix, then creates a subtracter.
7. optimization method according to claim 2, it is characterised in that the carry-out bit by the calculating is added to described
Positive matrix number or negative matrix include：
If described two data rows both are from positive matrix number, the carry-out bit is added in positive matrix number；
If described two data rows both are from negative matrix, the carry-out bit is added in negative matrix；
If one comes from positive matrix number in described two data rows, another comes from negative matrix, is filled out according to matrix column number
The sign bit of the carry-out bit is filled, and is put into as signed number in positive matrix number.
8. according to the optimization method described in claim 1-8, it is characterised in that the plus/minus musical instruments used in a Buddhist or Taoist mass includes：Adder combination,
Either subtracter combination, or adder and subtracter combination, or one or more three input the adder of the above,
Either one or more three inputs the subtracter of the above.
9. according to the optimization method described in claim 1-8, it is characterised in that the plus/minus musical instruments used in a Buddhist or Taoist mass includes：The plus/minus of chain
Musical instruments used in a Buddhist or Taoist mass combines, or the plus/minus musical instruments used in a Buddhist or Taoist mass of tree-shaped.
10. according to the optimization method described in claim 2-8, it is characterised in that the carry chain is realized by one-bit full addres.
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