CN108009117B - Control device and method for function interface of Feiteng computer - Google Patents
Control device and method for function interface of Feiteng computer Download PDFInfo
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- CN108009117B CN108009117B CN201810025670.7A CN201810025670A CN108009117B CN 108009117 B CN108009117 B CN 108009117B CN 201810025670 A CN201810025670 A CN 201810025670A CN 108009117 B CN108009117 B CN 108009117B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
- G06F21/53—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow by executing in a restricted environment, e.g. sandbox or secure virtual machine
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Abstract
The invention provides a control device and a method for a function interface of a Feiteng computer, comprising the following steps: a Feiteng CPU; at least one functional chip, wherein the PCIE signal input port of the functional chip is connected to the PCIE signal output port of the Feiteng CPU, the signal output port of the functional chip is connected with the signal input port of at least one switching chip, and the signal output port of the switching chip is connected with a functional interface; the signal output port of the control chip is connected to the control signal port of the switching chip, so that the disabled functional interface is not easy to be relieved, and the safety of computer information is improved.
Description
Technical Field
The invention relates to the technical field of computers, in particular to a control device and a control method for a function interface of a Feiteng computer.
Background
In recent years, with the acceleration of the localization process of computers, the security and confidentiality requirements on the computers are increasing. The abundant functional interfaces of the computer bring convenience and quickness to us, but meanwhile, secret-related computers of some secret-related scientific research institutions are required to realize the control of the functional interfaces, prevent secret-related data from outflow and provide safety and guarantee for the data. Therefore, the on-off control of the computer function interface has a great guarantee effect on the computer information security and enterprise confidentiality.
The existing methods for controlling the on-off of the functional interfaces of the computer generally comprise a physical isolation method for removing the relevant functional interfaces or blocking the interfaces by using hot melt adhesive and custom iron boxes, a method for shielding or deleting the function interface equipment drive of the system by using a Basic Input Output System (BIOS), and a method for controlling by disabling software by using the functional interfaces compatible with an operating system. However, the physical isolation method is not restorable, and the other two control methods are fragile, so that the limitation can be easily released. For example, the method can directly enter BIOS to be modified to release the disablement of the function interface, the method of deleting the function interface device drive of the system can release the disablement of the function interface by installing the corresponding drive program, the method of controlling the disabled software of the function interface of the compatible operation system can release the disablement of the function interface by unloading or reloading the system.
In summary, the disabling of the functional interface of the computer is easy to be released, resulting in low security of the computer information.
Disclosure of Invention
The embodiment of the invention aims to provide a control device and a control method for a function interface of a Feiteng computer, which are used for solving the problem that the security of computer information is low because the disabling of the function interface of the computer is easy to be released.
To achieve the above object, an embodiment of the present invention provides a control device for a function interface of a Feiteng computer, the control device including:
A Feiteng CPU;
At least one functional chip, wherein the PCIE signal input port of the functional chip is connected to the PCIE signal output port of the Feiteng CPU, the signal output port of the functional chip is connected with the signal input port of at least one switching chip, and the signal output port of the switching chip is connected with a functional interface;
and the signal output port of the control chip is connected to the control signal port of the switching chip.
The switching chip connected with the signal output port of the PCIE-to-USB chip is a USB switching chip, and the functional interface connected with the signal output port of the USB switching chip is a USB interface.
The USB switching chip comprises a USB3.0 switching chip and a USB2.0 switching chip, the USB interface is a USB3.0 interface, the signal input port of the USB3.0 switching chip and the signal input port of the USB2.0 switching chip are connected to the signal output port of the PCIE-to-USB chip, and the signal output port of the USB3.0 switching chip and the signal output port of the USB2.0 switching chip are connected to the USB3.0 interface.
The at least one functional chip comprises a network chip, the switching chip connected with the signal output port of the network chip is a network switching chip, and the functional interface connected with the signal output port of the network switching chip is a network interface.
The at least one functional chip comprises a beta functional chip, the switching chip connected with the signal output port of the beta functional chip is a beta switching chip, and the functional interface connected with the signal output port of the beta switching chip is a beta interface.
The at least one functional chip comprises a serial port functional chip, the switching chip connected with the signal output port of the serial port functional chip is a serial port switching chip, and the functional interface connected with the signal output port of the serial port switching chip is a serial port.
The control chip is an embedded controller EC chip or a complex programmable logic device CPLD chip.
The embodiment of the invention also provides a control method of the Feiteng computer function interface, which is applied to the control device of the Feiteng computer function interface, and the control method comprises the following steps:
outputting PCIE signals to each functional chip through the Feiteng CPU, enabling each functional chip to generate corresponding functional signals according to the received PCIE signals, and outputting the generated functional signals to a switching chip connected with the functional chips;
The control chip outputs control signals to each switching chip, so that each switching chip controls the on-off of the functional interface connected with the control chip according to the received control signals and the functional signals.
The scheme of the invention has the following beneficial effects:
in the embodiment of the invention, each functional interface of the Feiteng computer is connected with one switching chip, and the control signal port of each switching chip is connected to the control chip, so that the control chip outputs the signal for controlling the on-off of the functional interface to the control signal port of the switching chip, the on-off of each functional interface can be independently controlled, the disabled functional interface is not easy to be released, and the safety of computer information is improved.
Drawings
FIG. 1 is a schematic diagram of a control device for a Feiteng computer function interface in an embodiment of the invention;
FIG. 2 is a schematic diagram of controlling the on/off of a USB interface according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of controlling on/off of a USB3.0 interface through a USB3.0 switching chip in an embodiment of the present invention;
FIG. 4 is a schematic diagram of a USB3.0 switch chip according to an embodiment of the invention;
FIG. 5 is a schematic diagram of controlling the on-off of a network interface according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a network switch chip according to an embodiment of the invention;
fig. 7 is a flowchart of a method for controlling a function interface of a Feiteng computer according to an embodiment of the present invention.
Reference numerals illustrate:
1. a Feiteng CPU; 2. a functional chip; 3. switching the chip; 4. a functional interface; 5. and a control chip.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As shown in fig. 1, a specific embodiment of the present invention provides a control device for a function interface of a Feiteng computer, where the control device includes: a Feiteng CPU1; at least one functional chip 2, wherein the PCIE signal input port of the functional chip 2 is connected to the PCIE signal output port of the Feiteng CPU1, the signal output port of the functional chip 2 is connected with the signal input port of at least one switching chip 3, and the signal output port of the switching chip 3 is connected with a functional interface 4; and the signal output port of the control chip 5 is connected to the control signal port of the switching chip 3.
In the embodiment of the present invention, the above-mentioned Feiteng CPU (CPU, central Processing Unit) is mainly configured to output a high-speed serial computer expansion bus standard (PCIE, PERIPHERAL COMPONENT INTERCONNECT EXPRESS) signal to the functional chip 2, and specifically, the Feiteng CPU1 may output a PCIE signal to a PCIE signal input port of the functional chip 2 through a PCIE signal output port.
In a specific embodiment of the present invention, the control device further includes a PCIE expansion chip, and the PCIE signal output port of the futile CPU1 is connected to the PCIE signal input port of the functional chip 2 through the PCIE expansion chip.
In a specific embodiment of the present invention, the PCIE expansion chip is mainly used to expand PCIE signals, so that when PCIE signal output ports of the Feiteng CPU1 are connected to PCIE signal input ports of the functional chips 2 through PCIE expansion chips, the functional chips 2 can receive PCIE signals. In a specific embodiment of the present invention, the PCIE extension chip is an existing PCIE extension chip, for example, a PCIE extension chip with a PLX company model number of PEX 8619.
In the embodiment of the present invention, the functional chip 2 is mainly configured to generate corresponding signals, such as serial universal bus (USB, universal Serial Bus) signals, network signals, and the like, according to PCIE signals. In a specific embodiment of the present invention, the functional chip 2 is of various types, and specifically, the functional chip 2 may be a PCIE to USB chip, a network chip, a serial advanced technology attachment (sata, SERIAL ADVANCED technology attachment) functional chip, a serial port functional chip, or the like.
In the embodiment of the present invention, the control chip 5 is mainly configured to output a signal (for example, a low level or a high level) for controlling the on/off of the functional interface 4 to each switching chip 3, so that the switching chip 3 can control the functional interface 4 connected to the switching chip 3 according to the signal output by the control chip 5, thereby controlling the on/off of the functional interface 4, making the disabled functional interface 4 not easy to be released, and improving the security of computer information.
In the embodiment of the present invention, the control chip 5 is an embedded controller EC chip or a complex programmable logic device CPLD chip, so as to ensure that the functional interface 4 can be controlled to be turned on or off simply and rapidly. The functional interface 4 is a USB interface, a network interface, a sata interface, a serial interface, or the like.
The switching chip 3 may be a USB switching chip, a network switching chip, a sata switching chip, a serial switching chip, or the like. And in the embodiment of the present invention, the signal output port of each type of functional chip 2 can only be connected to the signal input port of one type of switching chip 3, but the number of switching chips 3 may be one or more. It should be noted that, the type of the switching chip 3 needs to correspond to the type of the connected functional chip 2, for example, when the functional chip 2 is a PCIE to USB chip, the switching chip 3 is a USB switching chip; when the functional chip 2 is a network chip, the switching chip 3 is a network switching chip; when the functional chip 2 is a sata functional chip, the switching chip 3 is a sata switching chip; when the functional chip 2 is a serial functional chip, the switching chip 3 is a serial switching chip.
In a specific embodiment of the present invention, the at least one functional chip includes a PCIE to USB chip, a switching chip connected to a signal output port of the PCIE to USB chip is a USB switching chip, and a functional interface connected to a signal output port of the USB switching chip is a USB interface.
In the embodiment of the present invention, as shown in fig. 2, in order to control the on/off of the USB interface, the PCIE signal input port of the PCIE to USB chip is connected to the PCIE signal output port of the futon CPU1, the signal output port of the PCIE to USB chip is connected to the signal input port of the USB switching chip, the signal output port of the USB switching chip is connected to the USB interface, and the control signal port of the USB switching chip is connected to the signal output port of the control chip 5. Specifically, the PCIE-USB chip is configured to generate a USB signal according to a PCIE signal output by the frisbee CPU1, and the USB switching chip is configured to control on-off of the USB interface according to a signal output by the control chip 5. It should be noted that the number of the USB switch chips may be one or more, and the signal output port of each USB switch chip is connected to a USB interface, so as to implement a function of separately controlling multiple USB interfaces. The PCIE to USB chip may be an existing functional chip, for example, a functional chip with a model number up 720201K8 of NEC company.
In a specific embodiment of the present invention, as shown in fig. 3, a USB3.0 interface is taken as an example, to illustrate a process of implementing on-off of the USB interface. Specifically, the above-mentioned USB switching chip includes USB3.0 switching chip and USB2.0 switching chip, and the USB interface is USB3.0 interface, and signal input port and the signal input port of USB2.0 switching chip of USB3.0 switching chip all connect to the signal output port of PCIE to USB chip, and signal output port and the signal output port of USB2.0 switching chip of USB3.0 switching chip all connect to USB3.0 interface, and the control signal port of USB2.0 switching chip of USB3.0 switching chip all connect to the signal output port of control chip 5.
In a specific embodiment of the present invention, the PCIE to USB chip is capable of connecting a set of USB3.0 differential signals (including a set of USB3.0 differential transmit signals and a set of USB3.0 differential receive signals) and a set of USB2.0 differential signals generated according to PCIE signals to the USB3.0 switching chip and the USB2.0 switching chip, respectively, and connecting a control signal port of the USB3.0 switching chip and a control signal port of the USB2.0 switching chip to a signal output port of the control chip 5, so as to separately control USB3.0 and USB2.0 signals in the USB3.0 interface.
As shown in fig. 4, the principle of implementing on-off control of the USB3.0 interface through the USB3.0 switching chip is that, assuming that a signal output port of the PCIE to USB chip is connected to a pin a of the USB3.0 switching chip, a pin B of the USB3.0 switching chip is connected to the USB3.0 interface, a control end pin of the USB3.0 switching chip is connected to a signal output port of the control chip, and a pin C of the USB3.0 switching chip is suspended, when a low level is output to the USB3.0 switching chip through the control chip, the USB3.0 switching chip connects a differential signal of the pin a to the pin B, so as to implement opening of the USB3.0 interface; when the control chip outputs high level to the USB3.0 switching chip, the USB3.0 switching chip connects the differential signal of the pin A to the pin C, so that the USB3.0 interface is turned off. It should be noted that, the control chip outputs high and low levels to the USB2.0 switching chip, and the on-off of the USB3.0 interface can also be realized, and the specific implementation process is the same as the process of realizing the on-off through the USB3.0 switching chip, so, in order to avoid excessive repetition, the on-off of the USB3.0 interface realized through the control chip to the USB2.0 switching chip is not described herein. The USB3.0 switching chip and the USB2.0 switching chip can be realized by adopting the existing chips. Specifically, the USB3.0 switching chip may be a chip of model HD3SS3212RKSR of company Ti, and the USB2.0 switching chip may be a chip of model TS3USB31ERSER of company Ti.
In a specific embodiment of the present invention, the at least one functional chip includes a network chip, the switching chip connected to the signal output port of the network chip is a network switching chip, and the functional interface connected to the signal output port of the network switching chip is a network interface.
In a specific embodiment of the present invention, as shown in fig. 5, the PCIE signal input port of the network chip is connected to the PCIE signal output port of the flying CPU1, so that the network chip can generate a network signal according to the PCIE signal output by the flying CPU 1. In addition, the signal input port of the network switching chip is connected to the signal output port of the network chip, and the control signal port of the network switching chip is connected to the signal output port of the control chip 5, so that the control chip 5 outputs a signal for controlling the on-off of the network interface to the network switching chip, and the on-off of the network interface can be controlled. It should be noted that the number of the network switching chips is one or more, and the signal output port of each network switching chip is connected with a network interface, so as to achieve the purpose of separately controlling each network interface. The network chip and the network switching chip can be realized by adopting the existing chip.
In the specific embodiment of the present invention, as shown in fig. 6, the principle of implementing on-off control of the network interface through the network switching chip is that, assuming that the signal output port of the network chip is connected to the pin a of the network switching chip, the pin B1 of the network switching chip is connected to the network interface, the pin B2 of the network switching chip is suspended, and the control end pin of the network switching chip is connected to the signal output port of the control chip, when the control chip outputs a low level to the network switching chip, the network switching chip connects the pin a network signal to the pin B1, and opens the network interface to implement network signal communication; when the control chip outputs high level to the network switching chip, the network switching chip connects the pin A network signal to the pin B2 to turn off the network interface, thereby realizing the turn-off of the network signal.
In a specific embodiment of the present invention, the at least one functional chip includes a sata functional chip, the switching chip connected to the signal output port of the sata functional chip is a sata switching chip, and the functional interface connected to the signal output port of the sata switching chip is a sata interface. And the PCIE signal input port of the beta function chip is connected to the PCIE signal output port of the Feiteng CPU, and the control signal port of the beta switching chip is connected to the signal output port of the control chip, so that the control chip outputs a signal for controlling the on-off of the beta interface to the beta switching chip, and the on-off of the beta interface can be controlled. It should be noted that the number of the sata switching chips is one or more, and the signal output port of each sata switching chip is connected with a sata interface, so as to achieve the purpose of separately controlling each sata interface.
In a specific embodiment of the present invention, the at least one functional chip includes a serial port functional chip, the switching chip connected to the signal output port of the serial port functional chip is a serial port switching chip, and the functional interface connected to the signal output port of the serial port switching chip is a serial port. And the PCIE signal input port of the serial port functional chip is connected to the PCIE signal output port of the Feiteng CPU, and the control signal port of the serial port switching chip is connected to the signal output port of the control chip, so that the control chip outputs a signal for controlling the on-off of the serial port to the serial port switching chip, and the on-off of the serial port can be controlled. It should be noted that the number of serial port switching chips may be one or more, and the signal output port of each serial port switching chip is connected with one serial port, so as to achieve the purpose of separately controlling each serial port.
Therefore, in the specific embodiment of the invention, each functional interface of the Feiteng computer is connected with one switching chip, and the control signal port of each switching chip is connected to the control chip, so that the control chip outputs the signal for controlling the on-off of the functional interface to the control signal port of the switching chip, the on-off of each functional interface can be independently controlled, the disabled functional interface is not easy to be released, and the safety of computer information is improved.
In addition, as shown in fig. 7, the embodiment of the present invention further provides a control method for a function interface of a Feiteng computer, which is applied to the control device for the function interface of the Feiteng computer, and the control method includes:
In step 701, the Feiteng CPU outputs PCIE signals to each functional chip, so that each functional chip generates corresponding functional signals according to the received PCIE signals, and outputs the generated functional signals to the switching chip connected to the functional chip.
The specific structure of the control device of the function interface of the Feiteng computer is described in detail above, and the specific structure of the control device of the function interface of the Feiteng computer is not described here again. It should be noted that all embodiments of the control device of the foregoing flying computer function interface are applicable to the control method.
In a specific embodiment of the present invention, the functional chip may be a PCIE to USB chip, a network chip, a serial advanced technology attachment functional chip, or a serial port functional chip. And each functional chip refers to a switching chip which outputs the generated functional signals to be connected with the functional chip. For example, the PCIE to USB chip generates a USB signal according to the received PCIE signal, and the PCIE to USB chip outputs the USB signal to one or more USB switching chips; the network chip generates a functional signal according to the received PCIE signal, which is a network signal, and the network chip outputs the network signal to one or more network switching chips.
Step 702, the control chip outputs control signals to each switching chip, so that each switching chip controls the on-off of the functional interface connected with the switching chip according to the received control signals and the received functional signals.
In a specific embodiment of the present invention, the control signal is a signal for controlling on-off of the functional interface. Specifically, for each switching chip, after receiving the control signal, the switching chip can switch the received functional signal according to the control signal, so as to control the on-off of the functional interface connected with the switching chip. For example, as shown in fig. 6, when the control chip outputs a low level (i.e., the control signal) to the network switching chip, the network switching chip connects the pin a network signal to the pin B1, opens the network interface, and realizes network signal communication; when the control chip outputs high level (namely the control signal) to the network switching chip, the network switching chip connects the pin A network signal to the pin B2, and the network interface is turned off, so that the network signal is turned off.
It can be seen that, in the specific embodiment of the present invention, the Feiteng CPU outputs PCIE signals to each functional chip, so that each functional chip generates corresponding functional signals according to the received PCIE signals, and outputs the generated functional signals to the switching chips connected to the functional chips, and meanwhile, the control chip outputs control signals to each switching chip, so that each switching chip controls on-off of the functional interface connected to the switching chip according to the received control signals and the functional signals, thereby independently controlling on-off of each functional interface, making disabled functional interfaces not easy to be released, and improving security of computer information. While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that various modifications and adaptations can be made without departing from the principles of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.
Claims (6)
1. A control device for a function interface of a Feiteng computer, the control device comprising:
A Feiteng CPU;
The PCIE signal input port of the function chip is connected to the PCIE signal output port of the Feiteng CPU, the signal output port of the function chip is connected with the signal input port of at least one switching chip, the signal output port of the switching chip is connected with a function interface, the at least one function chip comprises a PCIE-to-USB chip, the switching chip connected with the signal output port of the PCIE-to-USB chip is a USB switching chip, the function interface connected with the signal output port of the USB switching chip is a USB interface, the USB switching chip comprises a USB3.0 switching chip and a USB2.0 switching chip, the USB interface is a USB3.0 interface, the signal input port of the USB3.0 switching chip and the signal input port of the USB2.0 switching chip are both connected to the signal output port of the PCIE-to-USB chip, and the signal output port of the USB3.0 switching chip and the signal output port of the USB2.0 switching chip are both connected to the USB3.0 interface;
and the signal output port of the control chip is connected to the control signal port of the switching chip.
2. The control device according to claim 1, wherein at least one of the functional chips includes a network chip, the switching chip connected to the signal output port of the network chip is a network switching chip, and the functional interface connected to the signal output port of the network switching chip is a network interface.
3. The control device according to claim 1, wherein at least one functional chip includes a sata functional chip, the switching chip connected to the signal output port of the sata functional chip is a sata switching chip, and the functional interface connected to the signal output port of the sata switching chip is a sata interface.
4. The control device according to claim 1, wherein the at least one functional chip includes a serial functional chip, the switching chip connected to the signal output port of the serial functional chip is a serial switching chip, and the functional interface connected to the signal output port of the serial switching chip is a serial port.
5. The control device according to claim 1, wherein the control chip is an embedded controller EC chip or a complex programmable logic device CPLD chip.
6. A control method for a function interface of a flying computer, applied to a control device for a function interface of a flying computer according to any one of claims 1 to 5, characterized in that the control method comprises:
outputting PCIE signals to each functional chip through the Feiteng CPU, enabling each functional chip to generate corresponding functional signals according to the received PCIE signals, and outputting the generated functional signals to a switching chip connected with the functional chips;
The control chip outputs control signals to each switching chip, so that each switching chip controls the on-off of the functional interface connected with the control chip according to the received control signals and the functional signals.
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| CN111858417A (en) * | 2020-07-30 | 2020-10-30 | 山东超越数控电子股份有限公司 | CPLD-based platform network interface management and control method and system |
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| CN207690076U (en) * | 2018-01-11 | 2018-08-03 | 湖南长城银河科技有限公司 | It soars the control device of computer function interface |
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| CN108009117A (en) | 2018-05-08 |
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