CN108008657B - Load balancing redundancy switching system with control panel and switching panel buses directly connected - Google Patents

Load balancing redundancy switching system with control panel and switching panel buses directly connected Download PDF

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CN108008657B
CN108008657B CN201610922856.3A CN201610922856A CN108008657B CN 108008657 B CN108008657 B CN 108008657B CN 201610922856 A CN201610922856 A CN 201610922856A CN 108008657 B CN108008657 B CN 108008657B
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interface
pcie
control module
control
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CN108008657A (en
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邹昀辛
刘丰
杨帆
王晓光
李云祥
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Beijing Institute of Computer Technology and Applications
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0421—Multiprocessor system
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/24—Pc safety
    • G05B2219/24182—Redundancy

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  • Engineering & Computer Science (AREA)
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Abstract

The invention discloses a load balancing redundancy exchange system with a control board and an exchange board directly connected by a bus, which comprises: the first interface is a PCIe external interface of the first exchange board, and the second interface is a PCIe internal interface of the first exchange board; the third interface is a PCIe external interface of the second exchange board, and the fourth interface is a PCIe internal interface of the second exchange board; the first control module and the second control module are respectively used for carrying out load balancing on input PCIe data and then outputting the PCIe data; the first control module and the second control module are mutually redundant, so that the first exchange board and the second exchange board form a redundant structure; the first packet switch and the second packet switch are used for converting PCIe data and Ethernet data respectively so as to communicate with an external Ethernet. The load balancing redundancy exchange system with the control board and the exchange board PCIe bus directly connected avoids multiple conversion of data signals, reduces network delay and increases network bandwidth.

Description

Load balancing redundancy switching system with control panel and switching panel buses directly connected
Technical Field
The invention relates to the technical field of wireless communication, in particular to an emergency video encryption wireless transmission device with dual-channel fusion.
Background
With the explosion development of internet technologies such as clustering and cloud computing, an application delivery load balancer becomes a common four-layer/seven-layer network load balancing device in data center applications. There are two common implementations of such load balancing devices:
the first is a mode of integrating a special network card or a high-speed Ethernet card on a control board circuit board, and the purpose of data stream load balancing is completed through specific software and drive. This solution has two drawbacks: the bandwidth of network communication is limited by the network card, and the load balancer is often a network bottleneck when deployed as a main road; and a single node fault exists, redundant equipment needs to be purchased during deployment, and the cost is increased.
The second is to integrate the exchange circuit board and the main control circuit board together, and control the inflow and outflow of network data through some algorithms to achieve the purpose of load distribution. This approach requires data interaction between the host and switch circuits, and the most common scheme is to interconnect the two circuits through an ethernet network. This solution has two drawbacks: the data communication between the two circuit boards is subjected to signal conversion for many times, so that the power consumption and the delay are increased; the equipment has single node failure, redundant equipment needs to be purchased during deployment, and the cost is increased.
Disclosure of Invention
The invention aims to provide a load balancing redundancy switching system with control boards and switching boards directly connected by buses, which is used for solving the problems in the prior art.
The invention relates to a load balancing redundancy exchange system with a control board and an exchange board directly connected by a bus, which comprises: the system comprises a first control module, a second control module, a first exchange board and a second exchange board; the first exchange plate includes: a first interface, a second interface, and a first packet switch; the second exchange plate includes: a third interface, a fourth interface, and a second packet switch; the first control module is used for carrying out communication control on the first exchange board, and the second control module is used for carrying out communication control on the second exchange board; the first interface is a PCIe external interface of the first switch board and is used for transmitting PCIe data input by the first packet switch to the first control module, and the second interface is a PCIe internal interface of the first switch board and is used for transmitting the PCIe data output by the first control module to the first packet switch; the third interface is a PCIe external interface of the second switch board and is configured to transmit PCIe data input by the second packet switch to the second control module, and the fourth interface is a PCIe internal interface of the second switch board and is configured to transmit PCIe data output by the second control module to the second packet switch; the first control module and the second control module are respectively used for carrying out load balancing on input PCIe data and then outputting the PCIe data; the first control module and the second control module are redundant with each other, so that the first exchange board and the second exchange board form a redundant structure; the first packet switch and the second packet switch are used for converting PCIe data and Ethernet data respectively so as to communicate with an external Ethernet.
According to an embodiment of the present invention, in a load balancing redundant switching system in which buses of a control board and a switch board are directly connected, the first control module includes: the system comprises a first memory, a first processor and a first network card; the second control module includes: the second memory, the second processor and the second network card; the first network card is connected with the second network card through a heartbeat line; the first control module is used for controlling the communication of the first exchange board; the second control module is used for controlling the communication of the two exchange boards.
According to an embodiment of the present invention, a load balancing redundant switching system with directly connected control boards and switching boards includes: the first serial EEPROM is used for storing the configuration information of the first exchange board; and the second serial EEPROM is used for storing the configuration information of the second exchange board.
According to an embodiment of the present invention, a load balancing redundant switching system with directly connected control boards and switching boards includes: the first clock chip is used for providing clock frequency for the first exchange board; and the second clock chip is used for providing the clock frequency for the second switchboard.
According to an embodiment of the present invention, a load balancing redundant switching system with directly connected control boards and switching boards includes: a plurality of first ethernet port logics for inputting the input ethernet data to the first packet switch and respectively outputting the ethernet data output from the first packet switch; and the second Ethernet port logics are used for inputting the input Ethernet data to the second packet switch and respectively outputting the Ethernet data output by the second packet switch.
According to an embodiment of the load balancing redundant switching system in which the control board and the switch board are directly connected via the bus, the first interface, the second interface, the third interface and the fourth interface are PCIe network cards.
According to an embodiment of the load balancing redundant switching system with the control board directly connected with the switch board bus, the first packet switch and the second packet switch are used for performing unified port output on input ethernet data input by a plurality of ports to form PCIe data.
According to an embodiment of the load balancing redundant switching system with directly connected control boards and switching boards, the first control board communicates state information with the second control board in a multicast mode through the jumper wire.
According to an embodiment of the load balancing redundancy switching system with directly connected control boards and switching boards, the first control board communicates state information with the second control board every 1 second.
According to an embodiment of the load balancing redundant switching system with directly connected control boards and switch boards, the first interface is connected with the first control module through an external PCIe x8 bus, the second interface is connected with the first control module through an internal PCIe x8 bus, the third interface is connected with the second control module through an external PCIe x8 bus, and the fourth interface is connected with the second control module through an internal PCIe x8 bus.
In conclusion, the load balancing redundancy switching system with the control board and the switch board PCIe bus directly connected avoids multiple conversion of data signals, reduces network delay and increases network bandwidth. Meanwhile, a redundant switching device is added in a backboard heartbeat mode, and the stability of the system is improved.
Drawings
FIG. 1 is a block diagram of a load balancing redundant switching system with control and switch board buses directly connected according to the present invention;
fig. 2 is a system hardware structure diagram of the load balancing redundancy switching system in which the control board and the switch board are directly connected by the bus.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
Fig. 1 is a block diagram of a load balancing redundancy switching system in which control boards and switching boards are directly connected by buses according to the present invention, and as shown in fig. 1, the load balancing redundancy switching system in which control boards and switching boards are directly connected by buses according to the present invention mainly includes: two load balancer control/switching circuits. The method specifically comprises the following steps: the system comprises a control module 1, a control module 2, a network switching chip 3 and a network switching chip 4. The network switching chip 3 includes an interface 31, an interface 32, and a packet switch 33. The network switching chip 4 includes: interface 41, interface 42, and packet switch 43.
As shown in fig. 1, the control module 1 is used for performing communication control on the network switch chip 3, and the control module 2 is used for performing communication control on the network switch chip 4. Interface 41 is also a PCIe external interface, interface 42 is a PCIe internal interface, interface 31 is also a PCIe external interface, and interface 32 is a PCIe internal interface. The control module 1 and the control module 2 are redundant to each other, so that the network switch chip 3 and the network switch chip 4 form a redundant structure. The packet switch 33 is used for communication with an external ethernet network and performs conversion between PCIe data and ethernet data. The packet switch 43 is used for communication with an external ethernet network and performs conversion between PCIe data and ethernet data.
Fig. 2 is a system hardware structure diagram of a load balancing redundancy switching system in which control boards and switching boards are directly connected by buses according to the present invention, and as shown in fig. 2, the load balancing redundancy switching system in which control boards and switching boards are directly connected by buses according to the present invention includes a load balancer control/switching circuit a and a load balancer control/switching circuit B. In the load balancer control/exchange circuit A, a memory A2 is directly connected with a processor A1, a network card A3 is connected with the processor A1, a PEP-A8 is connected with a processor A1 through an external PCIe x8 Bus, a PEP-A9 is connected with the processor A1 through an internal PCIe x8 Bus, a management Bus in the PEP-A8 and the PEP-A9 is bidirectionally connected with the processor A1 through a management PCIe x1 Bus, a serial EEPROM A5 is bidirectionally connected with a PCIe network exchange chip A4 through an SMBus, and an output end of a clock chip A6 is connected with an input end of the PCIe network exchange chip A4. A memory B2 in the load balancer control/exchange circuit B is directly connected with a processor B1, a network card B3 is connected with a processor B1, a PEP-B8 in a PCIe network exchange chip B4 is connected with a processor B1 through an external PCIe x8 Bus, a PEP-B9 in the PCIe network exchange chip B4 is connected with the processor B1 through an internal PCIex8 Bus, the PEP-B8 is connected with a management Bus in the PEP-B9 and is bidirectionally connected with the processor B1 through a management PCIex1 Bus, a serial EEPROM B5 is bidirectionally connected with the PCIe network exchange chip B4 through an SMBus, and the output end of a clock chip B6 is connected with the input end of the PCIe network exchange chip B4; the network card A3 of the control board A7 is bidirectionally connected with the network card B3 of the control board B7 to form a jumper wire.
As shown in fig. 2, taking the load balancer control/Switch circuit a as an example, the load balancer control/Switch circuit a mainly includes a PCIe network Switch chip A4, a control board A7, a clock chip A6 and a serial eeproma5, where the PCIe network Switch chip A4 includes three core portions of a PEP A8, a PEP a9, a plurality of EP L and a Packet Switch module a10, the PEP, i.e., PCIe EndPoint, is a location of the PCIe controller on the Switch board, receives or sends data on the external PCIe bus, and forwards the data in a pointer format with the Packet Switch module a10, the EP L, i.e., Ethernet Port L, is used for connecting with an external Ethernet, and completes forwarding data between the Ethernet and the Packet Switch module a10, the Packet Switch module a10 is a network processing module of the core, and all PCIe data and network data control boards are processed in a format designated for initialization, the PCIe Switch control board A7, the configuration of the Switch chip a is used for initialization, the serial eeproma Switch chip A6 is used for initialization, and the serial eeproma Switch module a 59648 is used for storing serial Switch frequency information.
Referring to fig. 1, the initialization process of the load balancing redundancy switching system with the control board and the switch board directly connected by the bus is as follows: (taking load balancer control/exchange circuit A as an example)
The first step is that the PCIe network exchange chip A4 is reset, wherein the reset comprises a clock chip A6 reset, PCIe ports PEP-A8 and PEP-A9 reset, an Ethernet port EP L reset, configuration information of a read serial EEPROM A5 and a Packet Switch module A10 function reset.
Step two: control board a7 starts, initializes memory a2 and network card A3, and scans the devices on each PCIe bus (external PCIe bus, management PCIe bus, and internal PCIe bus).
Step three: the control board A7 controls the PCIe network switch chip A4 through the management Bus, and completes the configuration file import and port initialization of the PCIe network switch chip A4.
Step four: the control board a7 loads PEP A8 and a9 drivers, completes initialization of the internal PCIe network card A8 and the external PCIe network card a9, and configures an IP of a corresponding network card.
Referring to fig. 1, the data exchange process inside and outside the system is as follows: (taking load balancer control/exchange circuit A as an example)
The method comprises the following steps: when external data is transferred into the internal, the PEP-A8 of the PCIe network Switch chip a4 receives a Packet from the Packet Switch module a10 through DMA.
And step two, the PEP-A8 of the PCIe network switching chip A4 checks the data packet, wherein the data packet comprises AN IPV4 header, a TCP/UDP header, AN NVGRE/VX L AN header and the like.
And step three, the PEP-A8 of the PCIe network switch chip A4 carries out header analysis on the data packet, sets the starting address and the length of the DMA address, and sets an interrupt in the MAI L _ BOX.
And fourthly, the processor A1 in the control panel A7 acquires an interrupt signal in the MAI L _ BOX, starts DMA data mapping and transmission, and clears the interruption of the MAI L _ BOX to finish data receiving.
And step five, after the control board A7 completes the analysis of the data, the processed data is written into an internal PCIe bus and is transmitted into a buffer queue of PEP-A9, and a transmission interrupt is set at the corresponding MAI L _ BOX.
Step six, the PCIe network switch chip A4 pushes the data pointer in the buffer queue of PEP-A9 to the specified queue and clears the MAI L _ BOX interrupt.
And seventhly, a function management module in the PEP-A9 of the PCIe network exchange chip A4 analyzes the head of the data packet, fragments the TCP packet according to the situation, encapsulates the NVGRE/VX L AN packet, and transmits the data packet pointer to a packetSwitch module A10 through DMA.
The internal data is transmitted to the outside in the opposite direction, namely, the internal data passes through the PEP-A9 to the control board A7 and then passes through the PEP-A8.
Referring to fig. 1, the system redundancy switching process is as follows:
the first step is to set PEP-A8 in PCIe network exchange chip A4 as external V L AN port, set fixed IP of external network card of opposite terminal control board A7 as IP-a, set PEP-B8 in PCIe network exchange chip B4 as external V L AN port, and set external network card IP of opposite terminal control board B7 as IP-b.IP-a and IP-B as same subnet.
Step two: and performing redundancy switching in the control board A7, detecting the health states of the control board A7 and the PEP-A8 every 1 second by the redundancy switching, setting the floating IP of the external network card in the control board A7 as IP-c, and sending state information in a multicast mode through a heartbeat wire. And the control board B7 performs redundancy switching, the redundancy switching detects the health states of the control board B7 and the PEP-B8 every 1 second, and multicast information is received through a heartbeat line.
Step three: when the control board A7 detects abnormality, the floating IP of the external network card in the control board A7 is cleared, and the state information is stopped from being sent through the heartbeat wire. And when the control board B7 does not receive the multicast information, setting the floating IP of the external network card in the control board B7 as IP-c.
Step four: when the detection of the redundancy switching software in the control panel A7 is normal, the floating IP of the external network card in the control panel A7 is set as IP-c, and the state information is sent again through the heartbeat line. When the control board B7 receives the multicast information again, the floating IP of the external network card in the control board B7 is cleared.
According to the load balancing redundancy switching system with the control board and the switch board directly connected through the buses, the control board and the switch board are directly connected through the PCIe bus, multiple times of conversion of data signals are avoided, network delay is reduced, and network bandwidth is increased. Meanwhile, a redundant switching device is added in a backboard heartbeat mode, and the stability of the system is improved. Network delay is reduced, and network bandwidth is increased; the redundant switching is integrated in the all-in-one machine, so that the deployment complexity and the equipment cost of the network are reduced.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (10)

1. A load balancing redundancy switching system with control boards and switching board buses directly connected is characterized by comprising: the system comprises a first control module, a second control module, a first exchange board and a second exchange board; the first exchange plate includes: a first interface, a second interface, and a first packet switch; the second exchange plate includes: a third interface, a fourth interface, and a second packet switch;
the first control module is used for carrying out communication control on the first exchange board, and the second control module is used for carrying out communication control on the second exchange board; the first interface is a PCIe external interface of the first switch board and is used for transmitting PCIe data input by the first packet switch to the first control module, and the second interface is a PCIe internal interface of the first switch board and is used for transmitting the PCIe data output by the first control module to the first packet switch; the third interface is a PCIe external interface of the second switch board and is configured to transmit PCIe data input by the second packet switch to the second control module, and the fourth interface is a PCIe internal interface of the second switch board and is configured to transmit PCIe data output by the second control module to the second packet switch;
the first control module and the second control module are respectively used for carrying out load balancing on input PCIe data and then outputting the PCIe data; the first control module and the second control module are redundant with each other, so that the first exchange board and the second exchange board form a redundant structure; the first packet switch and the second packet switch are used for converting PCIe data and Ethernet data respectively so as to communicate with an external Ethernet.
2. The load balancing redundant switching system with control board and switch board bus direct connections of claim 1,
the first control module includes: the system comprises a first memory, a first processor and a first network card;
the second control module includes: the second memory, the second processor and the second network card;
the first network card is connected with the second network card through a heartbeat line;
the first control module is used for controlling the communication of the first exchange board;
the second control module is used for controlling the communication of the two exchange boards.
3. The load balancing redundant switching system with control board and switch board bus direct connections of claim 1, further comprising: the first serial EEPROM is used for storing the configuration information of the first exchange board; and the second serial EEPROM is used for storing the configuration information of the second exchange board.
4. The load balancing redundant switching system with control board and switch board bus direct connections of claim 1, further comprising:
the first clock chip is used for providing clock frequency for the first exchange board;
and the second clock chip is used for providing the clock frequency for the second switchboard.
5. The load balancing redundant switching system with control board and switch board bus direct connections of claim 1, further comprising:
a plurality of first ethernet port logics for inputting the input ethernet data to the first packet switch and respectively outputting the ethernet data output from the first packet switch;
and the second Ethernet port logics are used for inputting the input Ethernet data to the second packet switch and respectively outputting the Ethernet data output by the second packet switch.
6. The load-balancing redundant switching system with direct connection of control boards and switch board buses of claim 1, wherein the first interface, the second interface, the third interface and the fourth interface are PCIe network cards.
7. The load-balancing redundant switching system with direct control board and switch board bus connection of claim 1, wherein the first packet switch and the second packet switch are configured to port ethernet data inputted from a plurality of input ports into PCIe data in a unified manner.
8. The load balancing redundant switching system with direct control board and switch board bus connection of claim 1, wherein the first control module communicates status information with the second control module in a multicast manner via a heartbeat line.
9. The load balancing redundant switching system with control board and switch board directly connected by bus as claimed in claim 1, wherein the first control module communicates status information with the second control module every 1 second.
10. The system of claim 1, wherein the first interface is connected to the first controller module via an external PCIe x8 bus, the second interface is connected to the first controller module via an internal PCIe x8 bus, the third interface is connected to the second controller module via an external PCIe x8 bus, and the fourth interface is connected to the second controller module via an internal PCIe x8 bus.
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