CN1079966C - Random code generator - Google Patents
Random code generator Download PDFInfo
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- CN1079966C CN1079966C CN97100489A CN97100489A CN1079966C CN 1079966 C CN1079966 C CN 1079966C CN 97100489 A CN97100489 A CN 97100489A CN 97100489 A CN97100489 A CN 97100489A CN 1079966 C CN1079966 C CN 1079966C
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Abstract
The present invention provides a principle and a device for generating true random codes. The present invention can overcome the defect that keyed-in secret codes and fixed secret codes are not conveniently memorized or are easily imitated and can improve the shortages that secret codes generated according to algorithms can be easily deciphered, and certain complicated true random code devices have large volume. True random codes can be generated, and the present invention is matched with code fetch pulses which occur randomly so as to ensure that the secret codes can not be deciphered or imitated; meanwhile, the present invention has the characteristics of small volume and low power consumption. The present invention can be suitably made into a monolithic integrated circuit and is applied to various fields of safety and security.
Description
The present invention relates to a kind of generation apparatus for encoding, particularly a kind of random code generator.
Be used to encrypt the password of control at present, three kinds of producing methods are arranged: first kind is the keyboard input, and the user is memory accurately, is not easy to use.Second kind is fixed password, need not remember, and as the form that magnetic card, IC-card adopted, this class password is easy to by imitated, and security is very low.The 3rd class is to increase certain cryptographic algorithm, and new password is changed in each back of using, but owing to depend on algorithm, and in computing technique highly developed today, decoding algorithm has not been very difficult, thereby its security is also unsatisfactory.Though the pseudo-random code of Ying Yonging also meets some random statistical characteristic thereafter, still have certain generation rule in essence, grasp this rule and just can dope back one password, thereby also be unsafe by last password, not real one-time pad.Real random code is that it promptly has randomness on physical essence with respect to the advantage of pseudo-random code.Traditional real random code production method is, selects a kind of noise device, as avalanche diode, designs a kind of electronic circuit the noise that produces in its physical process is amplified amplitude limit, becomes the pulse train that a series of pulsewidths do not wait.Go sampling with an irrelevant low-frequency clock then, just can obtain a random digit sequence.Because the pulsewidth of pulse train is that various factors by the noise a little of avalanche effect and concrete electronic circuit is (as enlargement factor, amplitude limit threshold values and working point etc.) determined, therefore in order to make the good random statistical characteristic of the stable maintenance of Serial No., often need to adopt the technical measures such as circuit of temperature compensation, constant temperature and particular design stable operating point, cause the equipment complexity, power consumption is big, body is big, be not suitable for making monolithic integrated optical circuit, is not suitable for microminiature device and daily life electronic product.
The objective of the invention is to overcome the weakness of pseudo-random code in security and some real random code generating device equipment complexity, power consumption is big, bulky weakness design a kind of real random code generator that is applicable to microminiature device and daily life usefulness electronic product.
Technical scheme of the present invention is a kind of random code generator, it is characterized in that being made up of following part:
A power current feedback circuit 1 is used to provide binary digital signal;
A multivibrator is used to produce the digital signal of frequency change;
A shift register is used to produce M sequence binary numeral, and it is imported from multivibrator;
One by or the comparer formed of door, be used for converting the M sequence binary numeral of described shift register output to simulating signal, constitute pseudo-random code, its output terminal connects multivibrator, and its input end connects the output terminal of shift register and power current feedback circuit;
A phaselocked loop voltage controlled oscillator VCO is used to produce the simulating signal that frequency changes with input voltage, and its input end connects power vd D;
A sampler that is made of d type flip flop is used for the signal of phaselocked loop voltage controlled oscillator VCO output is taken a sample, and its input end is connected with the voltage-controlled device VCO that shakes of phaselocked loop, and sampling pulse comes from the outside;
An analog switch that is made of XOR gate is used to produce the random code signal, and its input end connects shift register and sampler respectively, and its output terminal connects multivibrator respectively and exports the random code sequence signal to the outside.
The scheme that real random code of the present invention produces uses an incoherent low-frequency clock (coming from the outside) to go sampling based on the oscillation source of a random frequency hopping then, just can obtain a Serial No. very at random.
Description of drawings:
Fig. 1: random code generator composition frame chart;
Fig. 2: an embodiment circuit diagram of random code generator.
Among the figure, the 1st, the power current feedback circuit.
Referring to Fig. 1, in the technical scheme of the present invention, a power current feedback circuit 1 is arranged, it is a resistor network of being made up of the resistance device of different resistances, and connects direct supply VDD.Its effect is the binary digital signal that different voltages are provided to comparer and shift register.Multivibrator of the present invention is a circuit of being made up of XOR gate and resistance, electric capacity, starting oscillation when the each startup of random code generator powers up, and the digital pulse signal that output frequency changes thereupon along with progressively raising of voltage.This is the serial digital pulse signal of nonlinear characteristic, as control signals of shift registers, is connected to the control input end of shift register by the output terminal of multivibrator.
Shift register produces the binary numeral of M sequence under the effect of multivibrator.Has dissimilarity between the M sequence binary numeral.
In the solution of the present invention, have one by or the comparer formed of door, its effect is that the M sequence binary numeral with shift register output converts simulating signal to, thus the formation pseudo-random code.
In the technical scheme of the present invention, also comprise a phaselocked loop voltage controlled oscillator VCO, the direct supply VDD that is equipped with for random code generator is directly inputted in the phaselocked loop.Owing to during each the startup, all descended to some extent when VDD more last time uses, thereby the output frequency of VCO when each the use was all more different.Promptly control the non-linear VCO of the causing output frequency difference of voltage.Its output signal enters double D trigger.
The effect of double D trigger is by the sample-pulse signal CL from the outside input signal of VCO output to be taken a sample, and then the signal of obtaining is outputed to analog switch.
Analog switch in the technical solution of the present invention is made up of XOR gate, will be from the signal of comparer input with from the signal of double D trigger input, carry out logical operation after, become real random code, and then export to outside the use.
Technical scheme of the present invention, the true randomness of institute's output encoder depends on following factor:
1. the multivibrator output signal is non-linear, and the dissimilarity between the M sequence binary number that produces under this nonlinear properties effect.
2. in the phaselocked loop voltage controlled oscillator, control voltage non-linear, and with the combining of sampling pulse CL time of origin randomness.
3. analog switch logical operation that above two parts of signals is carried out has further increased randomness, thereby has made its output become real random code.
The random code generator of design according to the present invention, it is little, low in energy consumption to have a volume, and the simple and code of circuit has advantages such as true randomness.Be suitable for making monolithic integrated optical circuit, can be used for little, midget plant and daily electronic product.
Provided one embodiment of the present of invention circuit diagram among Fig. 2.
In the present embodiment, all adopt CMOS 4000 serial integrated circuit.
Wherein, 1 serves as reasons power current feedback circuit that different resistance resistive elements constitute connects direct supply VDD.And provide required binary digital signal to comparer and shift register.In the present embodiment, multivibrator is made up of XOR gate and resistance R 1, capacitor C 1, XOR gate is selected 4,070 four XOR gate chips for use, its data input pin 3A (the 8th exit) is connected with the data output end 1Y (the 3rd exit) of analog switch 4070 chips, 4B (the 13rd exit) with or the 1st exit 1Y of door comparer 4072 chips be connected.Its 4th exit 2Y outputs to the 9th end 1CP of shift register 4015 chips, the serial data input end 1DS (the 7th end) of 4015 chips of the 10th exit 3Y output.Fig. 2 is seen in being connected of R1 and C1.In the present embodiment, shift register is selected two 4 bit shift register, 4015 chips for use, and its data output end 1Q3,1Q2,1Q1,1Q0,2Q2,2Q1,2Q0 are connected to power current feedback circuit and or door comparer respectively simultaneously.Or a door comparer selects two four inputs or door chip 4072 for use, and its data output end 1Y (the 1st exit) is connected to the data input pin 4B of multivibrator, and 2Y (the 13rd exit) feeds back to data input pin 1D (the 5th exit).The phaselocked loop voltage controlled oscillator VCO is selected 4046 chips for use, and its input end VCO in (the 9th exit) is connected with direct supply VDD, and output terminal VCOout (the 4th exit) is connected to the double D trigger sampler.Sampler is selected two rising edge d type flip flop 4013 chips for use, its data input pin 1D (the 5th exit) connects the 4th exit VCOout of VCO, true form output terminal 1Q and 2Q (the 1st and the 13rd exit) link data input pin 2A, the 2B (the 5th, 6 exit) of analog switch 4070 chips respectively, and the sampling pulse CL of outside input is connected clock 1CP and 2CP end (the 3rd and the 11st exit).Analog switch is selected four XOR gate, 4070 chips for use, its data input pin 1A, 1B connect the 2Q2 and the 2Q1 output terminal (the 11st, 12 exit) of shift register 4015 respectively, 2A, 2B (the 5th, 6 exit) connect the 1Q and the 2Q end of sampler 4013 chips respectively, data output end 1Y is connected to multivibrator 4070,2Y (the 4th exit) is the final data output of random code generator, output random code burst.
The dry cell direct supply of VDD for being equipped with among this embodiment.CL is the sample-pulse signal from the outside input.D is the real random code sequence signal of output.
Above-mentioned connection is an example.The type of each integrated circuit is not so limited, and allows to select for use functionally similar assembly.
Claims (1)
1, a kind of random code generator is characterized in that being made up of following part:
A power current feedback circuit (1) is used to provide binary digital signal;
A multivibrator is used to produce the digital signal of frequency change;
A shift register is used to produce M sequence binary numeral, and it is imported from multivibrator;
One by or the comparer formed of door, be used for converting the M sequence binary numeral of described shift register output to simulating signal, constitute pseudo-random code, its output terminal connects multivibrator, and its input end connects the output terminal of shift register and power current feedback circuit;
A phaselocked loop voltage controlled oscillator (VCO) is used to produce the simulating signal that frequency changes with input voltage, and its input end connects power supply (VDD);
A sampler that is made of d type flip flop is used for the signal of phaselocked loop voltage controlled oscillator (VCO) output is taken a sample, and its input end is connected with the voltage-controlled device that shakes of phaselocked loop (VCO), and sampling pulse comes from the outside;
An analog switch that is made of XOR gate is used to produce the random code signal, and its input end connects shift register and sampler respectively, and its output terminal connects multivibrator respectively and exports the random code sequence signal to the outside.
Priority Applications (1)
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CN97100489A CN1079966C (en) | 1997-02-05 | 1997-02-05 | Random code generator |
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CN97100489A CN1079966C (en) | 1997-02-05 | 1997-02-05 | Random code generator |
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CN1165436A CN1165436A (en) | 1997-11-19 |
CN1079966C true CN1079966C (en) | 2002-02-27 |
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CN97100489A Expired - Fee Related CN1079966C (en) | 1997-02-05 | 1997-02-05 | Random code generator |
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CN100460623C (en) * | 2005-06-20 | 2009-02-11 | 张七利 | Method for opening electronic coded lock and electronic coded lock device |
CN100435089C (en) * | 2005-12-16 | 2008-11-19 | 华南师范大学 | Device and method for producing true random codes |
CN111540102B (en) * | 2020-04-30 | 2022-01-04 | 华南师范大学 | Dynamic password circuit, access control system and access control method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3946215A (en) * | 1974-09-30 | 1976-03-23 | The Boeing Company | Pseudo-random code generator |
CN2068254U (en) * | 1990-05-28 | 1990-12-26 | 中国人民解放军57351部队 | Information leakage prevention related interference unit |
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- 1997-02-05 CN CN97100489A patent/CN1079966C/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3946215A (en) * | 1974-09-30 | 1976-03-23 | The Boeing Company | Pseudo-random code generator |
CN2068254U (en) * | 1990-05-28 | 1990-12-26 | 中国人民解放军57351部队 | Information leakage prevention related interference unit |
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