CN107992009A - A kind of safe level DCS emulators based on FPGA - Google Patents
A kind of safe level DCS emulators based on FPGA Download PDFInfo
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- CN107992009A CN107992009A CN201711326067.4A CN201711326067A CN107992009A CN 107992009 A CN107992009 A CN 107992009A CN 201711326067 A CN201711326067 A CN 201711326067A CN 107992009 A CN107992009 A CN 107992009A
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- G—PHYSICS
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/41885—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by modeling, simulation of the manufacturing system
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/4184—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by fault tolerance, reliability of production system
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25232—DCS, distributed control system, decentralised control unit
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract
The invention belongs to control system DCS emulator technical fields, and in particular to a kind of safe level DCS emulators based on FPGA.Emulation of the technical solution of the present invention to FPGA algorithm performs devices, its data processing, the operating mechanism of the scheduling of algorithmic block and actual FPGA controller perform consistent.What You See Is What You Get, can pass through operation logic on emulator debugging and verification FPGA；Diagnosis of the FPGA controller to the failure of each EM equipment module in each DCS control systems is simulated, can simulated failure state debugging failure safe function；The maintenance procotol based on data link layer is simulated, seamless with FPGA emulators FPGA hardware can be replaced to be downloaded by engineer station and debugging operations.
Description
Technical field
The invention belongs to control system DCS emulator technical fields, and in particular to a kind of safe level DCS based on FPGA is imitated
True device.
Background technology
By safe level DCS emulator softwares, virtual safe level DCS can be built without using actual hardware device and put down
Platform.The cost of hardware device and rigging up and debugging is saved, while is easy to the equipment fault situation of simulating Safety level platform, into
The debugging verification of relay protective scheme under row fault condition.
And the operating mechanism of the DCS of the safe level based on FPGA is from traditional different based on CPU or DSP, so imitative
The design method of true device is also different.Therefore, there is an urgent need for being emulated for the safe level DCS based on FPGA, and should wrap
Include to FPGA algorithm performs, interior communication and design with the communication function of engineer station.
The content of the invention
It is above-mentioned to solve the technical problem to be solved in the present invention is to provide a kind of safe level DCS emulators based on FPGA
Problem.
In order to realize this purpose, the present invention adopts the technical scheme that：
A kind of safe level DCS emulators based on FPGA, including communication module, emulator control module, algorithm FPGA are imitated
True module, algorithm library module；The communication module of multiple virtual FPGA controllers, emulator is supported to control mould by single machine
Run while block, algorithm FPGA emulation modules and algorithm library module, realize the virtual operation of whole station DCS；Wherein：
1. communication module safeguards that procotol emulates to FPGA, realize and Engineering Algorithm debugging routine, lower dress program
And the running memory of FPGA emulators is communicated；
2. the function of emulator control module emulation communication FPGA, realizes that emulator core FPGA algorithms are held by the module
Row device and extraneous data interaction, the function for calling configuration file to download, the state control of FPGA algorithm performs devices, and FPGA become
Measure the data exchange between area and algorithm performs device；
3. algorithm FPGA emulation modules are the cores that FPGA controller performs, the scheduling of algoritic module is completed by the module
With data processing；
4. algorithm library module realizes all FPGA algorithmic blocks, external data Fabric Interface and FPGA are completely the same.
Further, a kind of safe level DCS emulators based on FPGA as described above, algorithm FPGA emulation modules are imitated
True operating mechanism is consistent with actual FPGA controller.
Further, a kind of safe level DCS emulators based on FPGA as described above, algorithms library inside modules calculating method
The implementation of logical AND FPGA is consistent.
Further, a kind of safe level DCS emulators based on FPGA as described above, are realized to list by above-mentioned module
The emulation of the FPGA that stands operations, function include：Safeguard the emulation of network, the control of FPGA controller pattern, algorithm performs device and calculation
The emulation of method functional block operation and the support of algorithm debugging.
Further, a kind of safe level DCS emulators based on FPGA as described above, the function which realizes it
When：Emulator supports the emulation in engine and algorithm function block storehouse；
Algorithm FPGA emulation modules realize the input, output and arithmetic logic of all functions block in FPGA controller；
The algorithm information of emulator control module loading configuration compiling generation, the variable input of emulation FPGA algorithm performs devices
Output, the scheduling of FPGA functional blocks, pattern switching, memory management, Clock management, algorithm configuration solution comprising Virtual Controller
Analysis, algorithm drives and module schedules；
Emulator control module safeguards the real-time of network transmission algorithm block inputoutput data by what communication module emulated
Value, to support the monitoring of algorithm and debugging.
Further, a kind of safe level DCS emulators based on FPGA as described above, the function which realizes it
When：FPGA controller scheme control；
The start and stop of FPGA emulators, and the pattern of operation are set；
Emulator control module, which is responsible for running mode switching, to be included lower dress, safeguards and run:
Under under die-filling formula, communication module emulation carries out being attached to FPGA under variable and algorithm compiling information by engineer station
Emulator；
Under service mode and operational mode, fpga logic operation result is write the change of emulator by algorithm FPGA emulation modules
Measure area and algorithm data area；
Under service mode, inquiry, the input of algorithm data area current page algorithmic block of communication mode artificial variable area instantaneous value
The inquiry and the compulsory emulation of variable range numerical value of output data instantaneous value；
Under operational mode, the real-time value information of variable range of communication module emulation controller active broadcast, to realize that algorithm is transported
Monitored during the operation of market condition.
Further, a kind of safe level DCS emulators based on FPGA as described above, the function which realizes it
When：Algorithm debugging is supported；
Based on virtual DCS tool software, with reference to NicSafeware engineer station's tool software realize algorithm offline debugging and
Verification is supported, on the basis of emulation, the operation that algorithm debugging can carry out is divided into two classes：The read operation of periodic data and non-
The constrained variable operation of cycle data；
For common DI/DO variables in relay protective scheme, set DI's by the graphic interface of simulation tool software
Value is simultaneously written into emulator variable range by emulator control module, observes the output for the corresponding DO that communication module returns afterwards
To carry out the debugging of algorithm.
Further, a kind of safe level DCS emulators based on FPGA as described above, the function bag which realizes
Include：
Multiple FPGA emulators processes are placed in a LAN, pass through what is communicated between emulator control module reader station
Configuration configures, and emulates the interaction of different emulator variable ranges, realizes the variable communication between emulation FPGA controller；
MAC Address in FPGA communication modules is set to consistent with actual FPGA controller, passes through Ethernet and engineering
Teacher, which stands, to be connected, and the debugging and verification of safe level relay protective scheme is carried out instead of actual FPGA hardware device；
The diagnostic markers position in the equipment state area in emulator is configured by emulator control module, simulation is actual
The equipment fault of FPGA and diagnostic message, easy to the debugging and verification of failure safe function.
The beneficial effect of technical solution of the present invention is：Can be in the feelings of no entity hardware device by software simulator
Under condition, the off-line verification of FPGA algorithms and control strategy is realized.The cost of hardware device and rigging up and debugging is saved, at the same time
Easy to the equipment fault situation of simulating Safety level platform, the debugging verification of the relay protective scheme under fault condition is carried out.
Brief description of the drawings
Fig. 1 is the safe level DCS emulator schematic diagrames of the invention based on FPGA.
In figure：1 communication module, 2 emulator control modules, 3 algorithm FPGA emulation modules, 4 algorithm library modules.
Embodiment
Technical solution of the present invention is described in detail with specific embodiment below in conjunction with the accompanying drawings.
As shown in Figure 1, a kind of safe level DCS emulators based on FPGA of the present invention, including the control of communication module, emulator
Module, algorithm FPGA emulation modules, algorithm library module；The communication mould of multiple virtual FPGA controllers is supported by single machine
Run while block, emulator control module, algorithm FPGA emulation modules and algorithm library module, realize the virtual fortune of whole station DCS
OK；Wherein：
1. communication module safeguards that procotol emulates to FPGA, realize and Engineering Algorithm debugging routine, lower dress program
And the running memory of FPGA emulators is communicated；
2. the function of emulator control module emulation communication FPGA, realizes that emulator core FPGA algorithms are held by the module
Row device and extraneous data interaction, the function for calling configuration file to download, the state control of FPGA algorithm performs devices, and FPGA become
Measure the data exchange between area and algorithm performs device；
3. algorithm FPGA emulation modules are the cores that FPGA controller performs, the scheduling of algoritic module is completed by the module
With data processing；The simulation run mechanism of algorithm FPGA emulation modules is consistent with actual FPGA controller.
4. algorithm library module realizes all FPGA algorithmic blocks, external data Fabric Interface and FPGA are completely the same.Algorithm
The implementation of library module internal calculation method logical AND FPGA is consistent.
Emulation to single station FPGA operations is realized by above-mentioned module, function includes：Safeguard emulation, the FPGA controls of network
The support of the control of device pattern, the emulation of algorithm performs device and the operation of algorithm function block and algorithm debugging.
The function that the emulator is realized includes：
1. emulator supports the emulation in engine and algorithm function block storehouse；
Algorithm FPGA emulation modules realize the input, output and arithmetic logic of all functions block in FPGA controller；
The algorithm information of emulator control module loading configuration compiling generation, the variable input of emulation FPGA algorithm performs devices
Output, the scheduling of FPGA functional blocks, pattern switching, memory management, Clock management, algorithm configuration solution comprising Virtual Controller
Analysis, algorithm drives and module schedules；
Emulator control module safeguards the real-time of network transmission algorithm block inputoutput data by what communication module emulated
Value, to support the monitoring of algorithm and debugging；
2. FPGA controller scheme control；
The start and stop of FPGA emulators, and the pattern of operation are set；
Emulator control module, which is responsible for running mode switching, to be included lower dress, safeguards and run:
Under under die-filling formula, communication module emulation carries out being attached to FPGA under variable and algorithm compiling information by engineer station
Emulator；
Under service mode and operational mode, fpga logic operation result is write the change of emulator by algorithm FPGA emulation modules
Measure area and algorithm data area；
Under service mode, inquiry, the input of algorithm data area current page algorithmic block of communication mode artificial variable area instantaneous value
The inquiry and the compulsory emulation of variable range numerical value of output data instantaneous value；
Under operational mode, the real-time value information of variable range of communication module emulation controller active broadcast, to realize that algorithm is transported
Monitored during the operation of market condition；
3. algorithm debugging is supported；
Based on virtual DCS tool software, with reference to NicSafeware engineer station's tool software realize algorithm offline debugging and
Verification is supported, on the basis of emulation, the operation that algorithm debugging can carry out is divided into two classes：The read operation of periodic data and non-
The constrained variable operation of cycle data；
For common DI/DO variables in relay protective scheme, set DI's by the graphic interface of simulation tool software
Value is simultaneously written into emulator variable range by emulator control module, observes the output for the corresponding DO that communication module returns afterwards
To carry out the debugging of algorithm；
4. multiple FPGA emulators processes are placed in a LAN, by being communicated between emulator control module reader station
Configuration configuration, emulate the interaction of different emulator variable ranges, realize the variable communication between emulation FPGA controller；
5. the MAC Address in FPGA communication modules is set to consistent with actual FPGA controller, pass through Ethernet and work
Cheng Shizhan connections, the debugging and verification of safe level relay protective scheme is carried out instead of actual FPGA hardware device；
6. being configured by emulator control module to the diagnostic markers position in the equipment state area in emulator, simulation is real
The equipment fault of border FPGA and diagnostic message, easy to the debugging and verification of failure safe function.
According to above-mentioned specific embodiment, the present invention compared with prior art the advantages of be：
Emulation to FPGA algorithm performs devices, its data processing, the operating mechanism of the scheduling of algorithmic block and actual FPGA control
Device processed performs consistent.What You See Is What You Get, can pass through operation logic on emulator debugging and verification FPGA；
Diagnosis of the FPGA controller to the failure of each EM equipment module in each DCS control systems is simulated, event can be simulated
Barrier state debugs failure safe function；
Simulate the maintenance procotol based on data link layer, can be seamless replace FPGA hardware with FPGA emulators
Downloaded by engineer station and debugging operations.
Claims (9)
- A kind of 1. safe level DCS emulators based on FPGA, it is characterised in that：Including communication module, emulator control module, calculate Method FPGA emulation modules, algorithm library module；Communication module, the emulator of multiple virtual FPGA controllers are supported by single machine Run while control module, algorithm FPGA emulation modules and algorithm library module, realize the virtual operation of whole station DCS；Wherein：1. communication module safeguards that procotol emulates to FPGA, realize with Engineering Algorithm debugging routine, it is lower dress program and The running memory of FPGA emulators is communicated；2. the function of emulator control module emulation communication FPGA, emulator core FPGA algorithm performs devices are realized by the module With extraneous data interaction, the function for calling configuration file to download, the state control of FPGA algorithm performs devices, and FPGA variable ranges With the data exchange between algorithm performs device；3. algorithm FPGA emulation modules are the cores that FPGA controller performs, scheduling and the number of algoritic module are completed by the module According to processing；4. algorithm library module realizes all FPGA algorithmic blocks, external data Fabric Interface and FPGA are completely the same.
- A kind of 2. safe level DCS emulators based on FPGA as claimed in claim 1, it is characterised in that：Algorithm FPGA is emulated The simulation run mechanism of module is consistent with actual FPGA controller.
- A kind of 3. safe level DCS emulators based on FPGA as claimed in claim 2, it is characterised in that：In algorithm library module The implementation of portion calculating method logical AND FPGA is consistent.
- A kind of 4. safe level DCS emulators based on FPGA as claimed in claim 3, it is characterised in that：Pass through above-mentioned module Realize the emulation to single station FPGA operations, function includes：Safeguard that the emulation of network, the control of FPGA controller pattern, algorithm are held The support of the emulation and algorithm debugging of row device and the operation of algorithm function block.
- A kind of 5. safe level DCS emulators based on FPGA as claimed in claim 4, it is characterised in that：The emulator is realized One of function be：Emulator supports the emulation in engine and algorithm function block storehouse；Algorithm FPGA emulation modules realize the input, output and arithmetic logic of all functions block in FPGA controller；The algorithm information of emulator control module loading configuration compiling generation, the variable input of emulation FPGA algorithm performs devices are defeated Go out, the scheduling of FPGA functional blocks, pattern switching, memory management, Clock management comprising Virtual Controller, algorithm configuration parsing, Algorithm drives and module schedules；The instantaneous value for safeguarding network transmission algorithm block inputoutput data that emulator control module is emulated by communication module, with Support the monitoring and debugging of algorithm.
- A kind of 6. safe level DCS emulators based on FPGA as claimed in claim 4, it is characterised in that：The emulator is realized One of function be：FPGA controller scheme control；The start and stop of FPGA emulators, and the pattern of operation are set；Emulator control module, which is responsible for running mode switching, to be included lower dress, safeguards and run:Under under die-filling formula, communication module emulation by engineer station carries out variable and algorithm compiles and FPGA is attached under information emulates Device；Under service mode and operational mode, fpga logic operation result is write the variable range of emulator by algorithm FPGA emulation modules With algorithm data area；Under service mode, inquiry, the current page algorithmic block input and output of algorithm data area of communication mode artificial variable area instantaneous value The inquiry and the compulsory emulation of variable range numerical value of data instantaneous value；Under operational mode, the real-time value information of variable range of communication module emulation controller active broadcast, to realize that algorithm runs feelings Monitored during the operation of condition.
- A kind of 7. safe level DCS emulators based on FPGA as claimed in claim 4, it is characterised in that：The emulator is realized One of function be：Algorithm debugging is supported；Based on virtual DCS tool software, the offline debugging and verification of algorithm is realized with reference to NicSafeware engineer station's tool software Support, on the basis of emulation, the operation that algorithm debugging can carry out is divided into two classes：The read operation of periodic data and aperiodic The constrained variable operation of data；For common DI/DO variables in relay protective scheme, the value of DI is set simultaneously by the graphic interface of simulation tool software Emulator variable range is written into by emulator control module, afterwards observe communication module return corresponding DO output come into The debugging of row algorithm.
- A kind of 8. safe level DCS emulators based on FPGA as claimed in claim 4, it is characterised in that：The emulator is realized Function include：Multiple FPGA emulators processes are placed in a LAN, pass through the configuration communicated between emulator control module reader station Configuration, emulates the interaction of different emulator variable ranges, realizes the variable communication between emulation FPGA controller；MAC Address in FPGA communication modules is set to consistent with actual FPGA controller, passes through Ethernet and engineer station Connection, the debugging and verification of safe level relay protective scheme is carried out instead of actual FPGA hardware device；The diagnostic markers position in the equipment state area in emulator is configured by emulator control module, simulates actual FPGA Equipment fault and diagnostic message, easy to the debugging and verification of failure safe function.
- A kind of 9. safe level DCS emulators based on FPGA as claimed in claim 4, it is characterised in that：The emulator is realized Function include：1. emulator supports the emulation in engine and algorithm function block storehouse；Algorithm FPGA emulation modules realize the input, output and arithmetic logic of all functions block in FPGA controller；The algorithm information of emulator control module loading configuration compiling generation, the variable input of emulation FPGA algorithm performs devices are defeated Go out, the scheduling of FPGA functional blocks, pattern switching, memory management, Clock management comprising Virtual Controller, algorithm configuration parsing, Algorithm drives and module schedules；The instantaneous value for safeguarding network transmission algorithm block inputoutput data that emulator control module is emulated by communication module, with Support the monitoring and debugging of algorithm；2. FPGA controller scheme control；The start and stop of FPGA emulators, and the pattern of operation are set；Emulator control module, which is responsible for running mode switching, to be included lower dress, safeguards and run:Under under die-filling formula, communication module emulation by engineer station carries out variable and algorithm compiles and FPGA is attached under information emulates Device；Under service mode and operational mode, fpga logic operation result is write the variable range of emulator by algorithm FPGA emulation modules With algorithm data area；Under service mode, inquiry, the current page algorithmic block input and output of algorithm data area of communication mode artificial variable area instantaneous value The inquiry and the compulsory emulation of variable range numerical value of data instantaneous value；Under operational mode, the real-time value information of variable range of communication module emulation controller active broadcast, to realize that algorithm runs feelings Monitored during the operation of condition；3. algorithm debugging is supported；Based on virtual DCS tool software, the offline debugging and verification of algorithm is realized with reference to NicSafeware engineer station's tool software Support, on the basis of emulation, the operation that algorithm debugging can carry out is divided into two classes：The read operation of periodic data and aperiodic The constrained variable operation of data；For common DI/DO variables in relay protective scheme, the value of DI is set simultaneously by the graphic interface of simulation tool software Emulator variable range is written into by emulator control module, afterwards observe communication module return corresponding DO output come into The debugging of row algorithm；4. multiple FPGA emulators processes are placed in a LAN, pass through the group communicated between emulator control module reader station State configures, and emulates the interaction of different emulator variable ranges, realizes the variable communication between emulation FPGA controller；5. the MAC Address in FPGA communication modules is set to consistent with actual FPGA controller, pass through Ethernet and engineer Stand connection, the debugging and verification of safe level relay protective scheme is carried out instead of actual FPGA hardware device；6. being configured by emulator control module to the diagnostic markers position in the equipment state area in emulator, simulation is actual The equipment fault of FPGA and diagnostic message, easy to the debugging and verification of failure safe function.
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| CN109407638A (en) * | 2018-12-07 | 2019-03-01 | 南京核新数码科技有限公司 | Industrial control system information security implementation method based on the virtual DCS of FPGA |
| CN111308974A (en) * | 2020-02-27 | 2020-06-19 | 杭州和利时自动化有限公司 | Method, system and equipment for controlling DCS simulation system |
| CN111427781A (en) * | 2020-03-19 | 2020-07-17 | 北京广利核系统工程有限公司 | Logic function testing method and platform compatible with simulation and entity |
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| CN111308974A (en) * | 2020-02-27 | 2020-06-19 | 杭州和利时自动化有限公司 | Method, system and equipment for controlling DCS simulation system |
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| CN113703404A (en) * | 2021-08-27 | 2021-11-26 | 浙江中控技术股份有限公司 | Fault simulation monitoring and diagnosis method and device, electronic device and storage medium |
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