CN107959549B - Label signal decoding method, label decoding device and label reader - Google Patents
Label signal decoding method, label decoding device and label reader Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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Abstract
The invention relates to the technical field of RFID (radio frequency identification) radio frequency, in particular to a tag signal decoding method, a tag decoding device and a tag reader. The method comprises a data sampling step, a frame header detection step and a data decoding step. In the step of detecting the frame header, the matching degree of a frame header template sequence and a label data signal sequence is measured by using a correlation coefficient, and the frame header is accurately searched in a waveform comparison mode; in the data decoding step, a data sequence of one bit period is extracted according to the sampling multiple N and the level jump condition of the data part, so that the problem of decoding failure caused by a certain degree of frequency offset can be solved; the value operand of the data bit is determined according to the accumulated value, the judgment result is reliable, and certain fault tolerance is achieved.
Description
Technical Field
The invention relates to the technical field of RFID (radio frequency identification) radio frequency, in particular to a tag signal decoding method, a tag decoding device and a tag reader.
Background
The rfid (radio Frequency identification) technology is an automatic identification technology for performing non-contact bidirectional communication by using induction, radio waves, or microwaves for the purpose of identification and data exchange, and can track and manage all physical objects by using the technology. The signal decoding quality of the RFID label directly influences the sensitivity and the throughput of the reader-writer and becomes an important index for evaluating the performance of the reader-writer.
According to the specification of the GB29768 standard, the label signal returned by the RFID label to the RFID reader-writer is in an FM0 encoding format. The tag signal includes a frame header portion and a data portion.
The FM0 coding is characterized in that: the different logics are represented by the change of level within one bit window. If the level is only flipped (i.e., changed) at the beginning of the bit window and not flipped elsewhere, a logical "1" is indicated; a logic "0" is indicated if the level toggles at both the beginning of the bit window and in the middle of the bit window. In addition, according to the FM0 encoding rule, whether the transmitted symbol is "0" or "1", level flip needs to occur at the beginning of the bit window. Fig. 1 shows a data waveform diagram for four FM encoding formats. Wherein, S1, S4 represent logic "1", S2, S3 represent logic "0". Fig. 2 shows a state switching diagram between S1, S2, S3, S4.
In the prior art, when a frame header of a tag signal is searched, the following judgment is usually performed according to the strength of the tag signal: when the signal strength is greater than a certain threshold, the signal strength is regarded as the frame header of the label signal, and then the decoding process of the subsequent data part is started. When the signal-to-noise ratio of the label signal is small, the noise is easily mistaken as an effective frame header, so that a decoding process is started mistakenly, a real effective signal is missed, and the decoding success rate is reduced.
The invention patent application of application publication No. CN104361370A, application publication date 2015, 2.18 discloses a method for judging FM0 encoding frame headers of an ultrahigh frequency RFID reader-writer, which utilizes the provisions about frame header signals in an EPC protocol to grasp a main frame header judging mark V, improves the fault tolerance of code elements in a receiving initial section, and recovers the sensitivity of error code judgment after stable receiving to realize that the efficiency of correct judgment of the frame headers is improved, invalid signals are ensured to be found in time and communication is terminated. However, this technical solution is only suitable for the problem that the tag signal is erroneously determined as invalid communication when the start portion of the frame header is deviated due to interference. If the interference occurs in the middle of the frame header, the frame header cannot be recognized.
There are two main methods for decoding the data portion of FM0 tag signals in the prior art:
and carrying out fixed point segmentation on the sampling data according to a certain frequency, wherein the segmented point is determined by a sampling multiple. For example, in the case of quadruple sampling, the data portion is sliced in units of four sampling points, and then each unit (four sampling points) is decoded according to the FM0 encoding rule. When there is a deviation in the frequency of the tag signal, there is an error in slicing the sampled data, and this error accumulates. The larger the amount of data, the larger the error, which easily causes decoding errors of data portions later in time sequence.
The invention patent application of application publication No. CN104361383A, application publication date 2015, 2 months and 18 days discloses a decoding method for an FM0 code of an ultrahigh frequency RFID reader-writer. And extracting the actual frequency of the label signal by using a frequency extraction module, then obtaining an ideal template of the next code element according to the extracted actual frequency, and determining the value of the code element according to the result of comparing the actual signal of the next code element with the ideal template. It is necessary to dynamically acquire the actual frequency of the tag signal, and dynamically generate an ideal template for each symbol of the tag signal (i.e., a signal of each bit of tag data) according to the acquired actual frequency and compare the actual signal with the ideal template. The system is complex to realize, high in cost and large in computation.
Decoding is performed by sampling the rising or falling edges of the data portion signal. One of the methods is as follows: the time interval between two adjacent falling edges of the sampled data part signal respectively represents different level data at 1T, 1.5T and 2T according to the encoding rule of FM0 (for example, the minimum bit period of FM0 is T), the time interval between two adjacent falling edges is converted into corresponding high and low level information according to the encoding rule, and the extraction decoding is carried out based on the information which is combined according to the time sequence. This decoding scheme places very high demands on the quality of the tag signal, and the method using signal edges will fail when there is a glitch in the signal.
Disclosure of Invention
The invention provides a label signal decoding method based on FM0 coding, which can accurately search a frame header of a label signal and improve the decoding success rate when the label signal is subjected to frequency offset. The tag signal decoding method includes:
data sampling, namely sampling the received tag analog signal by N times to obtain a tag digital signal sequence;
frame header detection, namely calculating the correlation degree of a label digital signal sequence and a preset frame header sequence, and storing the label digital signal sequence from the moment when the correlation degree is greater than a preset value;
data decoding, bit-wise decoding a data portion of the tag data signal sequence;
in the data decoding step, a data sequence of one bit period in the data part is extracted according to a sampling multiple N and the level jump condition of the data part, and the value of the data bit corresponding to the data sequence is determined according to the accumulated value of the data sequence.
In the technical scheme, the matching degree of the frame header sequence and the label data signal sequence is measured by using the correlation coefficient, and the frame header is accurately searched in a waveform comparison mode; extracting a data sequence of a bit period according to the sampling multiple N and the level jump condition of the data part, and solving the problem of decoding failure caused by a certain degree of frequency offset; the value operand of the data bit is determined according to the accumulated value, the judgment result is reliable, and certain fault tolerance is achieved.
Further, in the frame header detection step, the correlation degree
Wherein x (t) represents the value of the tag digital signal sequence at time t, and y (t) represents the value of the frame header sequence at time t.
Further, the data decoding step includes:
bit data extraction, namely extracting a data sequence of a first bit period of a data part of the tag digital signal sequence according to a sampling multiple N and the level jump condition of the data part; if the extraction is successful, taking the residual data part as a new data part and entering a bit data decoding step; otherwise, ending the data decoding;
bit data decoding, namely performing accumulation operation on the extracted data sequence, and determining the value of the data bit corresponding to the data sequence according to the accumulated value of the accumulation operation; if the new data part is not empty, returning to the bit data extraction step; otherwise, the data decoding is ended.
Further, in the bit data extracting step, if a level jump occurs to the mth data point of the data portion and (N-a) < = (M-1) < = (N + a), extracting a data point before the mth data point of the data portion as a data sequence of one bit period; wherein a is a frequency offset factor.
Further, in the bit data decoding step:
determining that the value of the data bit corresponding to the data sequence is 1 if the accumulated value is an integer between 0 and b or the accumulated value is an integer between (M-1-b) to (M-1);
otherwise, determining the value of the data bit corresponding to the data sequence to be 0; where b is a fault tolerance factor.
The invention provides a label signal decoding device based on FM0 coding, which can accurately search a frame header of a label signal and improve the decoding success rate when the label signal is subjected to frequency offset. The tag signal decoding apparatus includes:
the data sampling module is used for sampling the received tag analog signal by N times to obtain a tag digital signal sequence;
the frame header detection module is used for calculating the correlation degree between the label digital signal sequence obtained by the data sampling module and the frame header sequence and storing the label digital signal sequence to a storage unit from the moment when the correlation degree is greater than a preset value;
a data decoding module for decoding a data portion of the tag data signal sequence in the memory cell by bit;
and the data decoding module extracts a data sequence of one bit period in the data part according to the sampling multiple N and determines the value of the data bit corresponding to the data sequence according to the accumulated value of the data sequence.
In the technical scheme, the matching degree of the frame header sequence and the label data signal sequence is measured by using the correlation coefficient, and the frame header is accurately searched in a waveform comparison mode; extracting a data sequence of a bit period according to the sampling multiple N and the level jump condition of the data part, and solving the problem of decoding failure caused by a certain degree of frequency offset; the value operand of the data bit is determined according to the accumulated value, the judgment result is reliable, and certain fault tolerance is achieved.
Further, the frame headerThe detection module is based on the formula
And calculating a correlation degree Pxy, wherein x (t) represents the value of the label digital signal sequence at the time t, and y (t) represents the value of the frame header sequence at the time t.
Further, the data decoding module includes:
the bit data extraction unit is used for extracting a data sequence of a first bit period of a data part of the tag digital signal sequence according to the sampling multiple N; if the extraction is successful, taking the residual data part as a new data part, and inputting the extracted data sequence into a bit data decoding unit;
and the bit data decoding unit comprises an accumulator for accumulating the data sequence extracted by the bit data extracting unit, and determines the value of the data bit corresponding to the data sequence according to the accumulated value calculated by the accumulator.
Further, the bit data extracting unit extracts a data point before an mth data point of the data part as a data sequence of one bit period if a level jump occurs at the mth data point of the data part and (N-a) < = (M-1) < = (N + a); wherein a is a frequency offset factor.
Further, the bit data decoding unit:
determining that the value of the data bit corresponding to the data sequence is 1 if the accumulated value is an integer between 0 and b or the accumulated value is an integer between (M-1-b) to (M-1);
otherwise, determining that the value of the data bit corresponding to the data sequence is 0.
The invention provides a tag reader which can accurately search a frame header of a tag signal and improve the decoding success rate in tag signal frequency offset. The tag reader comprises the tag signal decoding device of any one of the above.
In the technical scheme, a tag signal decoding device of a tag reader measures the matching degree of a frame header sequence and a tag data signal sequence by using a correlation coefficient, and accurately searches for a frame header in a waveform comparison mode; extracting a data sequence of a bit period according to the sampling multiple N and the level jump condition of the data part, and solving the problem of decoding failure caused by a certain degree of frequency offset; the value operand of the data bit is determined according to the accumulated value, the judgment result is reliable, and certain fault tolerance is achieved.
Drawings
Fig. 1 is a diagram of data waveforms for four FM encoding formats.
Fig. 2 is a state switching diagram between S1, S2, S3, S4 shown in fig. 1.
Fig. 3 is a data pattern of the FM0 header.
Fig. 4 is a system diagram of a decoding apparatus according to an embodiment of the present invention.
Fig. 5 is a diagram of correlation results calculated by the frame header detection step/module according to the embodiment of the present invention.
Fig. 6 is a schematic time deviation diagram of the beginning of the tag digital signal sequence and the beginning of the data portion of the tag digital signal sequence stored in the embodiment of the present invention.
Fig. 7 is a schematic diagram of a decoding result when a tag signal waveform is deformed according to an embodiment of the present invention.
FIG. 8 is a diagram illustrating the decoding result of the embodiment of the present invention when the tag signal has a waveform frequency offset of-12.5%.
Fig. 9 is a schematic diagram of a decoding result when the tag signal waveform is offset by +12.5% according to an embodiment of the present invention.
Detailed Description
The following describes the tag signal decoding method and decoding apparatus in further detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are designed in a very simplified form and not to scale so as to facilitate and clarify the description of the embodiments of the invention.
Example one
A tag signal decoding method, comprising the steps of:
data sampling
The received tag analog signal is sampled at a sampling rate of N times (in this embodiment, 8 times sampling rate is taken as an example, i.e., N = 8) to obtain an original tag digital signal sequence.
1. And carrying out high-speed digital sampling on the received label analog signal at the sampling rate of N times to obtain an original label digital signal sequence.
2. And performing digital filtering on an original label digital signal sequence obtained by high-speed digital sampling to filter high-frequency signals in the original label digital signal, so that noise signals can be effectively removed.
3. And (3) carrying out high-low level discrimination on the filtered original label digital signal: samples above the zero crossing detection threshold are considered high level "1" and samples below a certain threshold are considered low level "0". Obtain the label digital signal sequence represented by the sequence of "0" and "1".
Frame header detection
And calculating the correlation degree of the label digital signal sequence and the frame header sequence, and storing the label digital signal sequence from the moment when the correlation degree is greater than a preset value.
The label digital signal sequence includes a frame header portion and a data portion. The frame header part conforms to the FM0 preamble (i.e., frame header) rule shown in fig. 3, and the data part conforms to the FM0 encoding rule shown in fig. 1 and 2.
The frame header sequence y consistent with the ideal waveform of the FM0 frame header part is designed according to the FM0 preamble (i.e. frame header) rule shown in fig. 3 and the sampling multiple N in the data sampling step. For example, when the sampling multiple N =8, one bit period (i.e., a bit window) corresponds to 8 sampling points in an ideal state. The frame header sequence is designed to be "100100100100100100100100 (a sampling point corresponding to the first bit period of the frame header)/555555555555 (a sampling point corresponding to the second bit period of the frame header)/100100100100100100100100 (a sampling point corresponding to the third bit period of the frame header)/5555100100100100 (a sampling point corresponding to the fourth bit period of the frame header)/1001001001005555 (a sampling point corresponding to the fifth bit period of the frame header)/1001001001005555 (a sampling point corresponding to the sixth bit period of the frame header)/1001001001005555 (a sampling point corresponding to the seventh bit period of the frame header)/5555 (a sampling point corresponding to the eighth bit period of the frame header)". Here, "100" represents a high level and "5" represents a low level. The frame header sequence y is stored in advance.
And in the data sampling step, each time a new data point is sampled, the label digital signal sequence is correspondingly updated. Performing shift cross-correlation operation on a data sequence x consisting of the first N x 8 data points of the updated tag digital signal sequence and a pre-stored frame header sequence y to calculate the correlation degree P of the data sequence x and the frame header sequence yxyWherein:
x (t) represents the value of the data sequence (i.e., the tag digital signal sequence) at time t, and y (t) represents the value of the frame header sequence at time t.
When the data sequence x is the frame header part of the tag digital signal sequence, the result P of the cross-correlation operationxyWill approach 1. As shown in FIG. 5, when the frame header template and the frame header part of the labeled digital signal sequence are cross-correlated, the correlation result (correlation P)xy) The highest peak is reached. From degree of correlation PxyAnd (4) exceeding a preset value (the preset value should be more than 0 and less than 1) starting to store the tag digital signal sequence. The data portion begins because the peak point of the correlation indicates the end of the frame header portion in the digital signal sequence of the tag. And the storage of the tag digital signal sequence is from the correlation PxyThe moment exceeding the preset value. Thus, in most cases as shown in fig. 6: there is a time offset (i.e., a time difference offset between a peak point of the correlation and a point of an over-preset value) between a start point of the actually stored tag digital signal sequence and a start point of the data portion. Accordingly, the actually stored tag digital signal sequence includes not only the data portion thereof but also a part of the frame header portion preceding the data portion, andthe start point of the data portion in the stored sequence of the tag digital signal can be found from the time offset.
Data decoding
And extracting a data sequence of one bit period in the data part according to the sampling multiple N and the level jump condition of the data part, and determining the value of the data bit corresponding to the data sequence according to the accumulated value of the data sequence. The method specifically comprises the following steps:
1. the data portion of the tag digital signal sequence is extracted from the stored tag digital signal sequence based on the time offset.
2. And bit data extraction, namely extracting the bit data according to the sampling multiple N and the level jump condition of a data part: and if the Mth data point of the data part has level jump and (N-a) < = (M-1) < = (N + a), extracting a data point before the Mth data point of the data part as a data sequence of one bit period, wherein a is a frequency offset factor. If the extraction is successful, a bit data decoding step is entered and the remaining data portion is treated as a new data portion. If the extraction fails, the data decoding is ended. For example, when the sampling multiple N is 8, the 9 th point level will jump from the start point of the tag digital signal sequence. Considering the frequency offset factor, if the frequency offset is in the range of 12.5%, a level jump may occur at the 8 th or 10 th point, setting the frequency offset factor a to 1. When the bit data is extracted, judging the position of a level jump point: if a level jump occurs at the 8 th or 9 th or 10 th data point, then the 7 or 8 or 9 data points before the level jump occurs are considered to be one bit period encoded for FM0, representing one data bit. If the electrical average does not jump at the 8 th, 9 th or 10 th data point, the FM0 coding is wrong, and the decoding is ended.
3. Bit data decoding, namely performing accumulation operation on the extracted data sequence, and determining the value of the data bit corresponding to the data sequence according to the accumulated value of the accumulation operation; if the new data part is not empty, returning to the bit data extraction step; otherwise, the data decoding is ended. Specifically, if the accumulated value is an integer between 0 and b or the accumulated value is an integer between (M-1-b) and (M-1), determining that the value of the data bit corresponding to the data sequence is 1; otherwise, determining the value of the data bit corresponding to the data sequence to be 0; where b is a fault tolerance factor. The size of b can be adjusted according to the practical application condition, and b is 1 in general. For example, when the sampling multiple N is 8, if the value of the digit is "1", the data sequence extracted in the data step 2 should be all 0 or all 1, and when the accumulated result belongs to the {0, 1, 2, 7, 8, 9} set, it is determined that the value of the data corresponding to the data sequence is 1 in consideration of certain fault-tolerant redundancy; otherwise, the corresponding value of the data sequence is considered to be "0".
Data checking
The data portion of the decoded tag digital signal sequence is checked against CCITT-CRC5 or CCITT-CRC 16: if the check is passed, the decoding is successful; if the check fails, the decoding is wrong.
Fig. 7 shows a decoding result of the present embodiment for decoding a case where an unfiltered spur exists in a data portion due to noise interference. As can be seen from fig. 7, the decoding method of the present embodiment has better interference immunity, and can still accurately decode the tag signal under the condition of noise interference.
Fig. 8 and 9 show the decoding result of the present embodiment for decoding a tag signal having a frequency offset of 12.5%. As can be seen from fig. 8 and 9, the decoding method of the present embodiment can still accurately decode the tag signal when the tag signal generates a frequency offset.
Example two
Fig. 4 shows a tag decoding apparatus for implementing the tag decoding method of the present invention, which can be used to implement the decoding method in the first embodiment. The tag decoding apparatus includes:
data sampling module
The received tag analog signal is sampled at N times the sampling rate (in this embodiment, 8 times the sampling rate is taken as an example for description, i.e., N = 8) to obtain the original tag digital signal sequence. The method specifically comprises the following steps:
and the AD sampling unit is used for carrying out high-speed digital sampling on the received label analog signal at the sampling rate of N times to obtain an original label digital signal sequence.
And the FIR filtering unit is used for digitally filtering the original label digital signal sequence obtained by high-speed digital sampling so as to filter high-frequency signals in the original label digital signal, thereby effectively removing noise signals.
The zero-crossing detection unit is used for distinguishing high and low levels of the filtered original label digital signals: samples above the zero crossing detection threshold are considered high "1" and samples below a certain threshold are considered low "0". Obtain the label digital signal sequence represented by the sequence of "0" and "1".
Frame header detection module
The method is used for calculating the correlation degree of the label digital signal sequence and the frame header sequence, and storing the label digital signal sequence from the moment when the correlation degree is greater than a preset value. The device comprises a frame header matching correlation unit, a peak-to-peak value judgment unit and a storage unit.
The label digital signal sequence includes a frame header portion and a data portion. The frame header part conforms to the FM0 preamble (i.e., frame header) rule shown in fig. 3, and the data part conforms to the FM0 encoding rule shown in fig. 1 and 2.
The frame header sequence y consistent with the ideal waveform of the FM0 frame header part is designed according to the FM0 preamble (i.e. frame header) rule shown in fig. 3 and the sampling multiple N in the data sampling step. For example, when the sampling multiple N =8, one bit period (i.e., a bit window) corresponds to 8 sampling points in an ideal state. The frame header sequence is designed to be "100100100100100100100100 (a sampling point corresponding to the first bit period of the frame header)/555555555555 (a sampling point corresponding to the second bit period of the frame header)/100100100100100100100100 (a sampling point corresponding to the third bit period of the frame header)/5555100100100100 (a sampling point corresponding to the fourth bit period of the frame header)/1001001001005555 (a sampling point corresponding to the fifth bit period of the frame header)/1001001001005555 (a sampling point corresponding to the sixth bit period of the frame header)/1001001001005555 (a sampling point corresponding to the seventh bit period of the frame header)/5555 (a sampling point corresponding to the eighth bit period of the frame header)". Here, "100" represents a high level and "5" represents a low level. The frame header sequence y is stored in advance.
And when the data sampling module samples a new data point, the output label digital signal sequence is correspondingly updated. And the frame header matching correlation unit is used for performing shift cross-correlation operation on a data sequence x consisting of the first N x 8 data points of the updated label digital signal sequence and a pre-stored frame header sequence y to calculate the correlation degree Pxy of the data sequence x and the pre-stored frame header sequence y, wherein:
x (t) represents the value of the data sequence (i.e., the tag digital signal sequence) at time t, and y (t) represents the value of the frame header sequence at time t. When the data sequence x is the frame header part of the tag digital signal sequence, the result P of the cross-correlation operationxyWill approach 1. As shown in FIG. 5, when the frame header template and the frame header part of the labeled digital signal sequence are cross-correlated, the correlation result (correlation P)xy) The highest peak is reached.
A peak-to-peak value judging unit for judging the correlation value (i.e. the correlation P) when the frame header matches the output value of the correlation unitxy) When the preset value is exceeded, the peak-to-peak value judgment unit outputs an enabling signal, and the label digital signal sequence begins to be stored in the storage unit. The data portion begins because the peak point of the correlation indicates the end of the frame header portion in the digital signal sequence of the tag. And the storage of the tag digital signal sequence is started from the moment when the degree of correlation Pxy exceeds a preset value. Thus, in most cases as shown in fig. 6: there is a time offset (i.e., a time difference offset between a peak point of the correlation and a point of an over-preset value) between a start point of the actually stored tag digital signal sequence and a start point of the data portion. Accordingly, the actually stored tag digital signal sequence includes not only the data portion thereof but also a part of the frame header portion preceding the data portion, and the tag digital signal sequence can be stored according to the time offsetThe start point of the data portion is found in the stored sequence of tag digital signals. The peak-to-peak value determination unit stores the offset.
Data decoding module
And extracting a data sequence of one bit period in the data part according to the sampling multiple N and the level jump condition of the data part, and determining the value of the data bit corresponding to the data sequence according to the accumulated value of the data sequence. Including a bit data extraction unit and a bit data decoding unit.
The data decoding module extracts a data portion of the tag digital signal sequence from the stored tag digital signal sequence based on the time offset stored in the peak-to-peak value judging unit.
And the bit data extraction unit is used for extracting the bit data according to the sampling multiple N and the level jump condition of the data part: and if the Mth data point of the data part has level jump and (N-a) < = (M-1) < = (N + a), extracting a data point before the Mth data point of the data part as a data sequence of one bit period, wherein a is a frequency offset factor. If the extraction is successful, a bit data decoding step is entered and the remaining data portion is treated as a new data portion. If the extraction fails, the data decoding is ended. For example, when the sampling multiple N is 8, the 9 th point level will jump from the start point of the tag digital signal sequence. Considering the frequency offset factor, if the frequency offset is in the range of 12.5%, a level jump may occur at the 8 th or 10 th point, setting the frequency offset factor a to 1. When the bit data is extracted, judging the position of a level jump point: if a level jump occurs at the 8 th or 9 th or 10 th data point, then the 7 or 8 or 9 data points before the level jump occurs are considered to be one bit period encoded for FM0, representing one data bit. If the electrical average does not jump at the 8 th, 9 th or 10 th data point, the FM0 coding is wrong, and the decoding is ended.
The bit data decoding unit is used for performing accumulation operation on the data sequence extracted by the bit data extraction unit and determining the value of the data bit corresponding to the data sequence according to the accumulated value of the accumulation operation; if the new data part is not empty, returning to the bit data extraction step; otherwise, the data decoding is ended. Specifically, if the accumulated value is an integer between 0 and b or the accumulated value is an integer between (M-1-b) and (M-1), determining that the value of the data bit corresponding to the data sequence is 1; otherwise, determining the value of the data bit corresponding to the data sequence to be 0; where b is a fault tolerance factor. The size of b can be adjusted according to the practical application condition, and b is 1 in general. For example, when the sampling multiple N is 8, if the value of the digit is "1", the data sequence extracted in the data step 2 should be all 0 or all 1, and when the accumulated result belongs to the {0, 1, 2, 7, 8, 9} set, it is determined that the value of the data corresponding to the data sequence is 1 in consideration of certain fault-tolerant redundancy; otherwise, the corresponding value of the data sequence is considered to be "0".
Data checking module
The data portion of the decoded tag digital signal sequence is checked against CCITT-CRC5 or CCITT-CRC 16: if the check is passed, the decoding is successful; if the check fails, the decoding is wrong.
Fig. 7 shows a decoding result of the present embodiment for decoding a case where an unfiltered spur exists in a data portion due to noise interference. As can be seen from fig. 7, the decoding method of the present embodiment has better interference immunity, and can still accurately decode the tag signal under the condition of noise interference.
Fig. 8 and 9 show the decoding result of the present embodiment for decoding a tag signal having a frequency offset of 12.5%. As can be seen from fig. 8 and 9, the decoding method of the present embodiment can still accurately decode the tag signal when the tag signal generates a frequency offset.
EXAMPLE III
A tag reader comprising the tag decoding apparatus of embodiment two. Tag signals transmitted by tags based on FM0 encoding can be identified and decoded.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various changes or modifications within the scope of the appended claims.
Claims (3)
1. A tag signal decoding method, comprising:
data sampling, namely sampling the received tag analog signal by N times to obtain a tag digital signal sequence;
frame header detection, namely calculating the correlation degree of a label digital signal sequence and a preset frame header sequence, and storing the label digital signal sequence from the moment when the correlation degree is greater than a preset value;
data decoding, decoding the data part of the label digital signal sequence according to bits;
in the data decoding step, a data sequence of one bit period in the data part is extracted according to a sampling multiple N and the level jump condition of the data part, and the value of a data bit corresponding to the data sequence is determined according to the accumulated value of the data sequence;
in the frame header detection step, correlation
Wherein x (t) represents the value of the tag digital signal sequence at time t, and y (t) represents the value of the frame header sequence at time t;
the data decoding step includes:
bit data extraction, namely extracting a data sequence of a first bit period of a data part of the tag digital signal sequence according to a sampling multiple N and the level jump condition of the data part; if the extraction is successful, taking the residual data part as a new data part and entering a bit data decoding step; otherwise, ending the data decoding;
bit data decoding, namely performing accumulation operation on the extracted data sequence, and determining the value of the data bit corresponding to the data sequence according to the accumulated value of the accumulation operation; if the new data part is not empty, returning to the bit data extraction step; otherwise, ending the data decoding;
in the bit data extracting step, if the mth data point of the data part has a level jump and (N-a) < ═ M-1 < ═ N + a, extracting a data point before the mth data point of the data part as a data sequence of one bit period;
wherein a is a frequency offset factor;
the bit data decoding step:
determining that the value of the data bit corresponding to the data sequence is 1 if the accumulated value is an integer between 0 and b or the accumulated value is an integer between (M-1-b) to (M-1);
otherwise, the value of the data bit corresponding to the data sequence is 0;
where b is a fault tolerance factor.
2. A tag signal decoding apparatus, comprising:
the data sampling module is used for sampling the received tag analog signal by N times to obtain a tag digital signal sequence;
the frame header detection module is used for calculating the correlation degree between the label digital signal sequence obtained by the data sampling module and the frame header sequence and storing the label digital signal sequence to the storage module from the moment when the correlation degree is greater than a preset value;
a data decoding module for decoding the data part of the tag digital signal sequence in the storage module by bit;
the data decoding module extracts a data sequence of one bit period in the data part according to the sampling multiple N and determines the value of a data bit corresponding to the data sequence according to the accumulated value of the data sequence;
the frame header detection module is according to the formula
Calculating the degree of correlation PxyWherein x (t) represents the value of the tag digital signal sequence at time t, and y (t) represents the value of the frame header sequence at time t;
the data decoding module includes:
the bit data extraction unit is used for extracting a data sequence of a first bit period of a data part of the tag digital signal sequence according to the sampling multiple N; if the extraction is successful, taking the residual data part as a new data part, and inputting the extracted data sequence into a bit data decoding unit;
the bit data decoding unit comprises an accumulator for performing accumulation operation on the data sequence extracted by the bit data extracting unit, and determines the value of the data bit corresponding to the data sequence according to the accumulated value calculated by the accumulator;
the bit data extraction unit extracts a data point before an Mth data point of the data part as a data sequence of one bit period if the Mth data point of the data part has a level jump and (N-a) < ═ M-1 < ═ N + a;
wherein a is a frequency offset factor;
the bit data decoding unit, according to the accumulated value of the accumulator:
determining that the value of the data bit corresponding to the data sequence is 1 if the accumulated value is an integer between 0 and b or the accumulated value is an integer between (M-1-b) to (M-1);
otherwise, determining that the value of the data bit corresponding to the data sequence is 0.
3. A tag reader, characterized by: including the tag signal decoding apparatus of claim 2.
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| CN111191478B (en) | 2019-12-31 | 2021-08-03 | 上海移为通信技术股份有限公司 | Code reading method and device for ear tag |
| CN111510151B (en) * | 2020-04-27 | 2023-08-18 | 江苏华锐频科技有限公司 | Decoding method and device for FM0 encoded data and reader-writer |
| CN113965227B (en) * | 2021-09-26 | 2022-04-22 | 西安交通大学 | RFID decoding method, medium, device and system based on visible light space-time coding |
| CN115102582B (en) * | 2022-08-24 | 2023-01-24 | 北京智芯微电子科技有限公司 | Decoding method and device for RFID reader-writer, storage medium and RFID reader-writer |
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