CN107942779A - A kind of LEU processing boards - Google Patents
A kind of LEU processing boards Download PDFInfo
- Publication number
- CN107942779A CN107942779A CN201711108008.XA CN201711108008A CN107942779A CN 107942779 A CN107942779 A CN 107942779A CN 201711108008 A CN201711108008 A CN 201711108008A CN 107942779 A CN107942779 A CN 107942779A
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- China
- Prior art keywords
- leu
- processing
- security
- processing boards
- fpga
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
Abstract
The present invention proposes a kind of LEU processing boards, wherein the LEU processing boards include security and unsecure parts, security includes two secure processing modules, two structures are taken using two；Unsecure parts include Communications Processor Module；The security is realized by the first isolated part with unsecure parts and connected.The LEU processing boards of the present invention, can preferably meet the process of signal transmission requirement of high-speed railways.
Description
Technical field
The invention belongs to railway signal technology field, more particularly to a kind of LEU processing boards.
Background technology
Acknowledgement transmissions system (Balise Transmission Subsystem, BTS) is a kind of based on point information transmission
Secure transmission system, realize side equipment or ground installation and mobile unit between security information transmission.Transponder transmits
System include transponder transport module (BTM) and car antenna unit (AU), active balise (Controlled Balise) and
Three passive balise (Fixed Balise), Ground Electronics Unit (LEU) elements.
Additional power source is not required in transponder itself installed in track centre, and during train operation, BTM passes through antenna list
Constantly earthward emittance, transponder receive the power that antenna element radiates and work first AU, by internal coding information
Or the coding information (only limiting active balise) of Ground Electronics Unit (LEU) is sent to car antenna AU, car antenna will receive
The uplink signal transmission arrived gives the data sending received to vehicle-mounted control core to BTM, BTM.
The data message that transponder Transmission system is capable of providing include signal data, control data, position and geography information,
Train object run information, route information, line speed and temporary speed limitation etc..
Ground Electronics Unit LEU equipment major functions are (for example, serial input, relay according to interface S external input states
Device contact state or current status etc.), select appropriate message；Or the message in extraction interface S communication datas, pass through interface C
Sent to active balise.
In LEU device structure schematic diagrams as shown in Figure 1, LEU equipment include acquisition module, processing module, output module,
Handover module, monitoring modular, acquisition module and communication interface and power supply interface etc..Wherein：
The collection of LEU equipment safeties, collection self-checking function distribution are in acquisition module, the processing of interface S communication datas, message choosing
Select, the distribution of the correlation function such as equipment self-inspection is in processing plate module.Processing module architecture design takes two 2oo2 fail-safes former for two
Then structure.
The transmitting message that output module is responsible for sending processing board carries out DPBL codings, and is converted into and meets interface C indexs
It is required that signal to active balise send.
Handover module uses relay logic, is responsible for selecting the final defeated of two-way redundancy C interface signal when LEU redundancies use
Go out.
Monitoring module monitors simultaneously record every running state data in LEU operational process.
Communication interface is interlocked from train control center receives message information, and power supply interface utilizes the 24V power supplys that electric power system provides
Power to LEU equipment.
In the prior art, for the security isolation biography for being designed without taking into full account signal from security standpoint of LEU processing boards
It is defeated, or communication information processing scheme complexity, cause the signal processing of processing board can not preferably to meet wanting for present high-speed railways
Ask.
The content of the invention
In order to solve the above-mentioned technical problem, the present invention proposes a kind of LEU processing boards, from safety, non-security angle,
By isolation design mode, global optimization is carried out to LEU processing boards.
For this reason, the present invention proposes a kind of LEU processing boards, it is characterised in that
The LEU processing boards include security and unsecure parts, wherein,
Security includes two secure processing modules, and two structures are taken using two；
Unsecure parts include Communications Processor Module；
The security is realized by the first isolated part with unsecure parts and connected.
Further, described two secure processing modules are realized by the second isolated part and connected.
Further, each secure processing module of the security includes FPGA and CPU, and the CPU passes through communication
Line is realized with the FPGA and connected.
Further, two FPGA of the security are realized by second isolated part and connected.
Further, the unsecure parts further include conversion CPU components.
Further, the security and unsecure parts are realized by redundant bus communicates to connect.
Further, the processing board further includes protection filter module, voltage transformation module.
LEU processing boards of the present invention, the mode of isolation design is employed from secure and non-secure angle, is preferably met
The process of signal transmission requirement of high-speed railways.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are this hairs
Some bright embodiments, for those of ordinary skill in the art, without creative efforts, can be with root
Other attached drawings are obtained according to these attached drawings.
Fig. 1 shows the structural schematic block diagram according to LEU processing boards in the prior art；；
Fig. 2 shows LEU processing board basic structure schematic diagrams according to embodiments of the present invention；
Fig. 3 shows the LEU processing board illustrative view of functional configuration of simplification according to embodiments of the present invention；
Fig. 4 shows the LEU processing board rough schematic views of simplification according to embodiments of the present invention.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, the technical solution in the embodiment of the present invention is clearly and completely illustrated, it is clear that described embodiment is
Part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
All other embodiments obtained without making creative work, belong to the scope of protection of the invention.
As shown in Fig. 2, the LEU processing boards of the embodiment of the present invention include two processing board FPGA (processors as depicted
F1 and processor F2), two processor CPU (processor A1 and processor A2 as depicted), two house dogs.The LEU
Processing board further includes protection filter module, voltage transformation module.
Wherein, described two processing board FPGA by isolate 1 component order wire carry out data interaction, processing board FPGA with
Data interaction is carried out by bus and one or more I/O signal line between CPU, as shown in the figure, processing board FPGA1 and CPU1 it
Between pass through bus and one or more I/O signal line carries out data interaction；Again by bus between processing board FPGA2 and CPU2
And one or more I/O signal lines carry out data interaction.Processor A1 and processor A2 can be realized by respective house dog
CPU internal processes execution is smoothed out.
Each processing board FPGA by corresponding order wire and exterior switch boards, collection plate FPGA, output board, monitoring board with
And other boards realization connection such as motherboard.The output signal of processing board FPGA1 and processing board FPGA2 is output to it after merging
On his board, such as it is output on output board.
CPU1 and CPU2 (processor A1 and processor A2 as shown in Figure 2 respectively) are by communication bus IO and through isolation
After 2 components, by CAN bus and converted CPU (processor B1 and processor B2 as shown in Figure 2) afterwards and external serial interface
Connection.Meanwhile monitoring board realizes the monitoring to CPU1 and CPU2.
After external power supply is by protecting filter module, and after the conversion of voltage transformation module, into plate needed for offer
Voltage.Voltage by protecting filter module can also be provided to other boards.
The LEU processing boards of the embodiment of the present invention mainly complete following functions：
1) acquisition is sent to acquisition module；Receive the collection result of collection plate loopback；
2) according to security protocol, by serial communication interface, the message data that external equipment is sent is obtained；
3) according to external status, externally input message or the message of storage inside are selected as message to be sent；
4) dual processors voting is carried out to external input, message to be sent, it is therefore intended that ensure that two independent CPU have phase
Same decision, once the two decision is inconsistent, then and think insincere, safer operation should be performed at this time.Vote through
Safe handling is carried out afterwards to send to output module；
5) protective finish is carried out to external input power, working power is provided for itself and other modules；
6) equipment self-inspection, monitoring temperature, running log report etc..
LEU plates are divided into security and unsecure parts in embodiment, as shown in figure 3, security includes safe handling 1
2 module of module and safe handling, corresponds respectively to processing board FPGA1 and CPU1, processing board FPGA2 and CPU2 in Fig. 2.Safety
Part is mainly including the connection circuit and its peripheral circuits between processing board FPGA and CPU, FPGA and CPU, such as house dog etc.；
Unsecure parts mainly include isolated part, conversion CPU components, protection filter part, voltage conversion unit etc..
As shown in figure 3, LEU processing boards security takes two failsafe configurations using two.Single channel security mainly by
One CPU and FPGA composition, both are connected by bus IO and some order wires.Pass through the communication of isolation between two-way FPGA
Line carries out data interaction.
The circuit of two passage of security is just the same, is illustrated below for the CPU and FPGA circuitry of a passage.
Communication between two passages is carried out by the logic realized inside FPGA, comprising line synchro and order wire, for two
The synchronization of interchannel and data exchange.In order to ensure the independence between two passages, all signals are by isolating device, after isolation
It is attached.Traffic rate needed for isolating device support, it is the time requirement of interaction data to meet two；Isolation voltage meets standard
Electrical isolation requirement.
Further, as shown in figure 4, being carried out between safety and non-safety function circuit by the CAN bus of two redundancies
Communication：Processor A1 and processor A2 is communicated by two CAN bus CAN1 and CAN2 with processor B1, processor B2.Processing
Signal transmission between device A1, processor A2 and processor B1 processors B2 is first passed through after isolating device 2 isolates, then passes through interface
Chip is transferred in processor B1 and processor B2.Similarly, the data of processor B1, processor B2 by passing through again after interface chip
Isolating device 2 is crossed to be sent in processor A1 and/or processor A2.Processor A1, processor A2 respectively with processor F1, processing
Device F2 is communicated to connect.Realize and connect also by isolating device 1 between processor F1 and processor F2.This connection mode employs
Isolating device and redundancy set-up mode, realize the isolation transmission of signal, and realize disaster tolerance function.
Finally it should be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations.This hair
It is bright, including in specification, attached drawing, claim, it is a kind of that the connection between each equipment, component, device, which is not necessarily meaned,
Directly electrical connection, expression is only logical relation.Meanwhile " first ", " second " occurred in the present invention is used to distinguish
Component or equipment, not necessarily represent a kind of tandem, sequencing.Although the present invention is carried out with reference to the foregoing embodiments
Detailed description, it will be understood by those of ordinary skill in the art that：It still can be to the technology described in foregoing embodiments
Scheme is modified, or carries out equivalent substitution to which part technical characteristic；And these modifications or replacement, do not make corresponding
The essence of technical solution departs from the spirit and scope of various embodiments of the present invention technical solution.
Claims (7)
- A kind of 1. LEU processing boards, it is characterised in thatThe LEU processing boards include security and unsecure parts, wherein,Security includes two secure processing modules, and two structures are taken using two；Unsecure parts include Communications Processor Module；The security is realized by the first isolated part with unsecure parts and connected.
- 2. LEU processing boards according to claim 1, it is characterised in thatDescribed two secure processing modules are realized by the second isolated part and connected.
- 3. LEU processing boards according to claim 1 or 2, it is characterised in thatEach secure processing module of the security includes FPGA and CPU, and the CPU is real by order wire and the FPGA Now connect.
- 4. LEU processing boards FPGA according to claim 3, it is characterised in thatTwo FPGA of the security are realized by second isolated part and connected.
- 5. LEU processing boards according to claim 1, it is characterised in thatThe unsecure parts further include conversion CPU components.
- 6. LEU processing boards according to claim 1, it is characterised in thatThe security and unsecure parts are realized by redundant bus to be communicated to connect.
- 7. LEU processing boards according to claim 1, it is characterised in thatThe processing board further includes protection filter module, voltage transformation module.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711108008.XA CN107942779B (en) | 2017-11-10 | 2017-11-10 | LEU handles board |
| PCT/CN2018/086260 WO2019091074A1 (en) | 2017-11-10 | 2018-06-08 | Leu processing board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711108008.XA CN107942779B (en) | 2017-11-10 | 2017-11-10 | LEU handles board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107942779A true CN107942779A (en) | 2018-04-20 |
| CN107942779B CN107942779B (en) | 2020-10-23 |
Family
ID=61934813
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711108008.XA Active CN107942779B (en) | 2017-11-10 | 2017-11-10 | LEU handles board |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN107942779B (en) |
| WO (1) | WO2019091074A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019091074A1 (en) * | 2017-11-10 | 2019-05-16 | 北京全路通信信号研究设计院集团有限公司 | Leu processing board |
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| CN101442335A (en) * | 2008-12-31 | 2009-05-27 | 中国铁道科学研究院通信信号研究所 | Responder |
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| WO2014048721A2 (en) * | 2012-09-28 | 2014-04-03 | Siemens Aktiengesellschaft | Speed restriction for a railway line |
| CN205232260U (en) * | 2015-12-17 | 2016-05-11 | 上海光电医用电子仪器有限公司 | High -speed communication ware of keeping apart |
| CN206096813U (en) * | 2016-04-18 | 2017-04-12 | 北京交大微联科技有限公司杭州分公司 | Trouble safety signal output device based on FPGA no. 2 gets two comparators |
| CN107276768A (en) * | 2017-06-29 | 2017-10-20 | 卡斯柯信号有限公司 | A kind of C interface plate circuit for LEU |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101694588B (en) * | 2009-10-14 | 2012-04-18 | 北京全路通信信号研究设计院有限公司 | Double 2 vote 2 active/standby control switching system and method |
| CN102830647A (en) * | 2012-08-31 | 2012-12-19 | 北京和利时系统工程有限公司 | Double 2-vote-2 device for fail safety |
| CN102955903B (en) * | 2012-11-15 | 2015-12-16 | 同济大学 | A kind of disposal route of safety critical information of rail transit computer control system |
| CN105824273B (en) * | 2016-03-15 | 2018-10-12 | 北京交通大学 | Ground target controller in train operation control system |
| CN107942779B (en) * | 2017-11-10 | 2020-10-23 | 北京全路通信信号研究设计院集团有限公司 | LEU handles board |
-
2017
- 2017-11-10 CN CN201711108008.XA patent/CN107942779B/en active Active
-
2018
- 2018-06-08 WO PCT/CN2018/086260 patent/WO2019091074A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101442335A (en) * | 2008-12-31 | 2009-05-27 | 中国铁道科学研究院通信信号研究所 | Responder |
| CN102857366A (en) * | 2012-06-08 | 2013-01-02 | 北京和利时系统工程有限公司 | Trackside electronic device for transparent transmission of information of high-speed railway responder |
| WO2014048721A2 (en) * | 2012-09-28 | 2014-04-03 | Siemens Aktiengesellschaft | Speed restriction for a railway line |
| CN205232260U (en) * | 2015-12-17 | 2016-05-11 | 上海光电医用电子仪器有限公司 | High -speed communication ware of keeping apart |
| CN206096813U (en) * | 2016-04-18 | 2017-04-12 | 北京交大微联科技有限公司杭州分公司 | Trouble safety signal output device based on FPGA no. 2 gets two comparators |
| CN107276768A (en) * | 2017-06-29 | 2017-10-20 | 卡斯柯信号有限公司 | A kind of C interface plate circuit for LEU |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019091074A1 (en) * | 2017-11-10 | 2019-05-16 | 北京全路通信信号研究设计院集团有限公司 | Leu processing board |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2019091074A1 (en) | 2019-05-16 |
| CN107942779B (en) | 2020-10-23 |
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