CN107924375B - 用于高速存储器接口的命令仲裁 - Google Patents
用于高速存储器接口的命令仲裁 Download PDFInfo
- Publication number
- CN107924375B CN107924375B CN201680048862.9A CN201680048862A CN107924375B CN 107924375 B CN107924375 B CN 107924375B CN 201680048862 A CN201680048862 A CN 201680048862A CN 107924375 B CN107924375 B CN 107924375B
- Authority
- CN
- China
- Prior art keywords
- memory
- sub
- controller
- arbiter
- arbitration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bus Control (AREA)
- Memory System (AREA)
- Dram (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/211,815 US10684969B2 (en) | 2016-07-15 | 2016-07-15 | Command arbitration for high speed memory interfaces |
| US15/211,815 | 2016-07-15 | ||
| PCT/US2016/053131 WO2018013157A1 (en) | 2016-07-15 | 2016-09-22 | Command arbitration for high speed memory interfaces |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107924375A CN107924375A (zh) | 2018-04-17 |
| CN107924375B true CN107924375B (zh) | 2023-08-08 |
Family
ID=60940659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680048862.9A Active CN107924375B (zh) | 2016-07-15 | 2016-09-22 | 用于高速存储器接口的命令仲裁 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10684969B2 (enExample) |
| JP (1) | JP6840145B2 (enExample) |
| KR (1) | KR102442078B1 (enExample) |
| CN (1) | CN107924375B (enExample) |
| WO (1) | WO2018013157A1 (enExample) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10037150B2 (en) * | 2016-07-15 | 2018-07-31 | Advanced Micro Devices, Inc. | Memory controller with virtual controller mode |
| CN110729006B (zh) * | 2018-07-16 | 2022-07-05 | 超威半导体(上海)有限公司 | 存储器控制器中的刷新方案 |
| US11126375B2 (en) * | 2019-07-18 | 2021-09-21 | Micron Technology, Inc. | Arbiter circuit for commands from multiple physical functions in a memory sub-system |
| US11200106B2 (en) * | 2019-08-12 | 2021-12-14 | Advanced Micro Devices, Inc. | Data integrity for persistent memory systems and the like |
| US12253961B2 (en) * | 2019-12-27 | 2025-03-18 | Advanced Micro Devices, Inc. | Staging memory access requests |
| US12056065B2 (en) * | 2020-03-13 | 2024-08-06 | Altera Corporation | Orthogonal multi-phase scheduling circuitry |
| US11222685B2 (en) * | 2020-05-15 | 2022-01-11 | Advanced Micro Devices, Inc. | Refresh management for DRAM |
| US11625352B2 (en) * | 2020-06-12 | 2023-04-11 | Advanced Micro Devices, Inc. | DRAM command streak management |
| CN111984387B (zh) * | 2020-08-26 | 2024-06-25 | 上海兆芯集成电路股份有限公司 | 用于调度发布队列中指令的方法及处理器 |
| CN112466361B (zh) * | 2020-11-25 | 2023-11-21 | 海光信息技术股份有限公司 | 一种dimm的数据初始化方法、装置、系统及设备 |
| US11687281B2 (en) * | 2021-03-31 | 2023-06-27 | Advanced Micro Devices, Inc. | DRAM command streak efficiency management |
| US11669274B2 (en) * | 2021-03-31 | 2023-06-06 | Advanced Micro Devices, Inc. | Write bank group mask during arbitration |
| US11379388B1 (en) * | 2021-03-31 | 2022-07-05 | Advanced Micro Devices, Inc. | Credit scheme for multi-queue memory controllers |
| US11995008B2 (en) * | 2021-06-22 | 2024-05-28 | Advanced Micro Devices, Inc. | Memory controller with hybrid DRAM/persistent memory channel arbitration |
| US11755246B2 (en) * | 2021-06-24 | 2023-09-12 | Advanced Micro Devices, Inc. | Efficient rank switching in multi-rank memory controller |
| US12073114B2 (en) * | 2021-09-30 | 2024-08-27 | Advanced Micro Devices, Inc. | Stacked command queue |
| CN116069715B (zh) * | 2021-11-04 | 2025-09-05 | 瑞昱半导体股份有限公司 | 存储装置共享系统及存储装置共享方法 |
| US12117945B2 (en) | 2022-06-24 | 2024-10-15 | Advanced Micro Devices, Inc. | Memory controller with pseudo-channel support |
| US12154657B2 (en) | 2022-06-29 | 2024-11-26 | Advanced Micro Devices, Inc. | Channel and sub-channel throttling for memory controllers |
| US20240078017A1 (en) * | 2022-09-01 | 2024-03-07 | Advanced Micro Devices, Inc. | Memory controller and near-memory support for sparse accesses |
| US12079144B1 (en) | 2022-09-21 | 2024-09-03 | Apple Inc. | Arbitration sub-queues for a memory circuit |
| CN115632665B (zh) * | 2022-12-20 | 2023-07-14 | 苏州浪潮智能科技有限公司 | 一种存储校验的系统和服务器 |
| CN116974963B (zh) * | 2023-09-25 | 2023-12-15 | 上海云豹创芯智能科技有限公司 | 一种访问存储器的装置及其方法、芯片、存储介质 |
| US20250139022A1 (en) * | 2023-11-01 | 2025-05-01 | Advanced Micro Devices, Inc. | Multiplexed bus streak management |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6138197A (en) * | 1998-09-17 | 2000-10-24 | Sun Microsystems, Inc. | Apparatus and method for limit-based arbitration scheme |
| CN102129412A (zh) * | 2010-01-18 | 2011-07-20 | 厄塞勒拉特公司 | 存取调度器 |
| US8271746B1 (en) * | 2006-11-03 | 2012-09-18 | Nvidia Corporation | Tiering of linear clients |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6295586B1 (en) | 1998-12-04 | 2001-09-25 | Advanced Micro Devices, Inc. | Queue based memory controller |
| US6804758B2 (en) | 2001-06-29 | 2004-10-12 | Xgi Technology Inc. | Method for adaptive arbitration of requests for memory access in a multi-stage pipeline engine |
| US7426621B2 (en) | 2005-12-09 | 2008-09-16 | Advanced Micro Devices, Inc. | Memory access request arbitration |
| US7617368B2 (en) | 2006-06-14 | 2009-11-10 | Nvidia Corporation | Memory interface with independent arbitration of precharge, activate, and read/write |
| US7734856B2 (en) | 2007-08-22 | 2010-06-08 | Lantiq Deutschland Gmbh | Method for operating a plurality of arbiters and arbiter system |
| US9195618B2 (en) | 2009-06-16 | 2015-11-24 | Nvidia Corporation | Method and system for scheduling memory requests |
| US8838853B2 (en) * | 2010-01-18 | 2014-09-16 | Marvell International Ltd. | Access buffer |
| US8285892B2 (en) | 2010-05-05 | 2012-10-09 | Lsi Corporation | Quantum burst arbiter and memory controller |
| US9009414B2 (en) | 2010-09-21 | 2015-04-14 | Texas Instruments Incorporated | Prefetch address hit prediction to reduce memory access latency |
| US9911477B1 (en) * | 2014-04-18 | 2018-03-06 | Altera Corporation | Memory controller architecture with improved memory scheduling efficiency |
| US9697118B1 (en) * | 2015-12-09 | 2017-07-04 | Nxp Usa, Inc. | Memory controller with interleaving and arbitration scheme |
-
2016
- 2016-07-15 US US15/211,815 patent/US10684969B2/en active Active
- 2016-09-22 WO PCT/US2016/053131 patent/WO2018013157A1/en not_active Ceased
- 2016-09-22 CN CN201680048862.9A patent/CN107924375B/zh active Active
- 2016-09-22 KR KR1020187007540A patent/KR102442078B1/ko active Active
- 2016-09-22 JP JP2018524749A patent/JP6840145B2/ja active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6138197A (en) * | 1998-09-17 | 2000-10-24 | Sun Microsystems, Inc. | Apparatus and method for limit-based arbitration scheme |
| US8271746B1 (en) * | 2006-11-03 | 2012-09-18 | Nvidia Corporation | Tiering of linear clients |
| CN102129412A (zh) * | 2010-01-18 | 2011-07-20 | 厄塞勒拉特公司 | 存取调度器 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20190022428A (ko) | 2019-03-06 |
| JP2019525271A (ja) | 2019-09-05 |
| KR102442078B1 (ko) | 2022-09-08 |
| CN107924375A (zh) | 2018-04-17 |
| JP6840145B2 (ja) | 2021-03-10 |
| US20180018291A1 (en) | 2018-01-18 |
| US10684969B2 (en) | 2020-06-16 |
| WO2018013157A1 (en) | 2018-01-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |