CN107919864A - A kind of stepping time-delay mechanism - Google Patents

A kind of stepping time-delay mechanism Download PDF

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Publication number
CN107919864A
CN107919864A CN201711229515.9A CN201711229515A CN107919864A CN 107919864 A CN107919864 A CN 107919864A CN 201711229515 A CN201711229515 A CN 201711229515A CN 107919864 A CN107919864 A CN 107919864A
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CN
China
Prior art keywords
delay
circuit
prime
rear class
high accuracy
Prior art date
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Pending
Application number
CN201711229515.9A
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Chinese (zh)
Inventor
韩盈春
裴可琦
张俊玲
杨叶青
徐兴
周昕
裴志新
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NORTH GENERAL ELECTRONIC GROUP CO Ltd
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NORTH GENERAL ELECTRONIC GROUP CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NORTH GENERAL ELECTRONIC GROUP CO Ltd filed Critical NORTH GENERAL ELECTRONIC GROUP CO Ltd
Priority to CN201711229515.9A priority Critical patent/CN107919864A/en
Publication of CN107919864A publication Critical patent/CN107919864A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/159Applications of delay lines not covered by the preceding subgroups
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)

Abstract

The invention discloses a kind of stepping time-delay mechanism, wherein, including:Prime on-off circuit, track delay unit, rear class on-off circuit, high accuracy delay line and control circuit, prime on-off circuit, track delay unit, rear class on-off circuit and high accuracy delay line are sequentially connected, and prime on-off circuit, rear class on-off circuit and high accuracy delay line are connected with control circuit;Prime on-off circuit is used to carry out prime switching gate under the control of the control circuit;Track delay unit is used for broadband signal by delay path is entered into line delay;Rear class on-off circuit is used to carry out rear class switching gate under the control of control circuit;High accuracy delay line is used under the control of control circuit carry out the broadband signal after delay small stepping delay, and export controllable time delay signal in high precision.Stepping time-delay mechanism provided by the invention has the advantage that delay time is long, delay precision is high.

Description

A kind of stepping time-delay mechanism
Technical field
The present invention relates to signal delay technique field, more particularly to a kind of stepping time-delay mechanism.
Background technology
In ultra wide band time control battle array radar, due to the technology using time delays control signal beam forming, to letter Number delay time have very high requirement, it is necessary to wider delay time and accurately delay precision.In existing technology, its Time delay device cannot all meet system use demand on delay time and delay precision.
Therefore, it is urgently to be resolved hurrily as those skilled in the art that certainly broadband signal delay time and delay precision how to be improved Technical problem.
The content of the invention
It is contemplated that at least solve one of technical problem existing in the prior art, there is provided a kind of stepping time-delay mechanism, To solve the problems of the prior art.
As one aspect of the present invention, there is provided a kind of stepping time-delay mechanism, wherein, the stepping time-delay mechanism includes: Prime on-off circuit, track delay unit, rear class on-off circuit, high accuracy delay line and control circuit, the prime are opened Powered-down road, track delay unit, rear class on-off circuit and high accuracy delay line are sequentially connected, and prime switch electricity Road, rear class on-off circuit and high accuracy delay line are connected with control circuit;
The prime on-off circuit is used to carry out prime switching gate under the control of the control circuit, and by the broadband of input Signal output is to the track delay unit;
The track delay unit includes multiple delay paths, and each delay path corresponds to a prime switch, is used for respectively The broadband signal for entering delay path is exported to the rear class on-off circuit into line delay, and by the broadband signal after delay;
The rear class on-off circuit is used to carry out rear class switching gate under the control of the control circuit, and by the delay of input Broadband signal afterwards is exported to the high accuracy delay line;
The high accuracy delay line is used under the control of the control circuit carry out the broadband signal after the delay small Stepping is delayed in high precision, and exports controllable time delay signal;
The control circuit is used for the rear class switch for controlling the prime switching gate of the prime on-off circuit, follow-up on-off circuit The delay working of gating and high accuracy delay line.
Preferably, the prime on-off circuit, track delay unit, rear class on-off circuit and high accuracy delay line according to Secondary connection, and the prime on-off circuit, rear class on-off circuit and high accuracy delay line be connected with control circuit including:
The output terminal of the prime on-off circuit is connected with the input terminal of the track delay unit, and the track delay is single The output terminal of member is connected with the input terminal of the rear class on-off circuit, output terminal and the high accuracy of the rear class on-off circuit Delay circuit input terminal connection, the control circuit include first control signal output terminal, second control signal output terminal and 3rd control signal output, the control signal input of the first control signal output terminal and the prime on-off circuit connect Connect, the second control signal output terminal is connected with the control signal input of the rear class on-off circuit, the 3rd control Signal output part is connected with the control signal input of the high accuracy delay line.
Preferably, the prime on-off circuit is switched including N number of prime, and the track delay unit includes N number of delay Passage, the rear class on-off circuit are switched including N number of rear class, the n-th prime switch and the n-th delay path pair Should, the n-th delay path is corresponding with the n-th rear class switch.
Preferably, each delay path includes a radio frequency delay line.
Preferably, the track delay unit includes PCB printing delay lines.
Preferably, the prime on-off circuit and the rear class on-off circuit include single pole multiple throw.
Preferably, the high accuracy delay line includes HMC856 high accuracy delay chips.
Preferably, the control circuit includes any one in microcontroller, DSP, FPGA and ARM.
Stepping time-delay mechanism provided by the invention, by by prime on-off circuit, track be delayed, rear class on-off circuit into The time delays of the big stepping of row, the time delays of small stepping are carried out by high accuracy delay line, are used in series by both, so that Produce delay time all the way to grow, the high controllable time delay signal of delay precision, therefore effectively solve signal in the prior art and prolong When the time it is short, the problem of delay precision is low;And it can be widely applied to the equipment that various needs dynamics adjust signal delay time In.
Brief description of the drawings
Attached drawing is for providing a further understanding of the present invention, and a part for constitution instruction, with following tool Body embodiment is used to explain the present invention together, but is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the structure diagram of stepping time-delay mechanism provided by the invention.
Fig. 2 is the structure diagram of the embodiment of stepping time-delay mechanism provided by the invention.
Embodiment
The embodiment of the present invention is described in detail below in conjunction with attached drawing.It should be appreciated that this place is retouched The embodiment stated is merely to illustrate and explain the present invention, and is not intended to limit the invention.
As one aspect of the present invention, there is provided a kind of stepping time-delay mechanism, wherein, as shown in Figure 1, the stepping is delayed Device 10 includes:Prime on-off circuit 110, track delay unit 120, rear class on-off circuit 130, high accuracy delay line 140 and control circuit 150, the prime on-off circuit 110, track delay unit 120, rear class on-off circuit 130 and high-precision Degree delay circuit 140 is sequentially connected, and the prime on-off circuit 110, rear class on-off circuit 130 and high accuracy delay line 140 are connected with control circuit 150;
The prime on-off circuit 110 is used to carry out prime switching gate under the control of the control circuit 150, and will input Broadband signal export to the track delay unit 120;
The track delay unit 120 includes multiple delay paths, and each delay path corresponds to a prime switch, uses respectively Exported in by the broadband signal for entering delay path into line delay, and by the broadband signal after delay to the rear class on-off circuit 130;
The rear class on-off circuit 130 is used to carry out rear class switching gate under the control of the control circuit 150, and will input Delay after broadband signal export to the high accuracy delay line 140;
The high accuracy delay line 140 is used under the control of the control circuit 150 to the broadband signal after the delay Carry out small stepping to be delayed in high precision, and export controllable time delay signal;
The control circuit 150 is used for after controlling the prime switching gate of the prime on-off circuit 110, follow-up on-off circuit The delay working of level switching gate and high accuracy delay line.
Stepping time-delay mechanism provided by the invention, by by prime on-off circuit, track be delayed, rear class on-off circuit into The time delays of the big stepping of row, the time delays of small stepping are carried out by high accuracy delay line, are used in series by both, so that Produce delay time all the way to grow, the high controllable time delay signal of delay precision, therefore effectively solve signal in the prior art and prolong When the time it is short, the problem of delay precision is low;And it can be widely applied to the equipment that various needs dynamics adjust signal delay time In.
As a kind of embodiment of stepping time-delay mechanism provided by the invention, specifically, the prime switch electricity Road 110, track delay unit 120, rear class on-off circuit 130 and high accuracy delay line 140 are sequentially connected, and the prime On-off circuit 110, rear class on-off circuit 130 and high accuracy delay line 140 be connected with control circuit 150 including:
The output terminal of the prime on-off circuit 110 is connected with the input terminal of the track delay unit 120, the track The output terminal of delay unit 120 is connected with the input terminal of the rear class on-off circuit 130, the rear class on-off circuit 130 it is defeated Outlet is connected with the input terminal of the high accuracy delay line 140, and the control circuit 150 is exported including first control signal End, second control signal output terminal and the 3rd control signal output, the first control signal output terminal are opened with the prime The control signal input connection on powered-down road 110, the control of the second control signal output terminal and the rear class on-off circuit 130 Signal input part connection processed, the control signal of the 3rd control signal output and the high accuracy delay line 140 input End connection.
Further specifically, the prime on-off circuit 110 is switched including N number of prime, the track delay unit 120 Including N number of delay path, the rear class on-off circuit 130 is switched including N number of rear class, the n-th prime switch and the N A delay path corresponds to, and the n-th delay path is corresponding with the n-th rear class switch.
Preferably, each delay path includes a radio frequency delay line.
Specifically, the track delay unit includes PCB printing delay lines.
Specifically, the prime on-off circuit and the rear class on-off circuit include single pole multiple throw.
Preferably, the high accuracy delay line includes HMC856 high accuracy delay chips.
Preferably, the control circuit includes any one in microcontroller, DSP, FPGA and ARM.
With reference to Fig. 2, the structure and its operation principle of stepping time-delay mechanism provided by the invention are described in detail.
As shown in Fig. 2, the stepping time-delay mechanism includes:The input terminal of the prime on-off circuit 110 receives broadband letter Number, the input terminal of the output terminal of prime on-off circuit 110 connection track delay unit 120, track delay unit 120 it is defeated The signal input part of outlet connection rear class on-off circuit 130, the output terminal connection high accuracy delay line of rear class on-off circuit 130 140 input terminal, three control signal outputs of control circuit 150 connect prime on-off circuit 110, rear class switch electricity respectively Road 130 and the control signal input of high accuracy delay line 140, the output terminal of high accuracy delay line 140 is the step that is delayed Into controllable signal.
Stepping time-delay mechanism provided by the invention, input signal control prime on-off circuit 110 to carry out by control circuit 150 To N roads output channel, signal connects rear class and opens switching gate after the N roads delay path of track delay unit 120 The N roads input channel on powered-down road 130, rear class on-off circuit 130 are complete by 150 synchronous selection pass N roads input channel of control circuit The selection of pair signals delay path, produces the time delays of the big stepping of signal.The output of rear class on-off circuit 130 connects high-precision The input of delay circuit is spent, the time for controlling high accuracy delay line 140 to carry out the small stepping of signal by control circuit 150 prolongs When, so as to produce, delay time all the way is wide, the high controllable time delay signal of delay precision.
Therefore, stepping time-delay mechanism provided by the invention effectively solves in the prior art that signal delay time is short, prolongs The problem of Shi Jingdu is low, and can be widely applied in the equipment of various needs dynamic adjustment signal delay times.In addition, this hair Bright offer stepping time-delay mechanism also have form it is simple, economical and practical, be easily integrated, and reference time delay is wide, delay precision is high, The big advantage of signal bandwidth.
It is understood that the principle that embodiment of above is intended to be merely illustrative of the present and the exemplary implementation that uses Mode, but the present invention is not limited thereto.For those skilled in the art, the essence of the present invention is not being departed from In the case of refreshing and essence, various changes and modifications can be made therein, these variations and modifications are also considered as protection scope of the present invention.

Claims (8)

1. a kind of stepping time-delay mechanism, it is characterised in that the stepping time-delay mechanism includes:Prime on-off circuit, track prolong Shi Danyuan, rear class on-off circuit, high accuracy delay line and control circuit, the prime on-off circuit, track delay unit, Rear class on-off circuit and high accuracy delay line are sequentially connected, and the prime on-off circuit, rear class on-off circuit and high accuracy Delay circuit is connected with control circuit;
The prime on-off circuit is used to carry out prime switching gate under the control of the control circuit, and by the broadband of input Signal output is to the track delay unit;
The track delay unit includes multiple delay paths, and each delay path corresponds to a prime switch, is used for respectively The broadband signal for entering delay path is exported to the rear class on-off circuit into line delay, and by the broadband signal after delay;
The rear class on-off circuit is used to carry out rear class switching gate under the control of the control circuit, and by the delay of input Broadband signal afterwards is exported to the high accuracy delay line;
The high accuracy delay line is used under the control of the control circuit carry out the broadband signal after the delay small Stepping is delayed in high precision, and exports controllable time delay signal;
The control circuit is used for the rear class switch for controlling the prime switching gate of the prime on-off circuit, follow-up on-off circuit The delay working of gating and high accuracy delay line.
2. stepping time-delay mechanism according to claim 1, it is characterised in that the prime on-off circuit, track delay Unit, rear class on-off circuit and high accuracy delay line are sequentially connected, and the prime on-off circuit, rear class on-off circuit and height Precision delay circuit be connected with control circuit including:
The output terminal of the prime on-off circuit is connected with the input terminal of the track delay unit, and the track delay is single The output terminal of member is connected with the input terminal of the rear class on-off circuit, output terminal and the high accuracy of the rear class on-off circuit Delay circuit input terminal connection, the control circuit include first control signal output terminal, second control signal output terminal and 3rd control signal output, the control signal input of the first control signal output terminal and the prime on-off circuit connect Connect, the second control signal output terminal is connected with the control signal input of the rear class on-off circuit, the 3rd control Signal output part is connected with the control signal input of the high accuracy delay line.
3. stepping time-delay mechanism according to claim 2, it is characterised in that the prime on-off circuit includes N number of prime Switch, the track delay unit include N number of delay path, and the rear class on-off circuit includes N number of rear class switch, and described the N number of prime switch is corresponding with the n-th delay path, and the n-th delay path is corresponding with the n-th rear class switch.
4. stepping time-delay mechanism according to claim 3, it is characterised in that each delay path includes a radio frequency Delay line.
5. stepping time-delay mechanism as claimed in any of claims 1 to 4, it is characterised in that the track delay Unit includes PCB printing delay lines.
6. stepping time-delay mechanism as claimed in any of claims 1 to 4, it is characterised in that the prime switch electricity Road and the rear class on-off circuit include single pole multiple throw.
7. stepping time-delay mechanism as claimed in any of claims 1 to 4, it is characterised in that the high accuracy delay Circuit includes HMC856 high accuracy delay chips.
8. stepping time-delay mechanism as claimed in any of claims 1 to 4, it is characterised in that the control circuit bag Include any one in microcontroller, DSP, FPGA and ARM.
CN201711229515.9A 2017-11-29 2017-11-29 A kind of stepping time-delay mechanism Pending CN107919864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711229515.9A CN107919864A (en) 2017-11-29 2017-11-29 A kind of stepping time-delay mechanism

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711229515.9A CN107919864A (en) 2017-11-29 2017-11-29 A kind of stepping time-delay mechanism

Publications (1)

Publication Number Publication Date
CN107919864A true CN107919864A (en) 2018-04-17

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Application Number Title Priority Date Filing Date
CN201711229515.9A Pending CN107919864A (en) 2017-11-29 2017-11-29 A kind of stepping time-delay mechanism

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6191735B1 (en) * 1997-07-28 2001-02-20 Itt Manufacturing Enterprises, Inc. Time delay apparatus using monolithic microwave integrated circuit
US20080150604A1 (en) * 2006-12-22 2008-06-26 Norbert Huber Converter having a time-delay circuit for pwm signals
CN104237856A (en) * 2014-09-28 2014-12-24 贵州航天计量测试技术研究所 Radar detection signal high-accuracy time-delay generating device and control method
CN107395164A (en) * 2017-07-10 2017-11-24 东南大学 The continuously adjustable Real-time Delay line circuit of high-precision wide band
CN207588825U (en) * 2017-11-29 2018-07-06 北方通用电子集团有限公司 A kind of stepping time-delay mechanism

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6191735B1 (en) * 1997-07-28 2001-02-20 Itt Manufacturing Enterprises, Inc. Time delay apparatus using monolithic microwave integrated circuit
US20080150604A1 (en) * 2006-12-22 2008-06-26 Norbert Huber Converter having a time-delay circuit for pwm signals
CN104237856A (en) * 2014-09-28 2014-12-24 贵州航天计量测试技术研究所 Radar detection signal high-accuracy time-delay generating device and control method
CN107395164A (en) * 2017-07-10 2017-11-24 东南大学 The continuously adjustable Real-time Delay line circuit of high-precision wide band
CN207588825U (en) * 2017-11-29 2018-07-06 北方通用电子集团有限公司 A kind of stepping time-delay mechanism

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