CN107886920A - A kind of method and system for obtaining correct Mura offset datas - Google Patents
A kind of method and system for obtaining correct Mura offset datas Download PDFInfo
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- CN107886920A CN107886920A CN201711218894.1A CN201711218894A CN107886920A CN 107886920 A CN107886920 A CN 107886920A CN 201711218894 A CN201711218894 A CN 201711218894A CN 107886920 A CN107886920 A CN 107886920A
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- offset datas
- mura offset
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
Abstract
The invention discloses a kind of system for obtaining correct Mura offset datas, including first circuit board, second circuit board, tertiary circuit plate, switch boards and host computer, wherein:First circuit board connects liquid crystal panel, and it is provided with first memory;Tertiary circuit plate is used to obtain test gray scale image data from host computer;Time schedule controller is provided with second circuit board, takes revised test image data for receiving test gray scale image data and current Mura offset datas to obtain, and export to liquid crystal panel and shown;Switch boards include CPLD chip modules and the second memory of the current Mura offset datas of interim storage;Host computer is used to send order to switch boards and tertiary circuit plate to control to current Mura offset datas progress on-line checking.The invention also discloses corresponding method.The present invention can realize and current Mura offset datas are detected online, and can improve precision and efficiency of detecting, and can reduce the burning number to first memory.
Description
Technical field
The present invention relates to display field, more particularly to a kind of method and system for obtaining correct Mura offset datas.
Background technology
Due to liquid crystal display(Liquid Crystal Display, LCD)Flaw on processing procedure, often cause to produce
The liquid crystal panel of liquid crystal display out(Panel)Brightness irregularities, form various Mura(Mura refers to display
Brightness irregularities, cause the phenomenon of various vestiges).In order to lift the uniformity of liquid crystal panel lightness, can be shot by camera
Go out 35 grey menus(The pure white picture of different brightness)Mura forms, by contrasting the brightness of face plate center position, meter
The difference of peripheral regions and center brightness is calculated so as to obtain Mura offset datas(Luma data).Wherein, centre bit is compared
Bright region is put, luma data is reduced, to reduce brightness;The region darker than center, luma data is improved, it is bright to improve
Degree.Then, Mura offset datas are burned onto in the memory of liquid crystal panel by data recording device.Then, liquid crystal display is worked as
After upper electricity, time schedule controller(TCON)Can from memory read Mura offset datas, and with the original gray-scale picture number of input
According to carrying out the consistent picture of brightness after display compensates through Mura on liquid crystal panel after computing.
In actual applications, can be preserved always after Mura offset datas are burnt in memory, TCON every time after upper electricity all
Mura offset datas can be read and carry out Mura compensation.Now, if the picture after compensation still has exception, this can be initially believed that
Mura offset datas are incorrect.But it is existing technical, above-mentioned determination process is typically determined by artificial observation, example
Such as, by panel of the eye-observation after compensated in pure GTG(Such as in GTG 60)Under effect, if it is observed that brightness exist
Non-uniform phenomenon, then it is assumed that current Mura offset datas are incorrect.But the mode of this artificial judgment is also not accurate enough, together
When, to obtain accurate Mura offset datas, many times need repeatedly to replace new Mura offset datas to be verified, from
And multiple burning memory is needed, efficiency is very low.And the work of repeatedly burning memory is needed, so that entirely
Resolving is excessively complicated.
The content of the invention
The technical problems to be solved by the invention are, the invention discloses the method for obtaining correct Mura offset datas and
System, it is possible to achieve detected online to current Mura offset datas, and precision and efficiency of detecting can be improved, and can reduced pair
The burning number of first memory.
In order to solve the above-mentioned technical problem, the one side of embodiments of the invention provides a kind of acquisition correct Mura compensation number
According to system, it is characterised in that the system include first circuit board, second circuit board, tertiary circuit plate, switch boards and on
Position machine, the liquid crystal panel connection of the first circuit board and liquid crystal display, the first circuit board, the second circuit board point
It is not connected by switch boards with host computer, the second circuit board is connected with the first circuit board, the tertiary circuit
Plate is connected with host computer;
The switch boards, it is current for after the control signal from host computer is received, being parsed from the control signal
Mura offset datas or correct Mura offset datas, and for according to the control signal in second circuit board and switch boards
Connection is established between second memory, or connection is established between second circuit and the first circuit board;
The tertiary circuit plate, for after the control signal from host computer is received, being obtained from the control signal multigroup
The test gray scale image data associated with the current Mura offset datas, and it is conveyed to the second circuit board;
The second circuit board, is provided with time schedule controller, and the time schedule controller is used to receive the test gray-scale figure
As data, and calculating processing is carried out with the current Mura offset datas obtained from the switch boards, taken with acquisition revised
Test image data, and the revised test image data are exported to the liquid crystal panel by first circuit board and carried out
Display;
The host computer, for producing current Mura offset datas and the test associated with the current Mura offset datas
Gray scale image data, and send control signal to switch boards and tertiary circuit plate;And for obtaining what is shown on liquid crystal panel
The gradation data of display image corresponding to test image after amendment, and by parsing the gradation data to determine that current Mura is mended
Whether correct data are repaid, so as to obtain correct Mura offset datas;It is and described for correct Mura offset datas to be passed through
Switch boards are sent to the first circuit board;
Be provided with first memory on the first circuit board, the first memory be used for from the switch boards obtain from
The correct Mura offset datas of position machine, and store.
Wherein, the system also includes change-over panel, and the change-over panel is arranged between the host computer and the switch boards,
And be connected with the tertiary circuit plate, the change-over panel be used for by the control signal from host computer be converted into IIC signals or
SPI signal, wherein, the SPI signal is transported to the switch boards, and the IIC signals are transported to the tertiary circuit plate,
The SPI signal includes burning first memory and instructs and detect the instruction of Mura offset datas.
Wherein, the switch boards include CPLD chip modules and second memory, and the second memory is used to face
When store current Mura offset datas in the control signal from host computer, the CPLD chip modules are used to switch described the
Connection between two circuit boards and the first memory or the second memory.
Wherein, the CPLD chip modules further comprise SPI parsing modules and SPI interface modular converter, wherein:
The SPI parsing modules are used to parse the SPI signal from change-over panel, are burning first when being resolved to the SPI signal
During memory instructions, Mura offset datas that SPI signal is included are burnt to first as correct Mura offset datas and deposited
Reservoir;When being resolved to the SPI signal to detect the instruction of Mura offset datas, the Mura included in SPI signal is compensated
Data are burnt in second memory as current Mura offset datas, and by the second circuit board and the second memory
Establish SPI connections;
The SPI interface modular converter is used for signal write-in first storage for being parsed the SPI parsing modules
Device or second memory;Or for reading data from the first memory or second memory.
Wherein, the host computer obtains correct Mura offset datas by following manner:
Generate multigroup test gray scale image data associated with current Mura offset datas;
And to each group of test gray scale image data after current Mura offset datas amendment and the figure that is shown on liquid crystal panel
As carrying out gray proces and statistics with histogram;
Determine whether the picture brightness of display image data is uniform according to the statistics with histogram, to determine current Mura compensation number
According to whether correctly, when picture brightness is uniform, current Mura offset datas are defined as correct Mura and compensate number;Otherwise, really
Settled preceding Mura offset datas are incorrect, regenerate new current Mura offset datas and are sent to switch boards, and generation and institute
State the corresponding test gray scale image data of new current Mura offset datas and be sent to tertiary circuit plate, continue to new current
Mura offset datas are detected, until last obtain correctly current Mura offset datas.
Correspondingly, the embodiment of the present invention also includes a kind of method for obtaining correct Mura offset datas, applied to foregoing
In the system for obtaining correct Mura offset datas, it comprises the following steps:
Control signal of the switch boards reception from host computer, and when parsing it to detect the instruction of Mura offset datas, by described in
The current Mura offset datas included in instruction are stored, and are established and connected with the second circuit board;
Tertiary circuit plate receives the control signal from host computer, therefrom obtains multigroup associated with current Mura offset datas
Gray scale image data are tested, and are conveyed to the second circuit board;
Second circuit board obtains the current Mura offset datas from the switch boards, and is obtained from the tertiary circuit plate
The test gray scale image data, successively by each group of test gray scale image data with described currently at Mura offset datas
Reason, revised test image data corresponding to acquisition, and be output to through first circuit board on liquid crystal panel;
The host computer obtains the gradation data of display image corresponding to test image data after the amendment shown on liquid crystal panel,
And by parsing the gradation data to determine whether current Mura offset datas correct, so as to obtain correct Mura compensation number
According to.
Wherein, further comprise:
Control signal from host computer is converted into IIC signals or SPI signal by change-over panel, and the SPI signal is conveyed to
The switch boards, or the IIC signals are transported to the tertiary circuit plate;Wherein, the SPI signal includes burning first
Memory instructions and detection Mura offset data instructions.
Wherein, further comprise:
The host computer sends control signal, the control signal after it is determined that current Mura offset datas are correct, to switch boards
In include the instruction of burning first memory and current Mura offset datas;
The switch boards parse the instruction of burning first memory and current Mura offset datas from the control signal,
The current Mura offset datas are burnt in the first memory in first circuit board as correct Mura offset datas, and
The connection established between the second circuit board and the first memory.
Wherein, the step that multigroup test gray scale image data associated with Mura offset datas are generated in host computer
Suddenly include:
Obtain corresponding multiple GTGs in current Mura offset datas;
Wherein three GTGs are chosen, the middle GTG in three GTGs between two neighboring GTG, 0 GTG and 255 GTGs
Solid white image as it is multigroup test gray scale image data.
Wherein, the host computer obtains display image corresponding to test image data after the amendment shown on liquid crystal panel
Gradation data, and by parsing the gradation data to determine whether current Mura offset datas correct, so as to obtain correctly
The step of Mura offset datas is specially:
Multigroup test gray scale image data associated with current Mura offset datas are generated in host computer;
To each group of test gray scale image data after current Mura offset datas amendment and the image that is shown on liquid crystal panel
Carry out gray proces and statistics with histogram;
Determine whether the picture brightness of display image data is uniform according to the statistics with histogram, to determine current Mura compensation number
According to whether correctly, when picture brightness is uniform, current Mura offset datas are defined as correct Mura and compensate number;Otherwise, really
Settled preceding Mura offset datas are incorrect, regenerate new current Mura offset datas and are sent to switch boards, and generation and institute
State the corresponding test gray scale image data of new current Mura offset datas and be sent to tertiary circuit plate, continue to new current
Mura offset datas are detected, until last obtain correctly current Mura offset datas.
Wherein, it is described to each group of test gray scale image data after current Mura offset datas amendment and in liquid crystal panel
The step of image progress gray proces and statistics with histogram of upper display, further comprises:
For test image after one group of amendment, by interval shooting multiple image, and each pixel obtained per piece image is corresponding
Gray value;
In multiple gray values corresponding to each pixel of the multiple image, maximum gradation value and minimum gradation value will be excluded, and
Remaining gray value is averaged to obtain final gray value corresponding to each pixel, so as to obtain each group of display image
Gradation data.
Wherein, determine whether the picture brightness of display image data is uniform according to the statistics with histogram, it is current to determine
The whether correct step of Mura offset datas includes:
Statistics with histogram is carried out to the gradation data of every group of display image, and counts of pixel corresponding to each of which gray value
Number;
The maximum absolute value value and number for deviateing desired value are counted, and respectively compared with relatively threshold value set in advance,
So that it is determined that whether the picture of gradation data is uniform, to determine whether current Mura offset datas are correct.
Implement the embodiment of the present invention, have the advantages that:
A kind of method and system for obtaining correct Mura offset datas provided in an embodiment of the present invention.Turned by host computer to control
Change plate and be in Mura offset data detection patterns, and current Mura offset datas are stored in the second memory of second circuit board
In, multigroup test gray scale image data associated with current Mura offset datas are selected, are conveyed to the second circuit board;
In second circuit board, each group of test gray scale image data and current Mura offset datas are handled successively, corresponded to
Amendment after test image data output shown to liquid crystal panel;After the amendment shown on liquid crystal panel being shot by camera
Test image, and obtain the gradation data of display image corresponding to test image after each group of amendment;To all display images
Gradation data carries out statistics with histogram, determines whether the picture brightness of display image data is uniform according to the statistics with histogram,
To determine whether current Mura offset datas are correct;, just will be described current only after it is determined that current Mura offset datas are correct
Mura offset datas are burnt in the first memory in first circuit board.It can so realize and number is compensated to current Mura online
According to being detected, and precision and efficiency of detecting can be improved, and the burning number to first memory can be reduced.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is a kind of structural representation of one embodiment of system for obtaining correct Mura offset datas provided by the invention
Figure;
Fig. 2 is the more detailed structure of switch boards and connection diagram in Fig. 1;
Fig. 3 is a kind of main flow signal of one embodiment of method for obtaining correct Mura offset datas provided by the invention
Figure.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clearly complete
Ground describes, it is clear that described embodiment is only the part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art obtained on the premise of creative work is not made it is all its
Its embodiment, belongs to the scope of protection of the invention.
Here, it should also be noted that, in order to avoid having obscured the present invention because of unnecessary details, in the accompanying drawings only
Show and according to the solution of the present invention closely related structure and/or processing step, and eliminate little with relation of the present invention
Other details.
As shown in figure 1, show an a kind of implementation of system for obtaining correct Mura offset datas provided by the invention
The structural representation of example;Please in the lump with reference to shown in Fig. 2, in this embodiment, detection Mura offset data pathological systems include:
First circuit board 11, second circuit board 12, tertiary circuit plate 15, switch boards 14 and host computer 3;Wherein:
The first circuit board 11 is connected with the liquid crystal panel 2 of liquid crystal display, the first circuit board 11, the second circuit
Plate 12 is connected by switch boards 14 with host computer 3 respectively, and the second circuit board 12 is connected with the first circuit board 11,
The tertiary circuit plate 15 is connected with host computer 3;
The switch boards 14, work as after the control signal from host computer 3 is received, being parsed from the control signal
Preceding Mura offset datas or correct Mura offset datas, and in second circuit board 12 and being switched according to the control signal
Establish connection between the second memory of plate 14, or second circuit board 12 and the first circuit board 11 first memory it
Between establish connection;Specifically, the switch boards 14, include CPLD(Complex Programmable Logic Device,
CPLD)Chip module and second memory 142, the second memory 142 come for interim storage
From the current Mura offset datas in the control signal of host computer 3, it can be SRAM(SRAM), the CPLD
Chip module is deposited for switching time schedule controller 121 in the second circuit board with the first memory 110 or described second
Connection between reservoir 142;
The tertiary circuit plate 15, for receive the control signal from host computer 3, obtained from the control signal it is multigroup with
The associated test gray scale image data of the current Mura offset datas, and it is conveyed to the second circuit board 12;
The second circuit board 12, is provided with time schedule controller 121, and the time schedule controller 121 is used for the test ash
Rank view data, and with the current Mura offset datas obtained from the switch boards 14 and carrying out calculating processing(That is compensation meter
Calculate), revised test image data are taken to obtain, and the revised test image data are exported by connecting line 13
To first circuit board 11, and exported to the liquid crystal panel 2 and shown by first circuit board 11;
The host computer 3, for producing current Mura offset datas and the survey associated with the current Mura offset datas
Gray scale image data are tried, and control is sent to switch boards 14 and tertiary circuit plate 15, and control to enter current Mura offset datas
Row on-line checking, obtain correct Mura offset datas.Specifically, the host computer is used to obtain what is shown on liquid crystal panel 2
The gradation data of display image corresponding to test image after amendment, and by parsing the gradation data to determine that current Mura is mended
Whether correct data are repaid, so as to obtain correct Mura offset datas;It is and described for correct Mura offset datas to be passed through
Switch boards 14 are sent to the first circuit board 11;
First memory 110 is provided with the first circuit board 11, the first memory 110 is used for from the switch boards 14
The correct Mura offset datas from host computer 3 are obtained, and are stored.
Wherein, further comprise a switch boards 16, the switch boards 16 set with host computer 3 and the switch boards 16 it
Between, and be connected with tertiary circuit plate 15, the change-over panel 16 is used to the control signal from host computer 3 being converted into IIC letters
Number or SPI signal, wherein, SPI signal is transported to the switch boards 14, and IIC signals are transported to the tertiary circuit plate 15,
The SPI signal includes burning first memory and instructs and detect the instruction of Mura offset datas.
Wherein, the CPLD chip modules further comprise SPI parsing modules 141 and SPI interface modular converter 140, its
In:
The SPI parsing modules 141 are used to parse the SPI signal from change-over panel 16, when detecting that its CS1 port is low electricity
It is flat, parse the SPI signal and instructed for burning first memory, using the Mura offset datas that SPI signal is included as correct
Mura offset datas be burnt to first memory 110;When it is low level to detect its CS2 end, parsing the SPI signal is
The instruction of Mura offset datas is detected, using the Mura offset datas included in SPI signal as current Mura offset datas burning
Into second memory 142, and the second circuit board 12 is established into SPI with the second memory 142 and is connected, when sequential control
When device 121 processed is re-powered or resetted, it will read the current Mura offset datas from second memory;
The SPI interface modular converter 140 is used for the signal write-in that is parsed the SPI parsing modules 141 described the
One memory 110 or second memory 142;Or for reading number from the first memory 110 or second memory 142
According to.
In addition, it is necessary to explanation, is communicated due to employing SPI interface on change-over panel, is briefly described below one
Lower SPI Principle of Communication, SPI communication is very simple, and it is worked with master-slave mode, and this pattern generally has a main equipment and one
Individual or multiple slave units, it is necessary at least 4 lines, in fact 3 can also(For example, when being used for one-way transmission, that is, half-duplex
Mode).And all equipment based on SPI are shared, they are SDI(Data input)、SDO(Data output)、SCLK(When
Clock)、CS(Piece selects).Wherein, the mode of communication can be that spi bus main frame output/slave inputs, or spi bus main frame is defeated
Enter/slave output;Wherein clock signal SCLK is produced by main equipment;Chip selection signal CS is slave unit enable signal, by main equipment
Control, when only chip selection signal is prespecified enable signal(Such as high potential), operation to this chip is just effective.Therefore allow
Multiple SPI equipment are connected on same bus to be possibly realized.
In one example, the host computer obtains correct Mura offset datas by following manner:
Generate multigroup test gray scale image data associated with current Mura offset datas;
And to each group of test gray scale image data after current Mura offset datas amendment and the figure that is shown on liquid crystal panel
As carrying out gray proces and statistics with histogram;
Determine whether the picture brightness of display image data is uniform according to the statistics with histogram, to determine current Mura compensation number
According to whether correctly, when picture brightness is uniform, current Mura offset datas are defined as correct Mura and compensate number;Otherwise, really
Settled preceding Mura offset datas are incorrect, regenerate new current Mura offset datas and are sent to switch boards, and generation and institute
State the corresponding test gray scale image data of new current Mura offset datas and be sent to tertiary circuit plate, continue to new current
Mura offset datas are detected, until last obtain correctly current Mura offset datas.
As shown in figure 3, show the one of a kind of method for obtaining correct Mura offset datas provided in an embodiment of the present invention
The main flow schematic diagram of individual embodiment, it is to be understood that this method is implemented in the system as shown in Fig. 1 and Fig. 2, at this
In embodiment, this method comprises the following steps:
Step S10, switch boards receive the control signal from host computer, and are mended being resolved to the control signal for detection Mura
When repaying data command, what the current Mura offset datas included in the instruction were burnt to the CPLD modules of switch boards second deposits
In reservoir;
Step S11, control switch boards are established with second circuit board and connected, so that second circuit board reading is stored in described second and deposited
Current Mura offset datas in reservoir;
Step S12, tertiary circuit plate receive and parse through the control signal from host computer(IIC signals), obtain it is multigroup with it is current
The associated test gray scale image data of Mura offset datas, and it is conveyed to the second circuit board;
Wherein, further comprise producing multigroup test gray scale image data associated with Mura offset datas in host computer
Step is:
Obtain corresponding multiple GTGs in current Mura offset datas;
Wherein three GTGs are chosen, the middle GTG in three GTGs between two neighboring GTG(Median), 0 GTG and
The solid white image of 255 GTGs is as multigroup(I.e. seven groups)Test gray scale image data.
It is understood that select seven groups to be only for example in the present embodiment, in other examples, when can select
Different number of group;
Step S13, second circuit board obtain the current Mura offset datas from the switch boards, and from the tertiary circuit
The test gray scale image data are obtained in plate, successively by each group of test gray scale image data and the current Mura compensation number
According to being handled, revised test image data corresponding to acquisition, and be output to through first circuit board on liquid crystal panel;
Step S14, the host computer obtain display image corresponding to test image data after the amendment shown on liquid crystal panel
Gradation data, and by parsing the gradation data to determine whether current Mura offset datas correct, so as to obtain correctly
Mura offset datas.
Specifically, methods described further comprises following steps:
Control signal from host computer is converted into IIC signals or SPI signal by change-over panel, and the SPI signal is conveyed to
The switch boards, or the IIC signals are transported to the tertiary circuit plate;Wherein, the SPI signal includes burning first
Memory instructions and detection Mura offset data instructions.
Specifically, the step S14 further comprises:
Step S140, multigroup test gray scale image data associated with current Mura offset datas are generated in host computer;
Step S141, each group of test gray scale image data are shown after current Mura offset datas amendment and on liquid crystal panel
The image shown carries out gray proces and statistics with histogram;
Step S142, determine whether the picture brightness of display image data is uniform according to the statistics with histogram, it is current to determine
Whether Mura offset datas are correct, when picture brightness is uniform, current Mura offset datas are defined as into correct Mura and compensated
Number;Otherwise, it determines current Mura offset datas are incorrect, regenerate new current Mura offset datas and be sent to switch boards,
And generate the test gray scale image data corresponding with the new current Mura offset datas and be sent to tertiary circuit plate, continue
New current Mura offset datas are detected, until last obtain correctly current Mura offset datas.
The step S141 further comprises:
The revised test image shown on shooting liquid crystal panel, and obtain display corresponding to test image after each group of amendment
The gradation data of image;Specifically, including:
For test image after one group of amendment, pass through interval shooting multiple image(Such as five width), and obtain each per piece image
Gray value corresponding to pixel;
In multiple gray values corresponding to each pixel of the multiple image, maximum gradation value and minimum gradation value will be excluded, and
Remaining gray value is averaged to obtain final gray value corresponding to each pixel, so as to obtain each group of display image
Gradation data, it is to be understood that pass through above-mentioned processing, it is possible to reduce because of error caused by shooting, improve gradation data
Accuracy rate;
In this embodiment, due to there is test image after seven groups of amendments, therefore the gradation data of seven width display images is finally obtained;
Wherein, the step S142 further comprises:
Statistics with histogram is carried out to the gradation data of every group of display image, and counts of pixel corresponding to each of which gray value
Number;It is understood that the histogram of grey level range [0, L-1] digital picture is discrete function h (Rk)=Nk;Wherein, Rk is
Kth level gray value, Nk are the number that gray scale is Nk in image, and picture corresponding to each gray value can be obtained by histogram functions
Plain number;
The maximum absolute value value and number for deviateing desired value are counted, and respectively compared with relatively threshold value set in advance,
So that it is determined that whether the picture of gradation data is uniform, if picture is uniform, confirm that current Mura offset datas are correct
Mura offset datas.
It is understood that by the form of histogram, and compared with comparing threshold value, this relatively ratio passes through people
Eye is more objective to identify, precision is high, and can improve efficiency.
It is understood that methods described further comprises:
Host computer sends control signal after it is determined that current Mura offset datas are correct, to switch boards, is wrapped in the control signal
First memory containing burning instructs and current Mura offset datas;
The switch boards parse the instruction of burning first memory and current Mura offset datas from the control signal,
The current Mura offset datas are burnt in the first memory in first circuit board as correct Mura offset datas, and
The connection established between the second circuit board and the first memory.
In summary, a kind of method and system for obtaining correct Mura offset datas provided in an embodiment of the present invention.Pass through
Current Mura offset datas are stored in second circuit board by host computer to control change-over panel to be in Mura offset data detection patterns
Second memory in, select multigroup test gray scale image data associated with current Mura offset datas, be conveyed to described in
Second circuit board;In second circuit board, each group of test gray scale image data and current Mura offset datas are carried out successively
Processing, test image data output is shown to liquid crystal panel after obtaining corresponding correct;Liquid crystal panel is shot by camera
Test image after the amendment of upper display, and obtain the gradation data of display image corresponding to test image after each group of amendment;It is right
The gradation data of all display images carries out statistics with histogram, and the picture of display image data is determined according to the statistics with histogram
Whether brightness is uniform, to determine whether current Mura offset datas are correct;Only after it is determined that current Mura offset datas are correct,
Just the current Mura offset datas are burnt in the first memory in first circuit board.It can so realize online to working as
Preceding Mura offset datas are detected, and can improve precision and efficiency of detecting, and can reduce the burning number to first memory.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality
Body or operation make a distinction with another entity or operation, and not necessarily require or imply and deposited between these entities or operation
In any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant are intended to
Nonexcludability includes, so that process, method, article or equipment including a series of elements not only will including those
Element, but also the other element including being not expressly set out, or it is this process, method, article or equipment also to include
Intrinsic key element.In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that
Other identical element also be present in process, method, article or equipment including the key element.
Described above is only the embodiment of the application, it is noted that for the ordinary skill people of the art
For member, on the premise of the application principle is not departed from, some improvements and modifications can also be made, these improvements and modifications also should
It is considered as the protection domain of the application.
Claims (10)
1. a kind of system for obtaining correct Mura offset datas, it is characterised in that the system includes first circuit board, the second electricity
Road plate, tertiary circuit plate, switch boards and host computer, the liquid crystal panel connection of the first circuit board and liquid crystal display, institute
State first circuit board, the second circuit board is connected by switch boards with host computer respectively, the second circuit board with it is described
First circuit board is connected, and the tertiary circuit plate is connected with host computer;
The switch boards, it is current for after the control signal from host computer is received, being parsed from the control signal
Mura offset datas or correct Mura offset datas, and for according to the control signal in second circuit board and switch boards
Connection is established between second memory, or connection is established between second circuit and the first circuit board;
The tertiary circuit plate, for after the control signal from host computer is received, being obtained from the control signal multigroup
The test gray scale image data associated with the current Mura offset datas, and it is conveyed to the second circuit board;
The second circuit board, is provided with time schedule controller, and the time schedule controller is used to receive the test gray-scale figure
As data, and calculating processing is carried out with the current Mura offset datas obtained from the switch boards, taken with acquisition revised
Test image data, and the revised test image data are exported to the liquid crystal panel by first circuit board and carried out
Display;
The host computer, for producing current Mura offset datas and the test associated with the current Mura offset datas
Gray scale image data, and send control signal to switch boards and tertiary circuit plate;And for obtaining what is shown on liquid crystal panel
The gradation data of display image corresponding to test image after amendment, and by parsing the gradation data to determine that current Mura is mended
Whether correct data are repaid, so as to obtain correct Mura offset datas;It is and described for correct Mura offset datas to be passed through
Switch boards are sent to the first circuit board;
Be provided with first memory on the first circuit board, the first memory be used for from the switch boards obtain from
The correct Mura offset datas of position machine, and store.
2. the system as claimed in claim 1, it is characterised in that the system also includes change-over panel, and the change-over panel is arranged at
Between the host computer and the switch boards, and it is connected with the tertiary circuit plate, the change-over panel is upper for that will come from
The control signal of machine is converted into IIC signals or SPI signal, wherein, the SPI signal is transported to the switch boards, the IIC
Signal is transported to the tertiary circuit plate, and the SPI signal includes burning first memory and instructs and detect Mura compensation numbers
According to instruction.
3. system as claimed in claim 2, it is characterised in that the switch boards include CPLD chip modules and second deposited
Reservoir, the current Mura offset datas that the second memory is used in control signal of the interim storage from host computer are described
CPLD chip modules are used to switch the connection between the second circuit board and the first memory or the second memory.
4. system as claimed in claim 3, it is characterised in that the CPLD chip modules further comprise SPI parsing modules
With SPI interface modular converter, wherein:
The SPI parsing modules are used to parse the SPI signal from change-over panel, are burning first when being resolved to the SPI signal
During memory instructions, Mura offset datas that SPI signal is included are burnt to first as correct Mura offset datas and deposited
Reservoir;When being resolved to the SPI signal to detect the instruction of Mura offset datas, the Mura included in SPI signal is compensated
Data are burnt in second memory as current Mura offset datas, and by the second circuit board and the second memory
Establish SPI connections;
The SPI interface modular converter is used for signal write-in first storage for being parsed the SPI parsing modules
Device or second memory;Or for reading data from the first memory or second memory.
5. system as claimed in claim 4, it is characterised in that the host computer obtains correct Mura by following manner and mended
Repay data:
Generate multigroup test gray scale image data associated with current Mura offset datas;
And to each group of test gray scale image data after current Mura offset datas amendment and the figure that is shown on liquid crystal panel
As carrying out gray proces and statistics with histogram;
Determine whether the picture brightness of display image data is uniform according to the statistics with histogram, to determine current Mura compensation number
According to whether correctly, when picture brightness is uniform, current Mura offset datas are defined as correct Mura and compensate number;Otherwise, really
Settled preceding Mura offset datas are incorrect, regenerate new current Mura offset datas and are sent to switch boards, and generation and institute
State the corresponding test gray scale image data of new current Mura offset datas and be sent to tertiary circuit plate, continue to new current
Mura offset datas are detected, until last obtain correctly current Mura offset datas.
6. a kind of method for obtaining correct Mura offset datas, correct applied to the acquisition as described in any one of claim 1 to 5
In the system of Mura offset datas, it is characterised in that comprise the following steps:
Switch boards receive the control signal from host computer, and it is detection Mura offset datas being resolved to the control signal
During instruction, the current Mura offset datas included in the instruction are stored, and establishes and connects with the second circuit board;
Tertiary circuit plate receives the control signal from host computer, therefrom obtains multigroup associated with current Mura offset datas
Gray scale image data are tested, and are conveyed to the second circuit board;
Second circuit board obtains the current Mura offset datas from the switch boards, and is obtained from the tertiary circuit plate
The test gray scale image data, successively by each group of test gray scale image data with described currently at Mura offset datas
Reason, revised test image data corresponding to acquisition, and be output to through first circuit board on liquid crystal panel;
Host computer obtains the gradation data of display image corresponding to test image data after the amendment shown on liquid crystal panel, and leads to
Cross and parse the gradation data to determine whether current Mura offset datas are correct, so as to obtain correct Mura offset datas.
7. method as claimed in claim 6, it is characterised in that further comprise:
Control signal from host computer is converted into IIC signals or SPI signal by change-over panel, and the SPI signal is conveyed to
The switch boards, or the IIC signals are transported to the tertiary circuit plate;Wherein, the SPI signal includes burning first
Memory instructions and detection Mura offset data instructions.
8. method as claimed in claims 6 or 7, it is characterised in that further comprise following steps:
The host computer sends control signal, the control signal after it is determined that current Mura offset datas are correct, to switch boards
In include the instruction of burning first memory and current Mura offset datas;
The switch boards parse the instruction of burning first memory and current Mura offset datas from the control signal,
The current Mura offset datas are burnt in the first memory in first circuit board as correct Mura offset datas, and
The connection established between the second circuit board and the first memory.
9. method as claimed in claim 8, it is characterised in that it is described generated in host computer it is multigroup with Mura offset data phases
The step of test gray scale image data of association, includes:
Obtain corresponding multiple GTGs in current Mura offset datas;
Wherein three GTGs are chosen, the middle GTG in three GTGs between two neighboring GTG, 0 GTG and 255 GTGs
Solid white image as it is multigroup test gray scale image data.
10. method as claimed in claim 9, it is characterised in that after the host computer obtains the amendment shown on liquid crystal panel
The gradation data of display image corresponding to test image data, and by parsing the gradation data to determine that current Mura is compensated
Whether data are correct, are specially the step of correct Mura offset datas so as to obtain:
Multigroup test gray scale image data associated with current Mura offset datas are generated in host computer;
To each group of test gray scale image data after current Mura offset datas amendment and the image that is shown on liquid crystal panel
Carry out gray proces and statistics with histogram;
Determine whether the picture brightness of display image data is uniform according to the statistics with histogram, to determine current Mura compensation number
According to whether correctly, when picture brightness is uniform, current Mura offset datas are defined as correct Mura and compensate number;Otherwise, really
Settled preceding Mura offset datas are incorrect, regenerate new current Mura offset datas and are sent to switch boards, and generation and institute
State the corresponding test gray scale image data of new current Mura offset datas and be sent to tertiary circuit plate, continue to new current
Mura offset datas are detected, until last obtain correctly current Mura offset datas.
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101017255A (en) * | 2006-02-06 | 2007-08-15 | Lg.菲利浦Lcd株式会社 | Picture quality controling system |
KR101232178B1 (en) * | 2006-11-27 | 2013-02-13 | 엘지디스플레이 주식회사 | Method and Apparatus for Compensating Display Defect of Flat Display |
WO2013035635A1 (en) * | 2011-09-07 | 2013-03-14 | シャープ株式会社 | Image display device and image display method |
US20130328756A1 (en) * | 2012-06-06 | 2013-12-12 | Innolux Corporation | Display and driving method thereof |
CN104409066A (en) * | 2014-12-10 | 2015-03-11 | 深圳市华星光电技术有限公司 | Method for acquiring gray-scale compensation value of pixel |
CN105244004A (en) * | 2015-11-23 | 2016-01-13 | 深圳市华星光电技术有限公司 | Control board and liquid crystal display with control board |
CN106125367A (en) * | 2016-08-26 | 2016-11-16 | 深圳市华星光电技术有限公司 | A kind of method and device detecting Mura offset data exception |
CN106228924A (en) * | 2016-08-05 | 2016-12-14 | 武汉精测电子技术股份有限公司 | Mottle compensating image signals generating means, method and color spot failures repair system |
CN107221290A (en) * | 2017-08-01 | 2017-09-29 | 芯颖科技有限公司 | Mura compensation display method and device and computer readable storage medium |
-
2017
- 2017-11-28 CN CN201711218894.1A patent/CN107886920B/en active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101017255A (en) * | 2006-02-06 | 2007-08-15 | Lg.菲利浦Lcd株式会社 | Picture quality controling system |
KR101232178B1 (en) * | 2006-11-27 | 2013-02-13 | 엘지디스플레이 주식회사 | Method and Apparatus for Compensating Display Defect of Flat Display |
WO2013035635A1 (en) * | 2011-09-07 | 2013-03-14 | シャープ株式会社 | Image display device and image display method |
US20130328756A1 (en) * | 2012-06-06 | 2013-12-12 | Innolux Corporation | Display and driving method thereof |
CN104409066A (en) * | 2014-12-10 | 2015-03-11 | 深圳市华星光电技术有限公司 | Method for acquiring gray-scale compensation value of pixel |
CN105244004A (en) * | 2015-11-23 | 2016-01-13 | 深圳市华星光电技术有限公司 | Control board and liquid crystal display with control board |
CN106228924A (en) * | 2016-08-05 | 2016-12-14 | 武汉精测电子技术股份有限公司 | Mottle compensating image signals generating means, method and color spot failures repair system |
CN106125367A (en) * | 2016-08-26 | 2016-11-16 | 深圳市华星光电技术有限公司 | A kind of method and device detecting Mura offset data exception |
CN107221290A (en) * | 2017-08-01 | 2017-09-29 | 芯颖科技有限公司 | Mura compensation display method and device and computer readable storage medium |
Cited By (16)
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---|---|---|---|---|
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CN111243505A (en) * | 2018-11-29 | 2020-06-05 | 昆山工研院新型平板显示技术中心有限公司 | Pixel driving circuit and display device |
CN109509422A (en) * | 2018-12-27 | 2019-03-22 | 惠科股份有限公司 | Display panel, drive circuit and display device |
CN109509422B (en) * | 2018-12-27 | 2021-08-24 | 惠科股份有限公司 | Display panel drive circuit and display device |
CN111381834B (en) * | 2018-12-28 | 2023-09-19 | 深圳Tcl新技术有限公司 | Method for rapidly eliminating Mura of display panel |
CN111381834A (en) * | 2018-12-28 | 2020-07-07 | 深圳Tcl新技术有限公司 | Method for quickly eliminating Mura of display panel |
CN111613157A (en) * | 2019-02-22 | 2020-09-01 | 咸阳彩虹光电科技有限公司 | Mura repair test method of display panel, display panel and display device |
CN109637431B (en) * | 2019-02-25 | 2022-04-01 | 武汉天马微电子有限公司 | Display compensation method of display panel |
CN109637431A (en) * | 2019-02-25 | 2019-04-16 | 武汉天马微电子有限公司 | A kind of display compensation method of display panel |
WO2021017029A1 (en) * | 2019-07-29 | 2021-02-04 | Tcl华星光电技术有限公司 | Unified-format demura data application method |
CN110246469A (en) * | 2019-07-29 | 2019-09-17 | 深圳市华星光电技术有限公司 | The demura data application method of unified format |
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CN111028799B (en) * | 2019-12-10 | 2021-09-03 | Tcl华星光电技术有限公司 | Driving circuit and driving method of display panel |
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CN111477168B (en) * | 2020-02-27 | 2021-12-28 | 京东方科技集团股份有限公司 | Compensation method and display method of display panel |
CN111554225A (en) * | 2020-05-20 | 2020-08-18 | Tcl华星光电技术有限公司 | Display device, and speckle eliminating system and speckle eliminating method thereof |
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