CN107863128B - Error correction method, system and device for multi-level flash memory unit and readable storage medium - Google Patents
Error correction method, system and device for multi-level flash memory unit and readable storage medium Download PDFInfo
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- CN107863128B CN107863128B CN201711215478.6A CN201711215478A CN107863128B CN 107863128 B CN107863128 B CN 107863128B CN 201711215478 A CN201711215478 A CN 201711215478A CN 107863128 B CN107863128 B CN 107863128B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
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- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
Abstract
The application discloses a multi-level flash memory cell error correction method, a system, a device and a readable storage medium, which comprises the steps of calculating a cell threshold voltage distribution mean value of each threshold voltage window after the cell interference by using a threshold voltage probability density function of the cell interference, calculating a threshold voltage distribution mean value and a standard deviation of each threshold voltage window after the cell interference and the persistent interference, calculating an offset value of each threshold voltage window reference voltage, and adjusting the reference voltage of each threshold voltage window in an error correction code decoder by using the offset value of each threshold voltage window reference voltage.
Description
Technical Field
The present invention relates to the field of flash memories, and in particular, to a method, a system, an apparatus, and a readable storage medium for error correction of multi-level flash memory cells.
Background
However, the increase of the flash memory density also increases the internal interference of the flash memory, thereby affecting the reliability of the flash memory, and as the M L C (Multi-L ev Cell, Multi-level Cell flash memory) and T L C type NAND flash memories are applied, the internal interference of the flash memory increases, the traditional BCH error correction code can no longer ensure the reliability of the flash memory-15. And has a near shannon limitCompared with a BCH error correcting Code which uses a hard decision decoding method, L DPC error correcting Code (L DPC, &lTtTtranslation = L "&gTtL &lTt/T &gTtow decoding strategy Code) can greatly reduce the error rate by using a soft decision decoding method, thereby ensuring the error rate of the flash memory to be 10-15In the flash memory decoding aspect, L DPC error correcting code generally adopts MIN-SUM decoding algorithm, meanwhile, researchers also propose some improved decoding algorithm for improving the reliability of the flash memory.
In the conventional flash memory, a plurality of reference voltages are needed to sense the voltage range of a flash memory unit, and log-likelihood ratios stored in a table are given as prior information of L DPC decoding, in terms of sensing the flash memory unit, each flash memory unit voltage is positioned between two adjacent reference voltages, therefore, the voltage range of one flash memory unit is sensed to be a certain adjacent reference voltage, and two adjacent reference voltages have a log-likelihood ratio stored for decoding, but the endurance disturbance of the flash memory increases along with the increase of the erasing and programming times and the data retention time (data retention time), the originally stored log-likelihood ratio is not accurate any more, so that the error correction performance of the L DPC error correction code is gradually reduced.
Therefore, how to develop a dynamic detection error correction method, which can ensure stable error correction performance, is a problem that needs to be solved by the current technicians.
Disclosure of Invention
In view of the above, the present invention provides a method, a system, a device and a readable storage medium for error correction of multi-level flash memory cells, so that the error correction code of the flash memory can ensure the reliability of the flash memory and the error correction performance of the error correction code. The specific scheme is as follows:
a multi-level flash memory cell error correction method, comprising:
calculating the unit threshold voltage distribution mean value of each threshold voltage window after the inter-unit interference by using the threshold voltage probability density function of the inter-unit interference;
calculating the threshold voltage distribution mean value and standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference;
calculating the deviation value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code.
Optionally, the calculating a cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference includes:
calculating the offset mean value of threshold voltage distribution of the flash memory after the flash memory is subjected to the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference;
and calculating the threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the offset mean value of the threshold voltage distribution of the flash memory after the inter-cell interference and the voltage mean value of each threshold voltage window without interference.
Optionally, the step of calculating the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-cell interference and the persistent interference by using the mean value of the cell threshold voltage distribution of each threshold voltage window after the inter-cell interference includes:
calculating threshold voltage distribution offset of each threshold voltage window after the inter-cell interference and the persistent interference by using the cell threshold voltage average value of each threshold voltage window after the inter-cell interference;
calculating the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the persistent interference by using the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the intercell interference and the persistent interference;
and calculating the threshold voltage distribution standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the interference-free standard deviation of each threshold voltage window, the standard deviation of threshold voltage offset distribution of the flash memory after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the persistent interference.
Optionally, the standard deviation of the threshold voltage offset distribution of the flash memory after the inter-cell interference is calculated by using a threshold voltage probability density function of the inter-cell interference and a threshold voltage offset of the flash memory after the inter-cell interference.
Optionally, the calculating the deviation value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window subjected to the inter-cell interference and the persistent interference includes:
converting the threshold voltage distribution of each threshold voltage window after the intercell interference and the persistent interference into Gaussian distribution, calculating the mean value and the standard deviation of the Gaussian distribution, and calculating the intersection point of each threshold voltage window according to the distribution;
and setting the hard decision reference voltage on the calculated intersection point, and calculating the deviation value of the reference voltage between the threshold voltage windows after the intercell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window.
Optionally, before the error correction is performed on the flash memory by using the error correction code, the method further includes:
calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-cell interference and the persistent interference;
and inputting the log-likelihood ratio of the highest bit and the lowest bit of the flash memory into the error correcting code decoder.
The invention also discloses a multi-level flash memory unit error correction system, which comprises:
the inter-cell interference calculation module is used for calculating the cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference;
the persistent interference calculation module is used for calculating the threshold voltage distribution mean value and the standard deviation of each threshold voltage window after the inter-cell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference;
and the reference voltage calculation module is used for calculating the deviation value of the reference voltage between the threshold voltage windows by utilizing the threshold voltage distribution mean value and the standard deviation of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in the error correction code decoder by utilizing the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by utilizing the error correction code.
Optionally, the method further includes:
and the log-likelihood ratio module is used for calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory by utilizing the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-unit interference and the persistent interference, and inputting the log-likelihood ratio of the highest bit and the lowest bit of the flash memory into the error correcting code decoder.
The invention also discloses a multi-level flash memory unit error correction device, which comprises:
a memory to store instructions; calculating a unit threshold voltage distribution mean value of each threshold voltage window after the inter-unit interference by using a threshold voltage probability density function of the inter-unit interference; calculating the threshold voltage distribution mean value and standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference; calculating the deviation value of the reference voltage between the threshold voltage windows by using the threshold voltage distribution mean value and the standard deviation of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code;
a processor to execute the instructions in the memory.
The invention also discloses a computer readable storage medium, wherein the computer readable storage medium is stored with a multi-level flash memory cell error correction program, and the multi-level flash memory cell error correction program realizes the steps of the multi-level flash memory cell error correction method when being executed by a processor.
In the invention, the error correction method of the multi-level flash memory unit comprises the following steps: calculating the unit threshold voltage distribution mean value of each threshold voltage window after the inter-unit interference by using the threshold voltage probability density function of the inter-unit interference; calculating the threshold voltage distribution mean value and standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference; calculating the deviation value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code.
The invention comprehensively considers the influence of the intercell interference and the persistent interference on the flash memory, calculates the reference voltage dynamically adjusted according to the erasure, programming and time change by using the mean value and the standard deviation of the threshold voltage distribution of the flash memory after the intercell interference and the persistent interference, and renews the log-likelihood ratio by using the adjusted reference voltage, so that the L DPC error correction code of the flash memory can well ensure the reliability of the flash memory and the error correction performance of the error correction code.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic flow chart illustrating a method for error correction of a multi-level flash memory according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an error correction system for multi-level flash memory cells according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention discloses a multi-level flash memory unit error correction method, which is shown in figure 1 and comprises the following steps:
step S11: and calculating the unit threshold voltage distribution mean value of each threshold voltage window after the inter-unit interference by using the threshold voltage probability density function of the inter-unit interference.
It is understood that the flash memory is composed of a plurality of flash memory cells, each flash memory cell is composed of a transistor with a floating gate structure, the transistor can store power inside, the M L C type flash memory represents different bits according to different ranges of power (threshold voltage windows) stored by the flash memory cells, the M L C type flash memory has four threshold voltage windows respectively representing data "11", "10", "00" and "01".
Specifically, when the flash memory only has inter-cell interference, a total cell interference probability distribution formula can be obtained by using each threshold voltage distribution of an erase state and each threshold voltage distribution of a program state, wherein each threshold voltage distribution of the erase state can be represented in a distributed manner by the erase state, and each threshold voltage distribution of the program state can be represented in a distributed manner by the program state;
the erase state distribution is:
the programming state distribution is as follows:
in the formula, mueMeans, σ, representing the distribution of threshold voltages in the erased stateeStandard deviation representing the distribution of threshold voltages in the erased state, △ VPPRepresenting the unit increase voltage, x represents the voltage of each threshold voltage window,
representing the lowest threshold voltage of the kth programmed state,
representing the highest threshold voltage of the kth programmed state.
Further, calculating the total inter-cell interference probability distribution corresponding to each threshold voltage window by using the voltage of each threshold voltage window of the flash memory and a total cell interference probability distribution formula; wherein the content of the first and second substances,
the total unit interference probability distribution formula is as follows:
in the formula, Pc(x) A threshold voltage probability density function representing intercell interference,
(x) Is a dirac function, gammayIndicating the coupling ratio of word line k +1 to word line k from above.
Specifically, the process of calculating the cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference may specifically include steps S111 to S112; wherein the content of the first and second substances,
step S111: and calculating the deviation average value of the threshold voltage distribution of the flash memory after the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference.
Specifically, a threshold voltage probability density function of the inter-cell interference and the voltage of each threshold voltage window are substituted into a cell interference offset value formula, and a threshold voltage distribution offset mean value of the flash memory subjected to the inter-cell interference is calculated; wherein the content of the first and second substances,
the unit interference offset value is formulated as:
in the formula (I), the compound is shown in the specification,
is the mean shift of the threshold voltage after the threshold voltage window of state s has undergone intercell interference, where s ∈ { s }0,s1,s2,s3}＝{11,10,00,01}。
Step S112: and calculating the threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the offset mean value of the threshold voltage distribution of the flash memory after the inter-cell interference and the voltage mean value of each threshold voltage window without interference.
Specifically, after a threshold voltage deviation mean value of each threshold voltage window after the threshold voltage window is subjected to the inter-cell interference is solved, recording a non-interference threshold voltage distribution mean value of each threshold voltage window of the flash memory when the flash memory is not interfered, substituting the non-interference voltage mean value of each threshold voltage window and the threshold voltage deviation mean value of the flash memory after the inter-cell interference into an inter-cell interference threshold voltage distribution mean value formula to obtain a cell threshold voltage mean value of each threshold voltage window after the inter-cell interference; wherein the content of the first and second substances,
the mean value formula of the threshold voltage distribution of the intercell interference is as follows:
in the formula (I), the compound is shown in the specification,
the threshold voltage window representing state s is the mean of the cell threshold voltages after intercell interference,
threshold value representing state sVoltage mean without interference in the voltage window.
For example, M L C NAND flash memory has s threshold voltage windows in total, where s ∈ { s }0,s1,s2,s3The cell interference mean value formula of the specific four threshold voltage windows may be:
wherein the content of the first and second substances,
the values of the constant can be 1.40, 2.70, 3.30 and 3.90 respectively.
Step S12: calculating the mean value and standard deviation of the threshold voltage distribution of each threshold voltage window after the intercell interference and the persistent interference by using the mean value of the threshold voltage distribution of each threshold voltage window after the intercell interference;
specifically, the process of calculating the threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference and the persistent interference by using the cell threshold voltage mean value of each threshold voltage window after the inter-cell interference may specifically include steps S121 to S123; wherein the content of the first and second substances,
step S121: and calculating the threshold voltage distribution offset of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage average value of each threshold voltage window after the intercell interference.
Specifically, the threshold voltage distribution offset formula after the inter-cell interference and the persistent interference is substituted by the cell threshold voltage mean value of each threshold voltage window after the inter-cell interference, and the corresponding threshold voltage distribution offset formula after the inter-cell interference and the persistent interference of each threshold voltage window is calculated; wherein the content of the first and second substances,
the threshold voltage distribution offset mean formula is:
in the formula, murIndicating a passing endurance threshold voltage offset, s indicating a current thresholdThe state of the voltage window, wherein each preset parameter can be Ks＝0.333，x0＝1.4，At＝3.5×10-5，Bt＝2.35×10-4，ai＝0.62，ao＝0.3。
Step S122: and calculating the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the persistent interference by using the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the intercell interference and the persistent interference.
Specifically, after inter-cell interference is considered, the flash memory still suffers from the influence of persistent interference, and the reference voltage needs to be adjusted again after suffering from the persistent interference, so that the threshold voltage distribution mean value of each threshold voltage window after undergoing the inter-cell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after undergoing the inter-cell interference and the persistent interference are substituted into the voltage mean value formula after undergoing the inter-cell interference and the persistent interference, and the threshold voltage distribution mean value of each threshold voltage window after undergoing the inter-cell interference and the persistent interference is calculated; wherein the content of the first and second substances,
the voltage average formula of intercell interference and persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
the voltage mean of the threshold voltage window of state s after intercell interference and persistent interference.
Step S123: and calculating the threshold voltage distribution standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the interference-free standard deviation of each threshold voltage window, the standard deviation of threshold voltage offset distribution of the flash memory after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the persistent interference.
Specifically, a threshold voltage probability density function of the inter-cell interference and a threshold voltage offset of the flash memory after the inter-cell interference are substituted into a flash memory threshold voltage offset distribution standard deviation formula, and a standard deviation of threshold voltage offset distribution of the flash memory after the inter-cell interference is calculated; wherein the content of the first and second substances,
the standard deviation formula of the distribution of the threshold voltage offset of the flash memory is as follows:
in the formula (I), the compound is shown in the specification,
which represents the standard deviation of the threshold voltage offset distribution of the flash memory after intercell interference.
Specifically, a standard deviation of threshold voltage offset distribution of the flash memory after the flash memory is subjected to intercell interference is obtained, and then the threshold voltage distribution standard deviation of each threshold voltage window subjected to intercell interference and persistent interference is calculated by using the non-interference threshold voltage distribution standard deviation and the persistent interference offset distribution standard deviation of each threshold voltage window; wherein the content of the first and second substances,
the standard deviation of the threshold voltage distribution of each threshold voltage window passing through the intercell interference and the persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
the threshold voltage window representing state s passes the threshold voltage distribution standard deviation of intercell interference and persistent interference,
the threshold voltage distribution standard deviation of the threshold voltage window representing the state s without interference.
Step S13: calculating the deviation value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code.
Specifically, the process of calculating the offset value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window subjected to the inter-cell interference and the persistent interference may include step S131 and step S132; wherein the content of the first and second substances,
step S131: and converting the threshold voltage distribution of each threshold voltage window after the intercell interference and the persistent interference into Gaussian distribution, calculating the mean value and the standard deviation of the Gaussian distribution, and calculating the intersection point of each threshold voltage window according to the distribution.
Specifically, in order to determine the value of the reference voltage, the threshold voltage distribution of each threshold voltage window after the intercell interference and the persistent interference is ideally in gaussian distribution, and the threshold voltage distribution mean value and the standard deviation of each threshold voltage window after the intercell interference and the persistent interference are substituted into an intersection point calculation formula to calculate the intersection point of each threshold voltage window; wherein the content of the first and second substances,
the intersection calculation formula is:
wherein the content of the first and second substances,
is a Gaussian distribution with a mean value of
Standard deviation of
Step S132: and setting the hard decision reference voltage on the calculated intersection point, and calculating the deviation value of the reference voltage between the threshold voltage windows after the intercell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window.
Specifically, substituting preset initial reference voltage positions of all threshold voltage windows and intersection points of all threshold voltage windows into a reference voltage formula to calculate reference voltage offset between all threshold voltage windows; wherein the content of the first and second substances,
the reference voltage offset value is formulated as:
in the formula (I), the compound is shown in the specification,
an offset value representing a reference voltage between the nth threshold voltage window and the (n + 1) th threshold voltage window after the persistent disturbance,
indicating a location between the nth threshold voltage window and the (n + 1) th threshold voltage window where no persistent disturb hard decision reference voltage occurs,
an intersection between the nth threshold voltage window and the (n + 1) th threshold voltage window is indicated, where n is 1, 2, 3.
Therefore, the embodiment of the invention comprehensively considers the influence of the intercell interference and the persistent interference on the flash memory, and calculates the reference voltage dynamically adjusted according to the change of the erasing time, the programming time and the data retention time by using the mean value and the standard deviation of the threshold voltage distribution of the flash memory after the intercell interference and the persistent interference, so that the L DPC error correction code of the flash memory can well ensure the reliability of the flash memory and the error correction performance of the error correction code.
The embodiment of the invention discloses how to renew the log-likelihood ratio according to the error correction method of the multi-level flash memory unit, and compared with the previous embodiment, the embodiment further explains and optimizes the technical scheme.
Specifically, the method comprises the following steps:
in the embodiment of the invention, in order to further improve the accuracy of L DPC error correcting code, on the basis of the previous embodiment, the log-likelihood ratio is dynamically adjusted, specifically;
step S21: and calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-cell interference and the persistent interference.
Specifically, threshold voltage distribution of each threshold voltage window is ideally Gaussian distributed after the threshold voltage window is subjected to inter-cell interference and persistent interference, the log likelihood ratio is updated by utilizing the Gaussian distribution, each storage state s is ideally Gaussian distributed and is brought into a log likelihood ratio formula of the highest bit and the lowest bit of the flash memory; wherein
The highest order log-likelihood ratio formula is:
the lowest order log-likelihood ratio formula is:
in the formula (I), the compound is shown in the specification,
is a Gaussian distribution with a mean value of
Standard deviation of
In order to reduce the calculation complexity, the threshold voltage mean value and the standard deviation of each threshold voltage window can be used for calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory, the threshold voltage distribution mean value and the standard deviation of each threshold voltage window after the inter-cell interference and the persistent interference of each threshold voltage window are substituted into the highest bit log-likelihood ratio simplified formula and the lowest bit log-likelihood ratio simplified formula, and the log-likelihood ratio formula of the highest bit and the lowest bit of the flash memory is calculated; wherein the content of the first and second substances,
the simplified formula of the highest-order log-likelihood ratio is as follows:
the least significant bit log-likelihood ratio reduction formula comprises a least significant bit log-likelihood ratio forward reduction formula (which is used to decide that the memory state is s)0Or is1) And a least significant bit log-likelihood ratio back reduction formula (which is used to decide that the memory state is s)2Or is3) (ii) a Wherein the content of the first and second substances,
the least significant bit log-likelihood ratio front simplified formula is
The least significant log-likelihood ratio back-end simplified equation is
In the formula, LMSBRepresenting the highest bit log-likelihood ratio, LLSB1Representing the lowest order log likelihood ratio front, LLSB2Representing the lowest order log-likelihood ratio rear, yMSBIs a storage state s1And s2Reference voltage between, yLSB1Is a storage state s0And s1Reference voltage between, yLSB2Is a storage state s2And s3To the reference voltage.
Step S22: the most significant bit and least significant bit log-likelihood ratios of the flash memory are input into an error correction code.
Specifically, the highest-order and lowest-order log-likelihood ratios of the flash memory are input into an L DPC decoder, so that the flash memory performs error correction using L DPC based on the highest-order and lowest-order log-likelihood ratios of the flash memory, thereby improving the reliability of the flash memory.
The embodiment of the invention also discloses a multi-level flash memory unit error correction system, which is shown in figure 2 and comprises:
the inter-cell interference calculation module 11 is configured to calculate a cell threshold voltage distribution average value of each threshold voltage window after the inter-cell interference by using a threshold voltage probability density function of the inter-cell interference;
the persistent interference calculation module 12 is configured to calculate a threshold voltage distribution mean value and a standard deviation of each threshold voltage window after the inter-cell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference;
and a reference voltage calculation module 13, configured to calculate an offset value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window subjected to the inter-cell interference and the persistent interference, and adjust the reference voltage between the threshold voltage windows in the error correction code decoder by using the offset value of the reference voltage between the threshold voltage windows, so as to correct errors of the flash memory by using the error correction code.
Therefore, the embodiment of the invention comprehensively considers the influence of the intercell interference and the persistent interference on the flash memory, calculates the reference voltage dynamically adjusted according to the change of the erasing/programming times and the data retention time by utilizing the ideal Gaussian distribution of the threshold voltage of the flash memory after the intercell interference and the persistent interference, thereby ensuring the reliability of the flash memory and the error correction performance of the error correction code by using the L DPC error correction code.
In the embodiment of the present invention, the inter-cell interference calculation module 11 may specifically include an inter-cell interference offset mean calculation unit and an inter-cell interference offset standard calculation unit; wherein the content of the first and second substances,
the inter-cell interference offset mean value calculation unit is used for calculating the offset mean value of threshold voltage distribution of the flash memory after the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference;
and the inter-cell interference offset standard calculation unit is used for calculating the threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by utilizing the offset mean value of the threshold voltage distribution of the flash memory after the inter-cell interference and the voltage mean value of each threshold voltage window without interference.
Specifically, the persistent interference calculation module 12 may specifically include a persistent interference offset calculation unit, a persistent interference mean calculation unit, and a persistent interference standard deviation calculation unit; wherein the content of the first and second substances,
the persistent interference offset calculation unit is used for calculating threshold voltage distribution offsets of the threshold voltage windows after the threshold voltage windows are subjected to the intercell interference and the persistent interference by using the cell threshold voltage mean value of the threshold voltage windows after the intercell interference;
the persistent interference mean value calculation unit is used for calculating the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the persistent interference by utilizing the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the intercell interference and the persistent interference;
and the persistent interference standard deviation calculation unit is used for calculating the threshold voltage distribution standard deviation of each threshold voltage window after the inter-cell interference and the persistent interference by utilizing the interference-free standard deviation of each threshold voltage window, the standard deviation of threshold voltage offset distribution of the flash memory after the inter-cell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the persistent interference.
The standard deviation of threshold voltage offset distribution of the flash memory after the inter-cell interference is calculated by using a threshold voltage probability density function of the inter-cell interference and the threshold voltage offset of the flash memory after the inter-cell interference.
Specifically, the reference voltage calculation module 13 may specifically include an intersection calculation unit and a reference voltage calculation unit; wherein the content of the first and second substances,
the intersection point calculation unit is used for converting the threshold voltage distribution of each threshold voltage window after the inter-unit interference and the persistent interference into Gaussian distribution, calculating the mean value and the standard deviation of the Gaussian distribution, and calculating the intersection point of each threshold voltage window according to the distribution;
and the reference voltage calculation unit is used for setting the hard decision reference voltage on the calculated intersection points, and calculating the deviation value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection points of each threshold voltage window.
In the embodiment of the present invention, the method may further include:
the log-likelihood ratio module is used for calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory by utilizing the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-unit interference and the persistent interference; the log-likelihood ratio of the most significant bit and the least significant bit of the flash memory is input to an error correction code decoder.
The embodiment of the invention also discloses a device for correcting the error of the multi-level flash memory unit, which comprises the following components:
a memory to store instructions; the instruction comprises a unit threshold voltage distribution mean value of each threshold voltage window after the interference between the units is calculated by using a threshold voltage probability density function of the interference between the units; calculating the threshold voltage distribution mean value and standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference; calculating the deviation value of the reference voltage between the threshold voltage windows by using the threshold voltage distribution mean value and the standard deviation of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code;
a processor to execute the instructions in the memory.
For more specific instructions stored in the memory of the multi-level flash memory unit error correction device, reference may be made to corresponding contents disclosed in the foregoing embodiments, and details are not repeated herein.
Furthermore, an embodiment of the present invention further discloses a computer-readable storage medium, where a multi-level flash memory cell error correction program is stored on the computer-readable storage medium, and when the multi-level flash memory cell error correction program is executed by a processor, the steps of the multi-level flash memory cell error correction method according to the foregoing embodiment are implemented.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The present invention provides a method, a system, a device and a computer readable storage medium for error correction of multi-level flash memory cells, which are introduced in detail, wherein a specific example is applied to illustrate the principle and the implementation of the present invention, and the above description of the embodiment is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (8)
1. A method for error correction in a multi-level flash memory cell, comprising:
calculating the unit threshold voltage distribution mean value of each threshold voltage window after the inter-unit interference by using the threshold voltage probability density function of the inter-unit interference;
calculating the threshold voltage distribution mean value and standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference;
calculating the deviation value of the reference voltage between the threshold voltage windows by using the threshold voltage distribution mean value and the standard deviation of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code;
the process of calculating the threshold voltage distribution mean value and the standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference includes:
substituting the cell threshold voltage mean value of each threshold voltage window after the intercell interference into the threshold voltage distribution offset formula after the intercell interference and the persistent interference, and calculating the corresponding threshold voltage distribution offset formula of each threshold voltage window after the intercell interference and the persistent interference; wherein the content of the first and second substances,
the threshold voltage distribution offset mean formula is:
in the formula, murRepresenting the amount of the passing of the endurance threshold voltage offset, s representing the state of the current threshold voltage window, wherein each preset parameter is Ks＝0.333，x0＝1.4，At＝3.5×10-5，Bt＝2.35×10-4，ai＝0.62，ao＝0.3；
Substituting the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the intercell interference and the persistent interference into the voltage mean value formula after the intercell interference and the persistent interference to calculate the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the persistent interference; wherein the content of the first and second substances,
the voltage average formula of intercell interference and persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
representing the voltage mean value of a threshold voltage window with the state of s after intercell interference and persistent interference;
calculating the threshold voltage distribution standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the interference-free standard deviation of each threshold voltage window, the standard deviation of threshold voltage offset distribution of the flash memory after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the persistent interference;
substituting a threshold voltage probability density function of the inter-cell interference and threshold voltage offset of the flash memory subjected to the inter-cell interference into a flash memory threshold voltage offset distribution standard deviation formula, and calculating to obtain a standard deviation of threshold voltage offset distribution of the flash memory subjected to the inter-cell interference; wherein the content of the first and second substances,
the standard deviation formula of the distribution of the threshold voltage offset of the flash memory is as follows:
in the formula (I), the compound is shown in the specification,
the standard deviation of threshold voltage offset distribution after the flash memory is subjected to intercell interference is represented;
the standard deviation of the threshold voltage distribution of each threshold voltage window passing through the intercell interference and the persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
the threshold voltage window representing state s passes the threshold voltage distribution standard deviation of intercell interference and persistent interference,
a threshold voltage distribution standard deviation of a threshold voltage window representing a state s under a non-interference condition;
the process of calculating the deviation value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window subjected to the intercell interference and the persistent interference includes:
converting the threshold voltage distribution of each threshold voltage window after the intercell interference and the persistent interference into Gaussian distribution, calculating the mean value and the standard deviation of the Gaussian distribution, and calculating the intersection point of each threshold voltage window according to the distribution;
setting the hard decision reference voltage on the calculated intersection point, and calculating the deviation value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window;
wherein, the process of calculating the deviation value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window comprises:
substituting preset initial reference voltage positions of all threshold voltage windows and intersection points of all threshold voltage windows into a reference voltage formula to calculate reference voltage offset between all threshold voltage windows; wherein the content of the first and second substances,
the reference voltage offset value is formulated as:
in the formula (I), the compound is shown in the specification,
indicating the nth threshold voltage after the endurance disturbanceThe offset value of the reference voltage between the window and the (n + 1) th threshold voltage window,
indicating a location between the nth threshold voltage window and the (n + 1) th threshold voltage window where no persistent disturb hard decision reference voltage occurs,
an intersection between the nth threshold voltage window and the (n + 1) th threshold voltage window is indicated, where n is 1, 2, 3.
2. The method of claim 1, wherein the calculating the mean distribution of threshold voltages of cells after the threshold voltage windows have undergone intercell interference by using the threshold voltage probability density function of intercell interference comprises:
calculating the offset mean value of threshold voltage distribution of the flash memory after the flash memory is subjected to the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference;
and calculating the threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the offset mean value of the threshold voltage distribution of the flash memory after the inter-cell interference and the voltage mean value of each threshold voltage window without interference.
3. The method of claim 1, wherein the standard deviation of the threshold voltage offset distribution of the flash memory after the inter-cell interference is calculated by using a threshold voltage probability density function of the inter-cell interference and a threshold voltage offset of the flash memory after the inter-cell interference.
4. The method of any of claims 1 to 3, wherein before the error correction of the flash memory by the error correction code, the method further comprises:
calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-cell interference and the persistent interference;
and inputting the log-likelihood ratio of the highest bit and the lowest bit of the flash memory into the error correcting code decoder.
5. A multi-level flash memory cell error correction system, comprising:
the inter-cell interference calculation module is used for calculating the cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference by using the threshold voltage probability density function of the inter-cell interference;
the persistent interference calculation module is used for calculating the threshold voltage distribution mean value and the standard deviation of each threshold voltage window after the inter-cell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the inter-cell interference;
the reference voltage calculation module is used for calculating the deviation value of the reference voltage between the threshold voltage windows by utilizing the threshold voltage distribution mean value and the standard deviation of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in the error correction code decoder by utilizing the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by utilizing the error correction code;
the persistent interference calculation module specifically comprises a persistent interference offset calculation unit, a persistent interference mean calculation unit and a persistent interference standard deviation calculation unit; wherein the content of the first and second substances,
the persistent interference offset calculation unit is used for substituting the cell threshold voltage mean value of each threshold voltage window after the intercell interference into the threshold voltage distribution offset formula after the intercell interference and the persistent interference so as to calculate the corresponding threshold voltage distribution offset formula of each threshold voltage window after the intercell interference and the persistent interference; wherein the content of the first and second substances,
the threshold voltage distribution offset mean formula is:
in the formula, murRepresenting the amount of the passing of the endurance threshold voltage offset, s representing the state of the current threshold voltage window, wherein each preset parameter is Ks＝0.333，x0＝1.4，At＝3.5×10-5，Bt＝2.35×10-4，ai＝0.62，ao＝0.3；
The persistent interference mean value calculation unit is used for substituting a voltage mean value formula after the intercell interference and the persistent interference into a threshold voltage mean value distribution mean value after the intercell interference and the persistent interference of each threshold voltage window by utilizing the threshold voltage distribution mean value after the intercell interference of each threshold voltage window and the corresponding threshold voltage distribution offset after the intercell interference and the persistent interference of each threshold voltage window, and calculating the threshold voltage distribution mean value after the intercell interference and the persistent interference of each threshold voltage window; wherein the content of the first and second substances,
the voltage average formula of intercell interference and persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
representing the voltage mean value of a threshold voltage window with the state of s after intercell interference and persistent interference;
the persistent interference standard deviation calculation unit is used for calculating the threshold voltage distribution standard deviation of each threshold voltage window after the inter-cell interference and the persistent interference by utilizing the non-interference standard deviation of each threshold voltage window, the standard deviation of threshold voltage offset distribution of the flash memory after the inter-cell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the persistent interference;
the standard deviation of threshold voltage offset distribution of the flash memory after the inter-cell interference is calculated by utilizing a threshold voltage probability density function of the inter-cell interference and the threshold voltage offset of the flash memory after the inter-cell interference;
substituting a threshold voltage probability density function of the inter-cell interference and threshold voltage offset of the flash memory subjected to the inter-cell interference into a flash memory threshold voltage offset distribution standard deviation formula, and calculating to obtain a standard deviation of threshold voltage offset distribution of the flash memory subjected to the inter-cell interference; wherein the content of the first and second substances,
the standard deviation formula of the distribution of the threshold voltage offset of the flash memory is as follows:
in the formula (I), the compound is shown in the specification,
the standard deviation of threshold voltage offset distribution after the flash memory is subjected to intercell interference is represented;
the standard deviation of the threshold voltage distribution of each threshold voltage window passing through the intercell interference and the persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
the threshold voltage window representing state s passes the threshold voltage distribution standard deviation of intercell interference and persistent interference,
a threshold voltage distribution standard deviation of a threshold voltage window representing a state s under a non-interference condition;
the reference voltage calculation module specifically comprises an intersection point calculation unit and a reference voltage calculation unit; wherein the content of the first and second substances,
the intersection point calculation unit is used for converting the threshold voltage distribution of each threshold voltage window after the inter-unit interference and the persistent interference into Gaussian distribution, calculating the mean value and the standard deviation of the Gaussian distribution, and calculating the intersection point of each threshold voltage window according to the distribution;
a reference voltage calculation unit for setting a hard decision reference voltage at the calculated intersection point, and calculating an offset value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window;
wherein, the process of calculating the deviation value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window comprises:
substituting preset initial reference voltage positions of all threshold voltage windows and intersection points of all threshold voltage windows into a reference voltage formula to calculate reference voltage offset between all threshold voltage windows; wherein the content of the first and second substances,
the reference voltage offset value is formulated as:
in the formula (I), the compound is shown in the specification,
an offset value representing a reference voltage between the nth threshold voltage window and the (n + 1) th threshold voltage window after the persistent disturbance,
indicating a location between the nth threshold voltage window and the (n + 1) th threshold voltage window where no persistent disturb hard decision reference voltage occurs,
an intersection between the nth threshold voltage window and the (n + 1) th threshold voltage window is indicated, where n is 1, 2, 3.
6. The multi-level flash cell error correction system of claim 5, further comprising:
and the log-likelihood ratio module is used for calculating the log-likelihood ratio of the highest bit and the lowest bit of the flash memory by utilizing the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window after the inter-unit interference and the persistent interference, and inputting the log-likelihood ratio of the highest bit and the lowest bit of the flash memory into the error correcting code decoder.
7. An apparatus for error correction in a multi-level flash memory cell, comprising:
a memory to store instructions; calculating a unit threshold voltage distribution mean value of each threshold voltage window after the inter-unit interference by using a threshold voltage probability density function of the inter-unit interference; calculating the threshold voltage distribution mean value and standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference; calculating the deviation value of the reference voltage between the threshold voltage windows by using the threshold voltage distribution mean value and the standard deviation of the threshold voltage windows subjected to the intercell interference and the persistent interference, and adjusting the reference voltage between the threshold voltage windows in an error correction code decoder by using the deviation value of the reference voltage between the threshold voltage windows so as to correct the error of the flash memory by using the error correction code;
the process of calculating the threshold voltage distribution mean value and the standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the cell threshold voltage distribution mean value of each threshold voltage window after the intercell interference includes:
substituting the cell threshold voltage mean value of each threshold voltage window after the intercell interference into the threshold voltage distribution offset formula after the intercell interference and the persistent interference, and calculating the corresponding threshold voltage distribution offset formula of each threshold voltage window after the intercell interference and the persistent interference; wherein the content of the first and second substances,
the threshold voltage distribution offset mean formula is:
in the formula, murRepresenting the amount of the passing of the endurance threshold voltage offset, s representing the state of the current threshold voltage window, wherein each preset parameter is Ks＝0.333，x0＝1.4，At＝3.5×10-5，Bt＝2.35×10-4，ai＝0.62，ao＝0.3；
Substituting the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the intercell interference and the persistent interference into the voltage mean value formula after the intercell interference and the persistent interference to calculate the threshold voltage distribution mean value of each threshold voltage window after the intercell interference and the persistent interference; wherein the content of the first and second substances,
the voltage average formula of intercell interference and persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
representing the voltage mean value of a threshold voltage window with the state of s after intercell interference and persistent interference;
calculating the threshold voltage distribution standard deviation of each threshold voltage window after the intercell interference and the persistent interference by using the interference-free standard deviation of each threshold voltage window, the standard deviation of threshold voltage offset distribution of the flash memory after the intercell interference and the corresponding threshold voltage distribution offset of each threshold voltage window after the persistent interference;
substituting a threshold voltage probability density function of the inter-cell interference and threshold voltage offset of the flash memory subjected to the inter-cell interference into a flash memory threshold voltage offset distribution standard deviation formula, and calculating to obtain a standard deviation of threshold voltage offset distribution of the flash memory subjected to the inter-cell interference; wherein the content of the first and second substances,
the standard deviation formula of the distribution of the threshold voltage offset of the flash memory is as follows:
in the formula (I), the compound is shown in the specification,
indicating threshold of flash memory after inter-cell interferenceStandard deviation of the value voltage offset distribution;
the standard deviation of the threshold voltage distribution of each threshold voltage window passing through the intercell interference and the persistent interference is as follows:
in the formula (I), the compound is shown in the specification,
the threshold voltage window representing state s passes the threshold voltage distribution standard deviation of intercell interference and persistent interference,
a threshold voltage distribution standard deviation of a threshold voltage window representing a state s under a non-interference condition;
the process of calculating the deviation value of the reference voltage between the threshold voltage windows by using the mean value and the standard deviation of the threshold voltage distribution of each threshold voltage window subjected to the intercell interference and the persistent interference includes:
converting the threshold voltage distribution of each threshold voltage window after the intercell interference and the persistent interference into Gaussian distribution, calculating the mean value and the standard deviation of the Gaussian distribution, and calculating the intersection point of each threshold voltage window according to the distribution;
setting the hard decision reference voltage on the calculated intersection point, and calculating the deviation value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window;
wherein, the process of calculating the deviation value of the reference voltage between the threshold voltage windows after the inter-cell interference and the persistent interference by using the initial reference voltage position of each threshold voltage window and the intersection point of each threshold voltage window comprises:
substituting preset initial reference voltage positions of all threshold voltage windows and intersection points of all threshold voltage windows into a reference voltage formula to calculate reference voltage offset between all threshold voltage windows; wherein the content of the first and second substances,
the reference voltage offset value is formulated as:
in the formula (I), the compound is shown in the specification,
an offset value representing a reference voltage between the nth threshold voltage window and the (n + 1) th threshold voltage window after the persistent disturbance,
indicating a location between the nth threshold voltage window and the (n + 1) th threshold voltage window where no persistent disturb hard decision reference voltage occurs,
represents the intersection between the nth threshold voltage window and the (n + 1) th threshold voltage window, where n is 1, 2, 3;
a processor to execute the instructions in the memory.
8. A computer readable storage medium having stored thereon a multi-level flash cell error correction program, which when executed by a processor implements the steps of the multi-level flash cell error correction method of any of claims 1-4.
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