CN107845361B - Sub-pixel driving circuit and global display method - Google Patents
Sub-pixel driving circuit and global display method Download PDFInfo
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- CN107845361B CN107845361B CN201711305274.1A CN201711305274A CN107845361B CN 107845361 B CN107845361 B CN 107845361B CN 201711305274 A CN201711305274 A CN 201711305274A CN 107845361 B CN107845361 B CN 107845361B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
Abstract
The application discloses a sub-pixel driving circuit and a global display method, which convert gray values into analog voltages to be loaded to a sub-pixel unit through progressive scanning or interlaced scanning, adopt a first capacitor and a second capacitor for scanning voltage and driving display respectively, and perform global display after scanning an image frame, realize global display by utilizing the linear relation between the sub-pixel voltage and the gray scale value corresponding to the sub-pixel, meanwhile, before driving the sub-pixel, the threshold voltage of a driving tube is required to be grasped, and the threshold voltage is eliminated for the operation in a saturation region, thereby achieving the purpose of compensation and enabling the image display to be clearer.
Description
Technical Field
The present application relates to a driving circuit and a display method, and more particularly, to a sub-pixel driving circuit and a global display method.
Background
The existing display device mainly comprises: OLED/LED display device, QLED display device, micro-OLED/LED display device, etc. are several, and it comprises pixel array, and each pixel contains a plurality of sub-pixels, and common are RGB system and RGBW system. In the RGB system, each pixel comprises a red sub-pixel, a green sub-pixel and a blue sub-pixel; in the RGBW system, each pixel includes one red subpixel, one green subpixel, one blue subpixel, and one white subpixel. The brightness of each sub-pixel of the pixel unit is effectively controlled, and the color required to be displayed is realized.
Typical OLED/LED sub-pixel unit driving circuits perform image display by scanning one line and lighting one line. The brightness of the OLED/LED is in a certain relation with the magnitude of the current loaded at two ends of the OLED/LED, and the display of different brightness is realized by controlling the magnitude of the current flowing through the OLED/LED.
The relation between the analog voltage value obtained by DAC conversion and gray scale is shown in figure 1. The gate driving control module selects a certain row of the pixel array, obtains an analog voltage Vdt from video data through the DAC module, loads the analog voltage Vdt into the energy storage first capacitor C1 of the sub-pixel unit driving circuit in FIG. 2, and lights the row. And displaying a complete image after all lines are scanned. The progressive scanning or interlacing and lighting display control method ensures that the lighting time of each pixel is one frame, but when the pixel array corresponding to the unloaded data in the frame still maintains the data of the previous frame during scanning to a certain line of the previous frame, the phenomenon that a part of the whole image is a data image of the present frame and a part of the whole image is a data image of the previous frame is not expected to be seen.
Disclosure of Invention
In order to solve the problems existing in the prior art display device, a first object of the present application is to provide a sub-pixel driving circuit for driving specific sub-pixels in a pixel unit to illuminate in a display device, which has a two-stage storage function, separates the scanning process of an image to be displayed and the driving sub-pixel display process of the display device independently, and has a compensation function, so as to avoid the phenomenon that a part of a whole image is a data image of a current frame and a part of the whole image is a data image of a previous frame.
A second object of the present application is to provide a method for realizing a global display by using an analog voltage stored in a subpixel driving circuit to linearly relate to a gray scale value corresponding to the subpixel. The method realizes global display and effectively solves the problems existing in the prior display equipment in the background technology.
To achieve the first object of the present application, a subpixel driving circuit is provided herein as an active driving, comprising:
the first switch is used for introducing analog voltages corresponding to sub-pixel gray values in an image to be displayed into the circuit;
a first capacitor for storing the analog voltage introduced by the first switch and charging the second capacitor by the stored analog voltage;
the second capacitor is used for storing the analog voltage on the first capacitor;
and a third capacitor: for partial pressure;
the second switch is used for connecting and disconnecting the first capacitor and the second capacitor, and the first capacitor and the driving tube; the analog voltage stored on the first capacitor charges the second capacitor through the second switch, and the second capacitor drives the driving tube;
a driving tube for driving the sub-pixel display;
the third switch is used for releasing the residual analog voltage on the second capacitor; the first switch, the second switch and the third switch are all set to be PMOS tubes, NMOS tubes or transmission gates.
The first capacitor and the second capacitor in the sub-pixel driving circuit can store (charge) effective data of an image to be displayed (video data of the image to be displayed, which is obtained through scanning, and gamma voltage formed after gamma conversion), and can release (discharge) the effective data to drive the driving tube to start so as to drive the sub-pixel connected with the driving tube to display. The image can be displayed by matching with an image scanning circuit for scanning the gray value of each sub-pixel in the image to be displayed. By driving each sub-pixel in the display device by using the sub-pixel driving circuit, the problems in the existing display can be effectively solved. In addition, redundant data (voltage) of the second capacitor can be released (discharged) through designing the second switch, so that the data of the last sub-pixel is prevented from being remained on the second capacitor, the driving signal output by the driving circuit provided by the application is more accurate, and the problems in the existing display can be completely solved. In addition, in order to make the displayed image clearer, the circuit adds a third capacitor connected in series with the second capacitor to realize voltage division compensation.
Further, the circuit also comprises a fourth switch structure for switching off and switching on the power supply of the circuit.
Further, a fifth switch for releasing the residual voltage is also included, and the fifth switch plays a role of stabilizing the voltage between the driving tube and the sub-pixel.
Further, the first capacitor and the second capacitor have the same charging characteristics. The correctness of the loaded data is ensured, and the sufficient charge and discharge time is ensured.
In order to achieve the second object of the present application, a global display method is provided herein, wherein the method uses an analog voltage stored in a sub-pixel driving circuit to form a linear relationship with a gray scale value corresponding to the sub-pixel to realize single sub-pixel display, and the sub-pixel driving circuit drives a sub-pixel corresponding to a sub-pixel of an image to be displayed in a display device to display, so as to form global display; the adopted sub-pixel driving circuit is any one of the sub-pixel driving circuits provided by the application; the method comprises the following specific steps:
step 1: the control unit obtains the gray value of each sub-pixel in the image to be displayed by carrying out progressive or interlaced scanning on the image or video to be displayed by scanning voltage; converting the acquired gray value into corresponding analog voltage, temporarily closing the first switch in one frame of effective data, and storing the scanned analog voltage in the first switch;
step 2: the redundant electric quantity is released, the first switch is disconnected after the first capacitor is charged, the third switch is controlled by the Clr signal to release the redundant electric quantity on the second capacitor, and the accuracy of the voltage loaded to the driving circuit of each sub-pixel unit is ensured;
step 3: compensating;
step 4: after the electric quantity of the second capacitor is released, the second switch is closed, the first capacitor charges the second capacitor, the driving tube is driven to drive the sub-pixels to display, a complete and correct image is displayed, and when the first capacitor charges the second capacitor, the second switch is opened to prepare for the next frame of display;
step 5: continuously cycling the steps 1 to 4.
According to the method, gray values of all sub-pixels in an image to be displayed are stored successively, after all the gray values of all the sub-pixels in the image to be displayed are in an analog voltage form, the analog voltage of the last sub-pixel remained in a sub-pixel driving circuit is released, the corresponding sub-pixel is driven to display, and the circuit is compensated in the voltage releasing process, so that the problems existing in the traditional display method are solved.
Specifically, the specific compensation method in the step 3 is as follows:
SA1: releasing the voltage, and releasing the voltage at the node where the second capacitor, the third capacitor and the driving tube intersect when the voltage is low;
SA2: and when the voltage is input and high, inputting the voltage to the crossing nodes of the second capacitor, the third capacitor and the driving tube, and grabbing the threshold voltage of the driving tube.
Specifically, the specific compensation method in the step 3 is as follows:
SA1: when the voltage is high, the voltage is input to the node where the second capacitor, the third capacitor and the driving tube intersect; SA2: and releasing voltage, namely releasing the voltage at the crossing node of the second capacitor, the third capacitor and the driving tube, and grabbing the threshold voltage of the driving tube.
The sub-pixel driving circuit and the global display method provided by the application have the beneficial effects that: the driving circuit has simple structure and simple display method, and solves the problem that one whole image in the traditional display method has a part of data images of the frame and a part of data images of the previous frame. The threshold voltage of the driving tube is grabbed in the display process, and after the grabbing, the threshold voltage of the driving tube is eliminated in the saturation region of the driving tube, so that the purpose of compensation is achieved, the image display is facilitated, and the image display is clearer.
Drawings
FIG. 1 is a graph of analog voltage versus subpixel gray scale;
FIG. 2 is a schematic diagram of a conventional OLED/LED pixel cell driving circuit;
FIG. 3 is a schematic diagram of a first sub-pixel driving circuit with compensation according to the present application;
FIG. 4 is a timing diagram of a first sub-pixel driving circuit;
FIG. 5 is another timing diagram of the first sub-pixel driving circuit;
FIG. 6 is a schematic diagram of a second sub-pixel driving circuit with compensation according to the present application;
FIG. 7 is a timing diagram of a second sub-pixel driving circuit;
FIG. 8 is a schematic diagram of a third sub-pixel driving circuit with compensation according to the present application;
FIG. 9 is a timing diagram of a third sub-pixel driving circuit;
FIG. 10 is a schematic diagram of a fourth sub-pixel driving circuit with compensation according to the present application;
FIG. 11 is a timing diagram of a fourth sub-pixel driving circuit;
FIG. 12 is a graph of the charge-discharge characteristics of a capacitor;
FIG. 13 is a diagram of control signals for a sub-pixel driving circuit according to the present application;
fig. 14 shows the global display principle according to the present application.
Detailed Description
All the claimed aspects of the application are further described herein with reference to the accompanying drawings and specific drive circuit configurations.
The application discloses a sub-pixel driving circuit, which comprises:
the first switch S1 is used for introducing analog voltage corresponding to the sub-pixel gray value in the image to be displayed into the circuit;
a first capacitor C1 for storing the analog voltage introduced by the first switch S1, and charging and driving the driving tube M1 to the second capacitor C2 by the stored analog voltage;
a second capacitor C2 for storing the analog voltage on the first capacitor C1;
third capacitor C3: for partial pressure;
the second switch S2 is used for communicating the first capacitor C1 and the second capacitor C2, and the first capacitor C1 and the driving tube M1, and the analog voltage stored on the first capacitor C1 charges the second capacitor C2 through the second switch S2 and the second capacitor C2 drives the driving tube M1;
a driving tube M1 for driving the sub-pixel display;
and a third switch S3 for releasing the residual analog voltage on the second capacitor C2.
The first switch S1, the second switch S2, and the third switch S3 are all set as PMOS transistors, NMOS transistors, or transmission gates.
In addition, the circuit further comprises a fourth switch S4 for switching off and switching on a circuit power supply and/or a fifth switch S5 for stabilizing the voltage between the driving tube M1 and the sub-pixels, wherein the fourth switch S4 and the fifth switch S5 are respectively arranged as a PMOS tube, an NMOS tube or a transmission gate.
The circuit meeting the functions is the technical scheme required by the application, and the application provides specific structures of several driving circuits, wherein the circuit structures are as follows:
the first driving circuit includes a first switch S1, a second switch S2, a third switch S3, a first capacitor C1, a second capacitor C2, a driving tube M1, and a third capacitor C3, and a schematic circuit diagram thereof is shown in fig. 3. One end of the first switch S1 is used as an input end of an effective data analog voltage Vdt (analog voltage signal after gamma conversion) for receiving an analog voltage corresponding to a sub-pixel gray value; the other end is connected to one end of the first capacitor C1 and one end of the second switch S2. The other end of the first capacitor C1 is connected with a reference voltage Vref of the circuit, the other end of the second switch S2 is connected to the reference voltage Vref through a third switch S3, and is connected to the reference voltage Vref, the working voltage Vdd or the common ground Vss through the second capacitor C2 and the third capacitor C3 in sequence, and is connected to the grid electrode of the driving tube M1; the power supply terminal of the driving tube M1 is connected to the operating voltage Vdd, and the other end is used as an output terminal of the entire driving circuit for connecting the sub-pixels (light emitting devices: LEDs or OLEDs).
The circuit structure is matched with a sub-pixel scanning circuit (used for scanning the gray value of each sub-pixel in an image to be displayed) and a digital-to-analog converter (used for converting the gray value of the sub-pixel into analog voltage which is convenient to store in a sub-pixel driving circuit), so that a specific sub-pixel can be driven to display the gray value corresponding to the sub-pixel driving circuit, and display is realized.
The working modes of the circuit structure are two, and the working processes are as follows:
the control sequence of the first mode of operation is shown in fig. 4, and the control signal is shown in fig. 13. When the analog voltage is input into the circuit after being converted by the digital-to-analog converter, the first switch S1 is closed, the analog voltage which is linearly proportional to the gray value of the sub-pixel is stored in the first capacitor C1, and when each sub-pixel driving circuit receives the gray value of the sub-pixel to be displayed, the first switch S1 is opened; after the gray values of all the sub-pixels in the display image are stored in the driving circuits of all the sub-pixels in analog voltage, starting the third switch S3 to release the residual voltage in the second capacitor C2, and pulling down the working voltage Vdd in the process of releasing the residual voltage by the second capacitor C2, loading the Vdd voltage at the point O of the intersection point where the second capacitor C2 and the third capacitor C3 are connected at the moment, recovering the working voltage Vdd to high voltage after the whole process lasts for T1 time, and charging the intersection point of the first capacitor C1 and the second capacitor C2 for T2 time through Vdd (grabbing the threshold voltage Vth of the driving tube in the charging process); in the period T3, the second switch S2 is closed, the voltage stored in the first capacitor C1 charges the second capacitor C2 through the second switch S2 (i.e. the effective gray value stored in the first capacitor C1 is transferred to the second capacitor C2) and drives all the sub-pixel units to display a complete and correct image. And after C1 charges C2, turning off the second switch S2 to prepare for the display of the next frame. In the period T4, the driving tube M1 is started to drive the sub-pixel (light emitting device: LED or OLED) connected to the output end of the driving tube M1 to emit light for display.
The control sequence of the second mode of operation is shown in FIG. 5, and the control signal is shown in FIG. 13. This mode of operation is substantially the same as the first mode of operation, with the difference that: when the working voltage Vdd is low in the period T3, the second switch S2 is closed, so that the voltage stored in the first capacitor C1 is transferred to the second capacitor C2, and after the data transfer is completed, the working voltage Vdd is recovered to high voltage in the period T4, and the driving tube M1 drives the sub-pixel to display.
As shown in fig. 6, the second driving circuit includes a first switch S1, a second switch S2, a third switch S3, a first capacitor C1, a second capacitor C2, a driving tube M1, a third capacitor C3, and a fourth switch S4, and the circuit schematic diagram thereof is shown in fig. 5. One end of the first switch S1 is used as an input end of an effective data analog voltage Vdt (analog voltage signal after gamma conversion) for receiving an analog voltage corresponding to a sub-pixel gray value; the other end is connected to one end of the first capacitor C1 and one end of the second switch S2. The other end of the first capacitor C1 is connected with a reference voltage Vref of the circuit, the other end of the second switch S2 is connected to the reference voltage Vref through a third switch S3 respectively, and is connected to the reference voltage Vref, the working voltage Vdd or the common ground Vss through the second capacitor C2 and the third capacitor C3 in sequence, and one end of the second switch S2 is also connected to the grid electrode of the driving tube M1; the power supply terminal of the driving tube M1 is connected to the operating voltage Vdd through the fourth switch S4, and the other terminal is used as an output terminal of the entire driving circuit for connecting the sub-pixels (light emitting devices: LEDs or OLEDs).
The control timing of the circuit is shown in fig. 7, and the control signals are shown in fig. 13. When an analog voltage input circuit converted by the digital-to-analog converter exists, a first switch S1 is closed, analog voltage which is linearly proportional to the gray value of the sub-pixel is stored in a first capacitor C1, and when each sub-pixel driving circuit receives the gray value of the sub-pixel to be displayed, the first switch S1 is opened; after the gray values of all the sub-pixels in the display image are stored in the driving circuits of all the sub-pixels in analog voltage, starting the third switch S3 to release the residual voltage in the second capacitor C2, and pulling down the working voltage Vdd in the process of releasing the residual voltage by the second capacitor C2, loading the Vdd voltage at the point 0 of the intersection point where the second capacitor C2 and the third capacitor C3 are connected at the moment, recovering the working voltage Vdd to high voltage after the whole process lasts for T1 time, and charging the working voltage Vdd to the point 0 for T2 time (grabbing the valve voltage of the driving tube M1 in the charging process); in the period of T3, the Em signal opens the fourth switch S4 and closes the second switch S2; the voltage stored in the first capacitor C1 charges the second capacitor C2 through the second switch S2 (i.e. transfers the effective gray value stored in the first capacitor C1 to the second capacitor C2) and drives all the sub-pixel units to display a complete and correct image. And after C1 charges C2, turning off the second switch S2 to prepare for the display of the next frame. After the charging is completed, the Em signal controls to close the fourth switch S4, the voltage on the second capacitor C2 is input into the driving tube M1, and the driving tube M1 is started, so that the sub-pixel (light emitting device: LED or OLED) connected to the output end of the driving tube M1 is driven to emit light for display in the time of T4.
As shown in fig. 8, the third driving circuit includes a first switch S1, a second switch S2, a third switch S3, a first capacitor C1, a second capacitor C2, a driving tube M1, a third capacitor C3, a fourth switch S4, and a fifth switch S5, and the schematic circuit diagram thereof is shown in fig. 7. One end of the first switch S1 is used as an input end of an effective data analog voltage Vdt (analog voltage signal after gamma conversion) for receiving an analog voltage corresponding to a sub-pixel gray value; the other end is connected to one end of the first capacitor C1 and one end of the second switch S2. The other end of the first capacitor C1 is connected with a reference voltage Vref of the circuit, the other end of the second switch S2 is connected to the reference voltage Vref through a third switch S3, and the other end of the second switch S2 is connected to the reference voltage Vref, the working voltage Vdd or the common ground Vss through the second capacitor C2 and the third capacitor C3 in sequence and connected to the grid electrode of the driving tube M1; the power supply terminal of the driving tube M1 is connected to the working voltage Vdd through a fourth switch S4, the other end is used as the output terminal of the whole driving circuit for connecting sub-pixels (light emitting devices: LEDs or OLEDs), and a fifth switch S5 is connected between the output terminal of the driving tube M1 and the reference voltage Vref.
The control timing of the circuit is shown in fig. 9, and the control signals are shown in fig. 13. When an analog voltage input circuit converted by the digital-to-analog converter exists, a first switch S1 is closed, analog voltage which is linearly proportional to the gray value of the sub-pixel is stored in a first capacitor C1, and when each sub-pixel driving circuit receives the gray value of the sub-pixel to be displayed, the first switch S1 is opened; after the gray values of all the sub-pixels in the display image are stored in the driving circuit of each sub-pixel in analog voltage, starting the third switch S3 to release residual voltage in the second capacitor C2, closing the fourth switch S4 in the process of releasing the residual voltage by the second capacitor C2, loading Vdd voltage at the intersection point A of the second capacitor C2, the third capacitor C3 and the fourth switch S4, after the time of T1, opening the fourth switch S4, closing the fifth switch S5, discharging to the reference voltage through the point A, and grabbing the threshold voltage Vth of the driving tube M1 for the time of T2; in the period T3, em opens the fourth switch S4, isolates Vdd, closes the second switch S2, charges the second capacitor C2 through the second switch S2 (i.e., transfers the effective gray value stored in the first capacitor C1 to the second capacitor C2) and drives all the sub-pixel units to display a complete and correct image. And after C1 charges C2, turning off the second switch S2 to prepare for the display of the next frame. The Em signal controls the fourth switch S4 to be closed, the voltage on the second capacitor C2 is input into the driving tube M1, and the driving tube M1 is started to drive the sub-pixel (light emitting device: LED or OLED) connected to the output end of the driving tube M1 to emit light for displaying in the time of T4.
As shown in fig. 10, the fourth driving circuit includes a first switch S1, a second switch S2, a third switch S3, a first capacitor C1, a second capacitor C2, a driving tube M1, a third capacitor C3, and a fourth switch S4, and the circuit schematic diagram thereof is shown in fig. 9. One end of the first switch S1 is used as an input end of an effective data analog voltage Vdt (analog voltage signal after gamma conversion) for receiving an analog voltage corresponding to a sub-pixel gray value; the other end is connected to one end of the first capacitor C1 and one end of the second switch S2. The other end of the first capacitor C1 is connected with a reference voltage Vref of the circuit, the other end of the second switch S2 is connected to the reference voltage Vref through a third switch S3, and the other end of the second switch S2 is connected to the reference voltage Vref, the working voltage Vdd or the common ground Vss through the second capacitor C2 and the third capacitor C3 in sequence and connected to the grid electrode of the driving tube M1; the power supply terminal of the driving tube M1 is connected to the operating voltage Vdd through the fourth switch S4, and the other terminal is used as an output terminal of the entire driving circuit for connecting the sub-pixels (light emitting devices: LEDs or OLEDs).
The control timing of the circuit is shown in FIG. 11, and the control signals are shown in FIG. 13. When an analog voltage input circuit converted by the digital-to-analog converter exists, a first switch S1 is closed, analog voltage which is linearly proportional to the gray value of the sub-pixel is stored in a first capacitor C1, and when each sub-pixel driving circuit receives the gray value of the sub-pixel to be displayed, the first switch S1 is opened; after the gray values of all the sub-pixels in the display image are stored in the driving circuit of each sub-pixel in the analog voltage, starting the third switch S3 to release the residual voltage in the second capacitor C2, closing the fourth switch S4 in the process of releasing the residual voltage by the second capacitor C2, loading the Vdd voltage at the intersection point A of the second capacitor C2, the third capacitor C3 and the fourth switch S4, after the time of T1, opening the fourth switch S4, discharging to the power ground Vref through the point A, and grabbing the threshold voltage Vth of the driving tube M1 for the time of T2. In the period T3, the second switch S2 is closed, the voltage stored in the first capacitor C1 charges the second capacitor C2 through the second switch S2 (i.e. the effective gray value stored in the first capacitor C1 is transferred to the second capacitor C2) and drives all the sub-pixel units to display a complete and correct image. After the charging is completed in the time of T3, the Em signal controls to close the fourth switch S4, the voltage on the second capacitor C2 is input into the driving tube M1, and the driving tube M1 is started to drive the sub-pixel (light emitting device: LED or OLED) connected to the output end of the driving tube M1 to emit light for display in the time of T4.
In the four circuit structures, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4 and the fifth switch S5 are all arranged as PMOS tubes, NMOS tubes or transmission gates; the gates of the first switch S1, the second switch S2, the third switch S3, the fourth switch S4 and the fifth switch S5 are respectively communicated with a control signal N, a GS, an ini, an Em and a C, the control signals of the first switch S1, the second switch S2, the third switch S3, the fourth switch S4 and the fifth switch S5 are respectively an N, a GS, an ini, an Em and a C, and the on and off of the switches can be controlled by the signals, wherein the reference voltages Vref, the C and the ini are all generated by the DC part of the external IC, the GS and Em signals are generated by an external circuit, and the GS and Em signals are the same signals or the pulse width of the GS signal is smaller than that of the Em signal. The specific timings of the signals are shown in fig. 4, 5, 7, 9 and 11.
The driving tube M1 may be a PMOS tube or an NMOS tube.
The first capacitor C1 and the second capacitor C2 described in the present application may be capacitors having the same characteristics or capacitors having different characteristics. The time for charging the first capacitor C1 to the second capacitor C2 is determined by the charging characteristics of the two capacitors. As shown in fig. 12, the charge-discharge characteristic of the capacitor is that the time Δt between charging from 0 to a certain voltage or discharging from a certain voltage to 0 is related to the capacitance C of the capacitor and the resistance R of the circuit.
In order to ensure that the data loaded on the sub-pixel is more accurate, the first capacitor C1 and the second capacitor C2 adopted in the embodiment of the application have the same characteristic capacitance. The adoption of the same characteristics ensures data accuracy and sufficient charge and discharge time, and the analog voltage for charging the first capacitor C1 should be 2 times or slightly more than 2 times of that of the conventional driving circuit (fig. 2).
In order to ensure that the voltage on the second capacitor C2 can be released completely, the Clr signal controlling the third switch S3 should be set sufficiently in front-to-back intervals.
The driving circuit can realize the control of sub-pixel display by combining with the control unit, and the control signals outputted by the driving circuit are shown in fig. 13. The global display principle of the global display driving circuit claimed in the present application is shown in fig. 14.
In addition, the global display principle of the global display method claimed in the application is shown in fig. 13, the method utilizes the linear relation between the analog voltage stored in the sub-pixel driving circuit and the gray scale value corresponding to the sub-pixel to realize single sub-pixel display, and the sub-pixel corresponding to the sub-pixel of the image to be displayed in the display equipment is driven by the sub-pixel driving circuit to display, so as to form global display; the adopted sub-pixel driving circuit is any one of the four sub-pixel driving circuits; the method comprises the following specific steps:
step 1: the control unit obtains the gray value of each sub-pixel in the image to be displayed by carrying out progressive or interlaced scanning on the image or video to be displayed by scanning voltage; converting the acquired gray value into a corresponding analog voltage, temporarily closing the first switch S1 in one frame of effective data, and storing the scanned analog voltage in C1;
step 2: the redundant electric quantity is released, the first switch S1 is disconnected after the first capacitor C1 is charged, the third switch S3 is controlled by the Clr signal to discharge the redundant electric quantity on the second capacitor C2, and the accuracy of the voltage loaded to the driving circuit of each sub-pixel unit is ensured;
step 3: compensation
Step 4: after the electric quantity of the second capacitor C2 is released, the second switch S2 is closed, the first capacitor C1 charges the second capacitor C2, the driving tube M1 is driven to drive the sub-pixel to display, a complete and correct image is displayed, and after the first capacitor C1 charges the second capacitor C2, the second switch S2 is opened to prepare for the display of the next frame;
step 5: continuously cycling the steps 1 to 4.
The specific compensation method in the step 3 comprises the following two modes:
first kind:
SA1: releasing the voltage, and releasing the voltage at the node where the second capacitor C2, the third capacitor C3 and the driving tube M1 intersect when the voltage is low;
SA2: and when the voltage is input and the voltage is high, the voltage is input to the node where the second capacitor C2, the third capacitor C3 and the driving tube M1 intersect, and the threshold voltage Vth of the driving tube M1 is grasped.
Second kind:
SA1: voltage is input, and when the voltage is high, the voltage is input to the node where the second capacitor C2, the third capacitor C3 and the driving tube M1 are intersected;
SA2: and releasing the voltage, namely releasing the voltage at the crossing node of the second capacitor C2, the third capacitor C3 and the driving tube M1, and grabbing the threshold voltage Vth of the driving tube M1.
In the global display method, the time for charging the first capacitor C1 to the second capacitor C2 is determined by the charging characteristics of the two capacitors.
The sub-pixel driving circuit and the global display method provided by the application are suitable for self-luminous display devices and equipment such as OLED/LED, QLED, micro-OLED/LED and the like.
The present application also provides: when Vdd is pulled down, the high voltage is restored, two switches of two power supplies can be used, one switch is closed to be low, and the other switch is closed to be high.
In addition, before driving the sub-pixel display, the threshold voltage Vth of the driving tube M1 needs to be grasped, so as to eliminate the threshold voltage Vth in the saturation region, and the image display is clearer.
Vref described in the embodiment of the present application represents a reference voltage of a circuit; the N signal and the GS signal control the opening and closing of the first switches S1 and S2, clr is a clock signal and used for controlling the conduction of the third switch S3; vsync represents a field sync signal that is generated by an external circuit (e.g., external DC) and used by the circuitry provided by the present application.
The above embodiments are only for illustrating the technical solution of the present application and not for limiting the same, and modifications or equivalent substitutions made by those skilled in the art to the technical solution of the present application are included in the scope of the claims of the present application without departing from the spirit and scope of the technical solution of the present application.
Claims (7)
1. A sub-pixel driving circuit, characterized in that: the circuit is active driving and comprises a first switch S1, a second switch S2, a third switch S3, a first capacitor C1, a second capacitor C2, a driving tube M1, a third capacitor C3, a fourth switch S4 and a fifth switch S5;
one end of the first switch S1 is used as an input end of an effective data analog voltage Vdt, and is used for receiving an analog voltage corresponding to a sub-pixel gray value, and the other end of the first switch S1 is connected with one end of the first capacitor C1 and one end of the second switch S2; the other end of the first capacitor C1 is connected with a reference voltage Vref of the circuit, the other end of the second switch S2 is connected to the reference voltage Vref through a third switch S3, and the other end of the second switch S2 is connected to the reference voltage Verf, the working voltage Vdd or the common ground Vss through the second capacitor C2 and the third capacitor C3 in sequence and connected to the grid electrode of the driving tube M1; the power end of the driving tube M1 is connected to the working voltage Vdd through a fourth switch S4, the other end of the driving tube M1 is used as an output end of the whole driving circuit and is used for connecting sub-pixels, and a fifth switch S5 is connected between the output end of the driving tube M1 and the reference voltage Vref;
when the converted analog voltage is input into the circuit, the first switch S1 is closed, the analog voltage which is linearly proportional to the gray value of the sub-pixel is stored in the first capacitor C1, and when each sub-pixel driving circuit receives the gray value of the sub-pixel to be displayed, the first switch S1 is opened; after the gray values of all the sub-pixels in the display image are stored in the driving circuit of each sub-pixel in analog voltage, starting the third switch S3 to release residual voltage in the second capacitor C2, closing the fourth switch S4 in the process of releasing the residual voltage by the second capacitor C2, loading Vdd voltage at the intersection point A of the second capacitor C2, the third capacitor C3 and the fourth switch S4, after the time of T1, opening the fourth switch S4, closing the fifth switch S5, discharging to the reference voltage through the point A, and grabbing the threshold voltage Vth of the driving tube M1 for the time of T2; in the period of T3, em opens the fourth switch S4 to isolate Vdd, closes the second switch S2, charges the second capacitor C2 through the second switch S2 by the voltage stored in the first capacitor C1 and drives all the sub-pixel units to display a complete and correct image; when the first capacitor C1 finishes charging the second capacitor C2, the second switch S2 is turned off to prepare for the display of the next frame; the Em signal controls the fourth switch S4 to be closed, the voltage on the second capacitor C2 is input into the driving tube M1, and the driving tube M1 is started to drive the sub-pixels connected to the output end of the driving tube M1 to emit light and display in the time of T4.
2. The subpixel driving circuit according to any of claim 1, wherein: the first capacitor C1 and the second capacitor C2 have the same charging characteristics.
3. The subpixel driving circuit of claim 1, wherein: the driving tube is set as a PMOS tube or an NMOS tube.
4. A global display method of a sub-pixel driving circuit according to any one of claims 1-3, characterized in that: the method utilizes the linear relation between the analog voltage stored in the sub-pixel driving circuit and the gray scale value corresponding to the sub-pixel to realize single sub-pixel display, and the sub-pixel driving circuit drives the sub-pixel corresponding to the sub-pixel of the image to be displayed in the display equipment to display, so as to form global display.
5. The global display method according to claim 4, wherein: the method comprises the following specific steps:
step 1: the control unit obtains the gray value of each sub-pixel in the image to be displayed by carrying out progressive or interlaced scanning on the image or video to be displayed by scanning voltage; converting the acquired gray value into corresponding analog voltage, temporarily closing a first switch in one frame of effective data, and storing the scanned analog voltage in a first capacitor;
step 2: the redundant electric quantity is released, the first switch is disconnected after the first capacitor is charged, the third switch is controlled by the Clr signal to release the redundant electric quantity on the second capacitor, and the accuracy of the voltage loaded to the driving circuit of each sub-pixel unit is ensured;
step 3: compensating;
step 4: after the electric quantity of the second capacitor is released, the second switch is closed, the first capacitor charges the second capacitor, the driving tube is driven to drive the sub-pixels to display, a complete and correct image is displayed, and when the first capacitor charges the second capacitor, the second switch is opened to prepare for the next frame of display;
step 5: continuously cycling the steps 1 to 4.
6. A global display method according to claim 5, wherein: the specific compensation method in the step 3 is as follows:
SA1: releasing the voltage, and releasing the voltage at the node where the second capacitor, the third capacitor and the driving tube intersect when the voltage is low;
SA2: and when the voltage is input and high, inputting the voltage to the crossing nodes of the second capacitor, the third capacitor and the driving tube, and grabbing the threshold voltage of the driving tube.
7. A global display method according to claim 5, wherein: the specific compensation method in the step 3 is as follows:
SA1: when the voltage is high, the voltage is input to the node where the second capacitor, the third capacitor and the driving tube intersect;
SA2: and releasing voltage, namely releasing the voltage at the crossing node of the second capacitor, the third capacitor and the driving tube, and grabbing the threshold voltage of the driving tube.
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| CN201711305274.1A CN107845361B (en) | 2017-12-11 | 2017-12-11 | Sub-pixel driving circuit and global display method |
| PCT/CN2018/079547 WO2019114140A1 (en) | 2017-12-11 | 2018-03-20 | Global display method and driving circuit |
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