CN107820076B - Analog video input port signal detection circuit and method - Google Patents
Analog video input port signal detection circuit and method Download PDFInfo
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- CN107820076B CN107820076B CN201711246299.9A CN201711246299A CN107820076B CN 107820076 B CN107820076 B CN 107820076B CN 201711246299 A CN201711246299 A CN 201711246299A CN 107820076 B CN107820076 B CN 107820076B
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Abstract
The invention discloses a circuit and a method for detecting analog video input port signals, wherein the circuit comprises the following steps: the main controller sends a starting signal to the time sequence generating circuit, sends a hysteresis voltage generating signal to the hysteresis reference generating circuit and sends a counting starting signal to the counting overflow judging circuit; the time sequence generating circuit generates an enabling signal for the comparator circuit; the hysteresis reference voltage generating circuit sends hysteresis reference voltage to the comparator; the common mode voltage generating circuit generates a new common mode voltage for the video signal; the comparator compares the video signal with the hysteresis reference voltage to obtain a difference signal; the counting overflow judging circuit receives the difference signal of the comparator, counts the turnover times of the difference signal, generates an overflow state signal and sends the overflow state signal to the main controller; and the main controller judges whether the video exists at the port or not after the overflow state signal is subjected to anti-interference processing. The invention simplifies the circuit design, has small circuit area and low detection power consumption, and improves the stability of detection by using an anti-interference technology.
Description
Technical Field
The invention relates to the field of analog video input interfaces, in particular to the field of CVBS television signal receiving, and specifically relates to a circuit and a method for detecting the existence of CVBS television signals.
Background
Currently, different electronic devices transmit video content to a display device through different interfaces for playing, and the video interfaces are classified into two categories, namely analog and digital. The digital interface is mainly an HDMI interface, a DVI interface, etc., and the analog interface is mainly a Composite Video Broadcast Signal (CVBS) interface.
For a digital interface, the interface protocol already defines the state of the connection, but for an analog interface, no protocol defines this connection state, requiring additional functional modules to support this function. It is very important that the analog video receiving device can detect the video signal of the analog video player, especially in the case where the detection method needs to satisfy low power consumption and low cost, such as in a portable device, the conventional method is to detect the analog video signal by turning on the analog front end and the video decoding unit of the analog video receiver as shown in fig. 1, and the method has large power consumption and high detection cost. Therefore, it is very meaningful to design a detection unit with low power consumption and low cost.
Disclosure of Invention
The invention aims to overcome the defects of the traditional detection technology and provide the analog video signal detection circuit and the method which can be used for realizing low power consumption, low cost, simplified design, stable and reliable working performance and wide application.
In order to achieve the above object, a CVBS television signal detection circuit structure of the present invention has the following composition.
The CVBS television signal detection circuit is mainly characterized in that the circuit structure comprises a comparator circuit, a counting overflow judgment circuit, a time sequence generation circuit, a main controller, a hysteresis reference voltage generation circuit and a common mode voltage generation circuit.
The main controller sends a time sequence control signal to the time sequence generating circuit, sends a hysteresis voltage generating signal to the hysteresis reference generating circuit, sends a counting starting signal to the counting overflow judging circuit and receives a counting overflow signal sent by the counting overflow judging circuit.
And the timing generation circuit sends an enable signal to the comparator circuit.
And the hysteresis reference circuit sends a hysteresis reference voltage to the comparator to be used as a reference signal of the comparator.
And the comparator circuit receives the CVBS video signal and compares the CVBS video signal with the hysteresis reference voltage to obtain a difference signal.
And the counting overflow judging circuit is used for receiving the difference signal, counting the turnover frequency of the difference signal, judging the overflow state, obtaining an overflow state judging signal and sending the overflow state judging signal to the main controller.
The video signal sent by the video player to the video display device passes through the common-mode voltage generating circuit before being sent to the comparator, the common-mode voltage generating circuit comprises a blocking capacitor, a resistor and a common-mode voltage, the blocking capacitor is used for filtering out direct-current components in video, the resistor and the common-mode voltage are used for enabling analog video signals passing through the blocking capacitor to be superposed on the common-mode voltage, and the common-mode voltage is also used for comparing input common-mode voltage.
In the detection circuit, the reference voltage of the comparator is generated by a hysteresis reference voltage generation circuit, and the hysteresis reference voltage is used for avoiding the false counting caused by the unstable state of the comparator due to the interference of noise on the video signal.
The main control circuit sends a time sequence control signal to the time sequence generating circuit, the time sequence generating circuit sends an enabling signal to the comparator, the enabling signal is effective in the set time, the comparator receives the enabling signal to start detecting, the detection result is sent to the counting overflow judging circuit, the counting overflow judging circuit counts the number of times of turning over of the difference signal sent by the comparator circuit in the set time, if the counting result is larger than the designed threshold value in the set time, the counting overflow judging circuit sends a high voltage signal to the main control circuit, and if the counting result is smaller than the designed threshold value in the set time, the counting overflow judging circuit sends a low voltage signal to the main control circuit.
In a further scheme, the main control circuit further comprises an interference module, the interference module can judge a plurality of current and previous counting overflow results as soon as possible, so that misjudgment caused by noise interference can be avoided, if the result after the interference module processes is a high level, the main control circuit can inform the video decoding module, a video signal is input at a video access port, normal video receiving and displaying are started, the video detection module can enter an ultra-low power consumption detection stage, the closing time of the comparator is prolonged, namely, the detection period is prolonged, if the player stops playing, the result after the interference module processes is a low level, the main control circuit can inform the video decoding module, no video signal exists at a video input port, the display is stopped, and the video detection module can enter a normal video detection stage.
According to the scheme, the analog video detection circuit and the method can detect whether video signals exist at the interface, and send different voltage signals to the video decoding module through the main controller, so that the video decoding module is started to display or closed.
Drawings
Advantages and realisation of the invention will become more apparent and clearer from the following detailed description of the invention, given by way of example, with reference to the accompanying drawings, which are given for illustrative purposes only and do not constitute a limitation of the invention in any way.
Fig. 1 is a schematic diagram of a conventional CVBS detection circuit.
FIG. 2 is a schematic block diagram of a video detection circuit according to the present invention.
FIG. 3 is a block diagram of a video detection circuit according to an embodiment of the present invention.
Detailed Description
As shown in fig. 1, the conventional video player U11 is connected to the display device connection U12 through a connection cable, the analog front end U12A and the video decoding module U12B of the video display device need to be periodically turned on to detect the input video signal, and the detection has large power consumption due to the large number of modules that need to be turned on and complicated operation. To further optimize the video input detection circuit, a simple video input detection circuit with low power consumption is provided.
As shown in fig. 2, the present invention includes a comparator circuit U21, a count overflow judgment circuit U22, a timing generation circuit U23, a main controller U24, a hysteresis reference circuit U25, a video display circuit U26, a common mode voltage generation circuit U27, a video player U28, a main controller U24 sending a timing control signal to the timing generation circuit U23, sending a hysteresis voltage generation signal to the hysteresis reference generation circuit U25, a count overflow judgment circuit U22 sending a count start signal and a count time T1, clearing the count for recounting, a timing generation circuit U23 sending an enable signal with a duration of T28 to the comparator circuit U21, a hysteresis reference voltage generation circuit U9 sending a hysteresis voltage to the comparator circuit U21 for use as a reference signal of the comparator circuit U21, the common mode voltage generation circuit U27 including a resistor R1 and a capacitor C1, one end of the resistor R1 being connected to a common mode voltage VCM 6358, the other end of the resistor R1 being connected to a capacitor C72, the other end of the capacitor C1 is connected with the input analog video, the comparator circuit U21 receives an enable signal of the time sequence generating circuit U23 to start comparison, compares the analog video signal after the blocking processing with the hysteresis reference voltage to obtain a difference signal, the difference signal is sent to the counting overflow judging circuit U22 to count, meanwhile, the difference signal is sent to the hysteresis reference voltage generating circuit U25 to adjust the hysteresis reference voltage, the counting overflow judging circuit U22 counts the number of times of the inversion of the difference signal within the set time T1, if the counting result of the T1 within the set time is greater than the designed threshold value N1, the counting overflow judging circuit U22 sends a high voltage signal to the main control circuit U24, if the counting result within the set time is less than the designed threshold value N1, the counting overflow judging circuit U22 sends a low voltage signal to the main control circuit U24, the main control circuit U24 sends a signal sent by the overflow judging circuit U22 to perform anti-interference processing, judging the current and previous counting overflow results as soon as the current and previous counting overflow results are judged, checking the times of continuous high level if the previously received result is high level, informing the video display circuit U26 to start video receiving display when the times of high level is more than or equal to N2, continuing detection if the times of high level is less than N2, wherein the time between two detections is T2, and in the detection time of the T2 stage, part of modules stop working, and the modules which stop working are as follows: the comparator circuit U21, the count overflow judging circuit U22, the timing generating circuit U23 and the hysteresis reference circuit U25 aim at reducing power consumption, T1 plus T2 is equal to T3, T3 is a normal detection period without video input, if the number of times of high level is equal to or more than N2, the video display circuit U26 is informed to start video receiving display, the video detection circuit enters a video detection state, in the detection state period, the detection time of the comparator is also T1, the time of two detection intervals is T4, in the detection time of T4 stage, part of modules stop working, and the modules stop working are as follows: a comparator circuit U21, a counting overflow judging circuit U22, a time sequence generating circuit U23, a hysteresis reference circuit U25, and T4 is larger than T3, a detection period T5 is the sum of T4 and T1, a detection period is within T5, the counting result of the counting overflow judging circuit U22 is larger than a designed threshold value N1, the counting overflow judging circuit U22 sends a high voltage signal to a main control circuit U24, if the counting result is smaller than the designed threshold value N1 within a set time, the counting overflow judging circuit U22 sends a low voltage signal to the main control circuit U24, the main control circuit receives U24 and performs anti-interference processing on the signal sent by the counting overflow judging circuit U22, namely, the current and previous counting overflow results are judged together, if the previously received result is a low level, the number of continuous low level is checked, and when the number of low level is larger than or equal to N2, the video display circuit U26 stops video receiving display, the video sink has no video input.
The present invention will be described in more detail below with reference to the detection method of the analog video detection circuit of the present invention.
The description of the detection method state machine of the analog video detection circuit of the present invention is shown in fig. 3. Referring to fig. 3, when the analog video detection circuit operates, the analog video detection circuit firstly enters a video detection first state SM1, the detection period of the video detection first state is T3, then the master control circuit performs anti-noise processing to judge SM2, if the judged number of times of continuous high level does not satisfy the design value, the video detection first state SM1 is continuously performed, if the judged number of times of continuous high level satisfies the design value, the video detection second state SM3 is performed, and the video display state SM5 is informed to perform receiving display, if the analog video detection second state SM3 is entered, the detection period of the video detection second state is T5, the detection result is sent to the master control circuit to perform anti-noise processing to judge SM4, if the judged number of times of continuous low level does not satisfy the design value, the video detection second state SM3 is continuously performed, if the judged number of times of continuous low level satisfies the design value, the video detection first state SM1 is performed, and notifies the video display state SM5 to stop the reception display.
Therefore, the analog video detection circuit has the advantages of simple structure, low power consumption and strong detection anti-interference performance.
It should be noted that the above is only a preferred embodiment of the present invention, but the design concept of the present invention is not limited thereto, and any insubstantial modifications made by using the design concept fall within the protection scope of the present invention.
Claims (9)
1. An analog video detection circuit, comprising:
the main controller sends a starting signal to the time sequence generating circuit, sends a hysteresis voltage generating signal to the hysteresis reference voltage generating circuit and sends a counting starting signal to the counting overflow judging circuit;
the time sequence generating circuit generates an enabling signal for the comparator circuit;
the hysteresis reference voltage generating circuit sends hysteresis reference voltage to the comparator;
the common-mode voltage generating circuit generates a new common-mode voltage for the analog video;
the comparator compares the video signal with the hysteresis reference voltage to obtain a difference signal;
the counting overflow judging circuit receives the difference signal of the comparator, counts the turnover times of the difference signal, generates an overflow state signal and sends the overflow state signal to the main controller;
the main controller judges whether video exists at the port or not after the overflow state signal is subjected to anti-interference processing,
the common mode voltage generating circuit comprises a resistor R1 and a capacitor C1, one end of the resistor R1 is connected with the common mode voltage VCM, the other end of the resistor R1 is connected with the capacitor C1, and the other end of the capacitor C1 is connected with an input analog video.
2. The analog video detection circuit of claim 1, wherein: the hysteresis reference voltage generating circuit generates hysteresis reference voltage for the comparator circuit, and receives the comparison result sent by the comparator to adjust the hysteresis reference voltage.
3. The analog video detection circuit of any of claims 1 to 2, wherein: and the counting overflow judging circuit sends a high voltage signal to the main control circuit if the counting result is greater than the designed threshold value within the set time, and sends a low voltage signal to the main control circuit if the counting result is less than the designed threshold value within the set time.
4. The analog video detection circuit of claim 3, wherein: and the counting overflow judging circuit is used for adjusting the designed threshold value under the influence of counting time, prolonging the counting time, increasing the counting designed threshold value, shortening the counting time and reducing the counting designed threshold value.
5. The analog video detection circuit of claim 1, wherein: the main controller circuit can carry out anti-interference processing on signals sent by the counting overflow judging circuit, namely, judging the current and previous counting overflow results together, checking the times of continuous low level if the previously received result is low level, processing when the times of low level is more than or equal to the design threshold value, checking the times of continuous high level if the previously received result is high level, and processing when the times of high level is more than or equal to the design threshold value.
6. The analog video detection circuit of claim 5, wherein: the threshold value of the high level times and the threshold value of the low level times in the main controller are the same or different.
7. A detection method of an analog video detection circuit, the analog video detection circuit comprising:
the main controller sends a starting signal to the time sequence generating circuit, sends a hysteresis voltage generating signal to the hysteresis reference voltage generating circuit and sends a counting starting signal to the counting overflow judging circuit;
the time sequence generating circuit generates an enabling signal for the comparator circuit;
the hysteresis reference voltage generating circuit sends hysteresis reference voltage to the comparator;
the common-mode voltage generating circuit generates a new common-mode voltage for the analog video;
the comparator compares the video signal with the hysteresis reference voltage to obtain a difference signal;
the counting overflow judging circuit receives the difference signal of the comparator, counts the turnover times of the difference signal, generates an overflow state signal and sends the overflow state signal to the main controller;
the main controller judges whether video exists at the port or not after the overflow state signal is subjected to anti-interference processing,
the common mode voltage generating circuit comprises a resistor R1 and a capacitor C1, one end of the resistor R1 is connected with the common mode voltage VCM, the other end of the resistor R1 is connected with the capacitor C1, the other end of the capacitor C1 is connected with an input analog video,
the detection method is characterized by comprising the following steps:
when the analog video detection circuit works, firstly, the analog video detection circuit enters a video detection first state, the detection period of the video detection first state is T3, then the main control circuit judges the anti-noise processing, if the judged times of continuous high level do not meet the design value, the first state of video detection is continuously performed, and if the number of times of checking the continuous high level satisfies a design value, the second state of video detection is performed and the video display is notified for reception display, if the video detection second state is entered, the detection period of the video detection second state is T5, the detection result is sent to the main control circuit to be processed and judged by anti-noise, if the judged continuous low level times do not meet the design value, the second state of video detection is continuously executed, and if the number of times of checking the continuous low level satisfies the design value, the first state of video detection is executed, and the video display is notified to stop the reception display.
8. The detection method of the analog video detection circuit of claim 7, comprising:
the detection period for detecting the first state of the video is T3, the detection period for detecting the second state of the video is T5, and T3 is less than or equal to T5.
9. The detection method of the analog video detection circuit of claim 7, comprising:
the detection period of the first state of video detection is T3, the detection period of the second state of video detection is T5, T3 is equal to T1 plus T2, T5 is equal to T1 plus T4, T1 is the detection time for all modules to start, T2 and T4 time periods, part of the modules stop working, and the modules stopping working are as follows: a comparator circuit, a counting overflow judging circuit, a time sequence generating circuit, a hysteresis reference voltage generating circuit,
the master controller sends a stop signal to the counting overflow judging circuit, the timing sequence generating circuit and the hysteresis reference voltage generating circuit, the counting overflow judging circuit and the hysteresis reference voltage generating circuit stop working after receiving the stop signal, the timing sequence generating circuit sends the stop signal to the comparator circuit after receiving the stop signal and then stops working, and the comparator circuit stops working after receiving the stop signal.
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CN108881669A (en) * | 2018-07-02 | 2018-11-23 | 晶晨半导体(上海)股份有限公司 | Cvbs signal recognition method and system |
CN111091793B (en) * | 2018-10-24 | 2022-04-26 | 厦门雅迅网络股份有限公司 | Input protection circuit and detection method for vehicle-mounted reversing video |
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