CN107819540A - A kind of simple type temporal frequency synchronizer extends output system - Google Patents
A kind of simple type temporal frequency synchronizer extends output system Download PDFInfo
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- CN107819540A CN107819540A CN201711195588.0A CN201711195588A CN107819540A CN 107819540 A CN107819540 A CN 107819540A CN 201711195588 A CN201711195588 A CN 201711195588A CN 107819540 A CN107819540 A CN 107819540A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/04—Network management architectures or arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/06—Management of faults, events, alarms or notifications
- H04L41/0631—Management of faults, events, alarms or notifications using root cause analysis; using analysis of correlation between notifications, alarms or events based on decision criteria, e.g. hierarchy, tree or time analysis
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- Computer Networks & Wireless Communication (AREA)
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- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The invention discloses a kind of simple type temporal frequency synchronizer to extend output system, increase extension output interface card EXC in Conventional temporal Frequency Synchronization node device, output interface EXC is extended by time synchronization information, frequency synchronization information and network management information pass to the system control card SCC of expansion subrack, system control card SCC receives time synchronization information, frequency synchronization information, handled after network management information, and time synchronization information and frequency synchronization information are sent to by time output card TOUC and rate-adaptive pacemaker card FOUC by the second backboard unit, parse network management information simultaneously, output card is configured, inquiry operation, inquiry response result is reported into main frame structure.The system is more flexible without GNSS satellite navigation system, deployment, it is not necessary to which rubidium clock unit, complete machine cost are lower.
Description
Technical field
The invention belongs to communication field, and in particular to a kind of simple type temporal frequency synchronizer extends output system.
Background technology
With the continuous increase of transmission network scale, the synchronous net demand that support is provided for transmission network is also continuously increased.Pass
Temporal frequency synchronization node equipment of uniting obtains the timing information and ground elapsed time/Frequency Synchronization reference letter of GNSS satellite navigation system
Number, carry out after input sentences source, after preferably a reference signal carries out lock phase processor to rubidium clock unit, by fiducial time Frequency Synchronization
Signal gives output unit, realizes and awards frequency and time service to rear end equipment.Each output unit can export a number of
Time synchronizing signal or frequency synchronization signal, with the continuous dilatation of user network, output unit interface quantity reaches maximum appearance
After amount limitation, it can only just increase number of devices and carry out meet demand, but temporal frequency synchronization node equipment is due to rubidium clock element price
It is higher, cause price of complete machine to remain high, while GNSS satellite navigation system has a Clearance requirement to installation addressing, construction cost,
Construction man-hour also remains high, therefore realizes the expansion of temporal frequency synchronous signal port quantity by the way of external expansion subrack
Exhibition just seems necessary.
The content of the invention
It is an object of the invention to overcome above-mentioned deficiency, there is provided a kind of simple type temporal frequency synchronizer extension output system
System, the requirement that the main frame of Conventional temporal frequency synchronization apparatus installs addressing to GNSS satellite navigation system can be evaded, while need not
Rubidium clock unit, equipment complete machine cost is greatly reduced, the output of temporal frequency synchronizing signal can be realized at lower cost.
In order to achieve the above object, the present invention includes the temporal frequency synchronization node with main frame structure and expansion subrack framework
Equipment, extension output interface card EXC is provided with the main frame structure of temporal frequency synchronization node equipment, extends output interface card
EXC passes to time synchronization information, frequency synchronization information and network management information in the system control card SCC in expansion subrack framework, is
System control card SCC is handled after receiving time synchronization information, frequency synchronization information and network management information, and passes through the second backboard list
Time synchronization information, frequency synchronization information are sent to time output card TOUC and rate-adaptive pacemaker card FOUC by member, while parse net
Pipe information, output card is configured, inquiry operation, inquiry response result is reported into main frame structure.
Main frame structure includes the management control unit being connected with network management control platform, and management control unit connection is with reference to synchronous defeated
Enter signal element, rubidium clock unit and the first backboard unit, with reference to synchronous input signal unit, connect with reference to synchronous input signal unit
Rubidium clock unit is connect, rubidium clock unit connects the first backboard unit, the first backboard unit Connection Time synchronous service output unit TOUC
Or Frequency Synchronization business output unit FOUC and extension input interface card EXC, extension input interface card EXC access extension frameworks
Structure.
Extension input interface card EXC is used for the time synchronized 1PPS+TOD signals and Frequency Synchronization for receiving the offer of rubidium clock unit
10MHz signals, while the management configuration instruction of management control unit transmission is received, by time synchronized 1PPS+TOD signals, frequency
Synchronous 10MHz signals and management configuration instruction are sent to system control card SCC in expansion subrack framework;
For receiving the 1PPS signals of system control card SCC loopbacks in expansion subrack framework, and calculate the 1PPS signals of transmission
With the phase difference of loopback 1PPS signals, the phase difference of two 1PPS signals is sent to expansion subrack framework by communication interface it is
Control card of uniting SCC;
The expansion subrack framework information in place provided for reception system control card SCC, and give feedback of the information in place to main frame
Management control unit in framework;
Respond, alert, event information for the configuration querying that reception system control card SCC is sent, and feed back to main frame
Management control unit in structure.
Expansion subrack framework includes system control card SCC, power subsystem and fan unit, system control card SCC, power subsystem
The second backboard unit is all connected with fan unit, the second backboard unit Connection Time synchronous service output unit TOUC and frequency are same
Step business output unit FOUC.
It is same that system control card SCC is used for recovery time synchronization 1PPS+TOD signals, frequency from extension output interface card EXC
Walk 10MHz signals and management configuration instruction;
1PPS signals for that will receive carry out loopback, are sent to the extension output interface card EXC of main frame structure;
For the two 1PPS signal phase difference datas sent according to extension output interface card EXC, to the 1PPS received
Signal carries out phase delay compensation, and phase delay offset is equal to the half of phase difference, the 1PPS of such expansion subrack framework
Just accomplish phase alignment with main frame system 1PPS;
For the time synchronized 1PPS+TOD signals and Frequency Synchronization after phase delay is compensated by the second backboard unit
10MHz signals are sent to each output unit;
For being controlled by the second backboard unit to each output unit and fan unit, while collect each output
The status information of unit, power subsystem and fan unit, by the state information report of unit to main frame structure;
For reporting expansion subrack framework information in place to main frame.
Extension output interface card EXC is connected with system control card SCC by DB25 interfaces.
Extend output interface card EXC and system control card SCC and carry out signal transmission, signal level by 25 core pair cables
For RS422 differential levels, there is following signal in cable:
1PPS_MtoS+, the 1PPS signal differential anodes for main frame structure to expansion subrack framework;
1PPS_MtoS-, the 1PPS signal differential negative terminals for main frame structure to expansion subrack framework;
1PPS_StoM+, the 1PPS signal differential anodes for expansion subrack framework to main frame structure loopback;
1PPS_StoM-, the 1PPS signal differential anodes for expansion subrack framework to main frame structure loopback;
TOD_MtoS+, the TOD signal differential anodes for main frame structure to expansion subrack framework;
TOD_MtoS-, the TOD signal differential negative terminals for main frame structure to expansion subrack framework;
CLK10M_MtoS+, the 10MHz signal differential anodes for main frame structure to expansion subrack framework;
CLK10M_MtoS-, the 10MHz signal differential negative terminals for main frame structure to expansion subrack framework;
COM_MtoS+, the communication signal difference anode for main frame structure to expansion subrack framework;
COM_MtoS-, the communication signal difference negative terminal for main frame structure to expansion subrack framework;
COM_StoM+, the communication signal difference anode for expansion subrack framework to main frame structure;
COM_StoM-, the communication signal difference anode for expansion subrack framework to main frame structure;
ONLINE_StoM+, the equipment signal differential anode in place for expansion subrack framework to main frame structure;
ONLINE_StoM-, the equipment signal differential negative terminal in place for expansion subrack framework to main frame structure;
GND is signal ground.
Extend the FPGA that output interface card EXC includes receiving the first backboard unit, FPGA connector line drivers, circuit
Driver connects DB25 joints;
FPGA receives the time synchronized 1PPS+TOD signals sent by the first backboard unit, Frequency Synchronization 10MHz signals
Instructed with management configuration, time synchronized 1PPS+TOD signals, Frequency Synchronization 10MHz signals and communication signal are sent to by FPGA
Line driver, FPGA calculate the phase difference of 1PPS signals and the main frame 1PPS signals of expansion subrack framework loopback, and by phase difference
Line driver is sent to by communication signal, the configuration querying in communication signal that FPGA parsing expansion subrack frameworks are sent rings
It, should alert, event information, report management control unit, the information reporting in place of FPGA parsing expansion subrack frameworks is controlled to management
Unit processed.
System control card SCC includes the FPGA of the second backboard unit of connection, FPGA connection line drivers, line driver
Connect DB25 joints;
Line driver module, which will receive RS422 level signals from DB25 joints and change into LVTTL signals, is sent to FPGA, will
The LVTTL signals that FPGA is sent change into RS422 level signals and are sent to DB25 joints;FPGA carries out the 1PPS signals received
Loopback, it is sent to main frame structure;Two 1PPS signal phase difference datas that FPGA is sent according to extension output interface card EXC, it is right
The 1PPS signals received carry out phase delay compensation, and phase delay offset is equal to the half of phase difference;FPGA passes through
Second backboard unit phase delay is compensated after time synchronized 1PPS+TOD signals and Frequency Synchronization 10MHz signals be sent to respectively
Individual output unit;FPGA is controlled by the second backboard unit to each output unit and fan unit, while is collected each
The status information of output unit, power subsystem and fan unit, the state information report of unit is arrived by communication interface
Main frame structure;FPGA reports the information in place of extension mount structure to give main frame structure.
Compared with prior art, the present invention increases extension output interface card EXC in Conventional temporal Frequency Synchronization node device,
Extension output interface EXC passes to time synchronization information, frequency synchronization information and network management information the system control card of expansion subrack
SCC, system control card SCC are handled after receiving time synchronization information, frequency synchronization information, network management information, and pass through second
Time synchronization information and frequency synchronization information are sent to time output card TOUC and rate-adaptive pacemaker card FOUC by backboard unit, simultaneously
Network management information is parsed, output card is configured, inquiry operation, inquiry response result is reported into main frame structure.The system without
GNSS satellite navigation system is needed, is disposed more flexible, it is not necessary to which rubidium clock unit, complete machine cost are lower.
Brief description of the drawings
Fig. 1 is the system block diagram of the present invention;
Fig. 2 is the system block diagram that input interface card EXC is extended in the present invention;
Fig. 3 is the system block diagram of system control card SCC in the present invention.
Embodiment
The present invention will be further described below in conjunction with the accompanying drawings.
Referring to Fig. 1, the present invention includes the temporal frequency synchronization node equipment with main frame structure and expansion subrack framework, time
Extension output interface card EXC, extension output interface card EXC are provided with the main frame structure of Frequency Synchronization node device the time is same
Step information, frequency synchronization information and network management information are passed in the system control card SCC in expansion subrack framework, system control card SCC
Handled after receiving time synchronization information, frequency synchronization information and network management information, and it is by the second backboard unit that the time is same
Step information, frequency synchronization information are sent to time output card TOUC and rate-adaptive pacemaker card FOUC, while parse network management information, to defeated
Card release is configured, inquiry operation, and inquiry response result is reported into main frame structure.
Main frame structure includes the management control unit being connected with network management control platform, and management control unit connection is with reference to synchronous defeated
Enter signal element, rubidium clock unit and the first backboard unit, with reference to synchronous input signal unit, connect with reference to synchronous input signal unit
Rubidium clock unit is connect, rubidium clock unit connects the first backboard unit, the first backboard unit Connection Time synchronous service output unit TOUC
Or Frequency Synchronization business output unit FOUC and extension input interface card EXC, extension input interface card EXC access extension frameworks
Structure.
Extension input interface card EXC is used for the time synchronized 1PPS+TOD signals and Frequency Synchronization for receiving the offer of rubidium clock unit
10MHz signals, while the management configuration instruction of management control unit transmission is received, by time synchronized 1PPS+TOD signals, frequency
Synchronous 10MHz signals and management configuration instruction are sent to system control card SCC in expansion subrack framework;
For receiving the 1PPS signals of system control card SCC loopbacks in expansion subrack framework, and calculate the 1PPS signals of transmission
With the phase difference of loopback 1PPS signals, the phase difference of two 1PPS signals is sent to expansion subrack framework by communication interface it is
Control card of uniting SCC;
The expansion subrack framework information in place provided for reception system control card SCC, and give feedback of the information in place to main frame
Management control unit in framework;
Respond, alert, event information for the configuration querying that reception system control card SCC is sent, and feed back to main frame
Management control unit in structure.
Expansion subrack framework includes system control card SCC, power subsystem and fan unit, system control card SCC, power subsystem
The second backboard unit is all connected with fan unit, the second backboard unit Connection Time synchronous service output unit TOUC and frequency are same
Step business output unit FOUC.
It is same that system control card SCC is used for recovery time synchronization 1PPS+TOD signals, frequency from extension output interface card EXC
Walk 10MHz signals and management configuration instruction;
1PPS signals for that will receive carry out loopback, are sent to the extension output interface card EXC of main frame structure;
For the two 1PPS signal phase difference datas sent according to extension output interface card EXC, to the 1PPS received
Signal carries out phase delay compensation, and phase delay offset is equal to the half of phase difference, the 1PPS of such expansion subrack framework
Just accomplish phase alignment with main frame system 1PPS;
For the time synchronized 1PPS+TOD signals and Frequency Synchronization after phase delay is compensated by the second backboard unit
10MHz signals are sent to each output unit;
For being controlled by the second backboard unit to each output unit and fan unit, while collect each output
The status information of unit, power subsystem and fan unit, by the state information report of unit to main frame structure;
For reporting expansion subrack framework information in place to main frame.
Extension output interface card EXC is connected with system control card SCC by DB25 interfaces.
Extend output interface card EXC and system control card SCC and carry out signal transmission, signal level by 25 core pair cables
For RS422 differential levels, there is following signal in cable:
1PPS_MtoS+, the 1PPS signal differential anodes for main frame structure to expansion subrack framework;
1PPS_MtoS-, the 1PPS signal differential negative terminals for main frame structure to expansion subrack framework;
1PPS_StoM+, the 1PPS signal differential anodes for expansion subrack framework to main frame structure loopback;
1PPS_StoM-, the 1PPS signal differential anodes for expansion subrack framework to main frame structure loopback;
TOD_MtoS+, the TOD signal differential anodes for main frame structure to expansion subrack framework;
TOD_MtoS-, the TOD signal differential negative terminals for main frame structure to expansion subrack framework;
CLK10M_MtoS+, the 10MHz signal differential anodes for main frame structure to expansion subrack framework;
CLK10M_MtoS-, the 10MHz signal differential negative terminals for main frame structure to expansion subrack framework;
COM_MtoS+, the communication signal difference anode for main frame structure to expansion subrack framework;
COM_MtoS-, the communication signal difference negative terminal for main frame structure to expansion subrack framework;
COM_StoM+, the communication signal difference anode for expansion subrack framework to main frame structure;
COM_StoM-, the communication signal difference anode for expansion subrack framework to main frame structure;
ONLINE_StoM+, the equipment signal differential anode in place for expansion subrack framework to main frame structure;
ONLINE_StoM-, the equipment signal differential negative terminal in place for expansion subrack framework to main frame structure;
GND is signal ground.
Referring to Fig. 2, extension output interface card EXC includes the FPGA for receiving the first backboard unit, and FPGA connectors circuit drives
Dynamic device, line driver connection DB25 joints;
FPGA receives the time synchronized 1PPS+TOD signals sent by the first backboard unit, Frequency Synchronization 10MHz signals
Instructed with management configuration, time synchronized 1PPS+TOD signals, Frequency Synchronization 10MHz signals and communication signal are sent to by FPGA
Line driver, FPGA calculate the phase difference of 1PPS signals and the main frame 1PPS signals of expansion subrack framework loopback, and by phase difference
Line driver is sent to by communication signal, the configuration querying in communication signal that FPGA parsing expansion subrack frameworks are sent rings
It, should alert, event information, report management control unit, the information reporting in place of FPGA parsing expansion subrack frameworks is controlled to management
Unit processed.
Include the FPGA of the second backboard unit of connection, FPGA connection line drivers, line referring to Fig. 3, system control card SCC
Road driver connection DB25 joints;
Line driver module, which will receive RS422 level signals from DB25 joints and change into LVTTL signals, is sent to FPGA, will
The LVTTL signals that FPGA is sent change into RS422 level signals and are sent to DB25 joints;FPGA carries out the 1PPS signals received
Loopback, it is sent to main frame structure;Two 1PPS signal phase difference datas that FPGA is sent according to extension output interface card EXC, it is right
The 1PPS signals received carry out phase delay compensation, and phase delay offset is equal to the half of phase difference;FPGA passes through
Second backboard unit phase delay is compensated after time synchronized 1PPS+TOD signals and Frequency Synchronization 10MHz signals be sent to respectively
Individual output unit;FPGA is controlled by the second backboard unit to each output unit and fan unit, while is collected each
The status information of output unit, power subsystem and fan unit, the state information report of unit is arrived by communication interface
Main frame structure;FPGA reports the information in place of extension mount structure to give main frame structure.
Claims (9)
1. a kind of simple type temporal frequency synchronizer extends output system, it is characterised in that including with main frame structure and expansion
The temporal frequency synchronization node equipment of framework structure is opened up, extension output is provided with the main frame structure of temporal frequency synchronization node equipment
Time synchronization information, frequency synchronization information and network management information are passed to extension framework by interface card EXC, extension output interface card EXC
In system control card SCC in structure, after system control card SCC receives time synchronization information, frequency synchronization information and network management information
Handled, and by the second backboard unit by time synchronization information, frequency synchronization information be sent to time output card TOUC and
Rate-adaptive pacemaker card FOUC, while network management information is parsed, output card is configured, inquiry operation, inquiry response result is reported
To main frame structure.
2. a kind of simple type temporal frequency synchronizer extension output system according to claim 1, it is characterised in that main
Framework structure includes the management control unit being connected with network management control platform, and management control unit connection refers to synchronous input signal list
Member, rubidium clock unit and the first backboard unit, with reference to synchronous input signal unit, rubidium clock list is connected with reference to synchronous input signal unit
Member, rubidium clock unit connect the first backboard unit, and the first backboard unit Connection Time synchronous service output unit TOUC or frequency are same
Step business output unit FOUC and extension input interface card EXC, extension input interface card EXC access expansion subrack frameworks.
3. a kind of simple type temporal frequency synchronizer extension output system according to claim 2, it is characterised in that expand
Exhibition input interface card EXC is used for the time synchronized 1PPS+TOD signals and Frequency Synchronization 10MHz signals for receiving the offer of rubidium clock unit,
The management configuration instruction of management control unit transmission is received simultaneously, and time synchronized 1PPS+TOD signals, Frequency Synchronization 10MHz are believed
Number and management configuration instruction be sent to system control card SCC in expansion subrack framework;
For receiving the 1PPS signals of system control card SCC loopbacks in expansion subrack framework, and calculate the 1PPS signals and ring of transmission
The phase difference of 1PPS signals is returned, is sent the phase difference of two 1PPS signals to the system control of expansion subrack framework by communication interface
Fabrication SCC;
The expansion subrack framework information in place provided for reception system control card SCC, and give feedback of the information in place to main frame structure
In management control unit;
Respond, alert, event information for the configuration querying that reception system control card SCC is sent, and feed back in main frame structure
Management control unit.
4. a kind of simple type temporal frequency synchronizer extension output system according to claim 1, it is characterised in that expand
Exhibition framework structure includes system control card SCC, power subsystem and fan unit, system control card SCC, power subsystem and fan unit
It is all connected with the second backboard unit, the second backboard unit Connection Time synchronous service output unit TOUC and the output of Frequency Synchronization business
Unit F OUC.
5. a kind of simple type temporal frequency synchronizer extension output system according to claim 4, it is characterised in that be
Control card of uniting SCC is used for recovery time synchronization 1PPS+TOD signals, Frequency Synchronization 10MHz letters from extension output interface card EXC
Number and management configuration instruction;
1PPS signals for that will receive carry out loopback, are sent to the extension output interface card EXC of main frame structure;
For the two 1PPS signal phase difference datas sent according to extension output interface card EXC, to the 1PPS signals received
Carry out phase delay compensation, phase delay offset is equal to the half of phase difference, the 1PPS of such expansion subrack framework just with
Main frame system 1PPS accomplishes phase alignment;
For the time synchronized 1PPS+TOD signals and Frequency Synchronization 10MHz after phase delay is compensated by the second backboard unit
Signal is sent to each output unit;
For being controlled by the second backboard unit to each output unit and fan unit, while it is single to collect each output
The status information of member, power subsystem and fan unit, by the state information report of unit to main frame structure;
For reporting expansion subrack framework information in place to main frame.
6. a kind of simple type temporal frequency synchronizer extension output system according to claim 1, it is characterised in that expand
Exhibition output interface card EXC is connected with system control card SCC by DB25 interfaces.
7. a kind of simple type temporal frequency synchronizer extension output system according to claim 1, it is characterised in that expand
Open up output interface card EXC and system control card SCC and carry out signal transmission by 25 core pair cables, signal level is that RS422 is poor
Divide level, have following signal in cable:
1PPS_MtoS+, the 1PPS signal differential anodes for main frame structure to expansion subrack framework;
1PPS_MtoS-, the 1PPS signal differential negative terminals for main frame structure to expansion subrack framework;
1PPS_StoM+, the 1PPS signal differential anodes for expansion subrack framework to main frame structure loopback;
1PPS_StoM-, the 1PPS signal differential anodes for expansion subrack framework to main frame structure loopback;
TOD_MtoS+, the TOD signal differential anodes for main frame structure to expansion subrack framework;
TOD_MtoS-, the TOD signal differential negative terminals for main frame structure to expansion subrack framework;
CLK10M_MtoS+, the 10MHz signal differential anodes for main frame structure to expansion subrack framework;
CLK10M_MtoS-, the 10MHz signal differential negative terminals for main frame structure to expansion subrack framework;
COM_MtoS+, the communication signal difference anode for main frame structure to expansion subrack framework;
COM_MtoS-, the communication signal difference negative terminal for main frame structure to expansion subrack framework;
COM_StoM+, the communication signal difference anode for expansion subrack framework to main frame structure;
COM_StoM-, the communication signal difference anode for expansion subrack framework to main frame structure;
ONLINE_StoM+, the equipment signal differential anode in place for expansion subrack framework to main frame structure;
ONLINE_StoM-, the equipment signal differential negative terminal in place for expansion subrack framework to main frame structure;
GND is signal ground.
8. a kind of simple type temporal frequency synchronizer extension output system according to claim 1, it is characterised in that expand
Open up the FPGA that output interface card EXC includes receiving the first backboard unit, FPGA connector line drivers, line driver connection
DB25 joints;
FPGA receives time synchronized 1PPS+TOD signals, Frequency Synchronization 10MHz signals and the pipe sent by the first backboard unit
Configuration-direct is managed, time synchronized 1PPS+TOD signals, Frequency Synchronization 10MHz signals and communication signal are sent to circuit by FPGA
Driver, FPGA calculates the 1PPS signals of expansion subrack framework loopback and the phase difference of main frame 1PPS signals, and phase difference is passed through
Communication signal is sent to line driver, and the configuration querying in communication signal that FPGA parsing expansion subrack frameworks are sent is responded, accused
Alert, event information, reports management control unit, and the information reporting in place of FPGA parsing expansion subrack frameworks is single to management control
Member.
9. a kind of simple type temporal frequency synchronizer extension output system according to claim 1, it is characterised in that be
Control card of uniting SCC includes the FPGA of the second backboard unit of connection, FPGA connection line drivers, and line driver connection DB25 connects
Head;
Line driver module, which will receive RS422 level signals from DB25 joints and change into LVTTL signals, is sent to FPGA, by FPGA
The LVTTL signals of transmission change into RS422 level signals and are sent to DB25 joints;The 1PPS signals received are carried out ring by FPGA
Return, be sent to main frame structure;Two 1PPS signal phase difference datas that FPGA is sent according to extension output interface card EXC, docking
The 1PPS signals received carry out phase delay compensation, and phase delay offset is equal to the half of phase difference;FPGA passes through
Two backboard units phase delay is compensated after time synchronized 1PPS+TOD signals and Frequency Synchronization 10MHz signals be sent to it is each
Output unit;FPGA is controlled by the second backboard unit to each output unit and fan unit, while is collected each defeated
Go out the status information of unit, power subsystem and fan unit, by communication interface by the state information report of unit to master
Framework structure;FPGA reports the information in place of extension mount structure to give main frame structure.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110752877A (en) * | 2019-11-04 | 2020-02-04 | 深圳市慧宇系统有限公司 | System and method for transmitting time frequency signal in optical fiber |
WO2023276294A1 (en) * | 2021-06-28 | 2023-01-05 | 古野電気株式会社 | Receiving device, abnormality detecting method, and abnormality detecting program |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040066869A1 (en) * | 2002-10-02 | 2004-04-08 | Nec Corporation | Apparatus and method for re-synchronization of transmitted serial signal of data frame and idle pattern |
CN103163780A (en) * | 2011-12-13 | 2013-06-19 | 河南省电力公司安阳供电公司 | Power network global position system (GPS)\big dipper dual system satellite synchronous clock system |
CN103269263A (en) * | 2013-05-17 | 2013-08-28 | 浙江赛思电子科技有限公司 | Device and method for RS422/485 time code expanding output based on custom expansion clock and communication bus |
-
2017
- 2017-11-24 CN CN201711195588.0A patent/CN107819540B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040066869A1 (en) * | 2002-10-02 | 2004-04-08 | Nec Corporation | Apparatus and method for re-synchronization of transmitted serial signal of data frame and idle pattern |
CN103163780A (en) * | 2011-12-13 | 2013-06-19 | 河南省电力公司安阳供电公司 | Power network global position system (GPS)\big dipper dual system satellite synchronous clock system |
CN103269263A (en) * | 2013-05-17 | 2013-08-28 | 浙江赛思电子科技有限公司 | Device and method for RS422/485 time code expanding output based on custom expansion clock and communication bus |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110752877A (en) * | 2019-11-04 | 2020-02-04 | 深圳市慧宇系统有限公司 | System and method for transmitting time frequency signal in optical fiber |
CN110752877B (en) * | 2019-11-04 | 2021-12-07 | 深圳市慧宇系统有限公司 | System and method for transmitting time frequency signal in optical fiber |
WO2023276294A1 (en) * | 2021-06-28 | 2023-01-05 | 古野電気株式会社 | Receiving device, abnormality detecting method, and abnormality detecting program |
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