CN107808820A - A kind of nesa coating, circuit and preparation method thereof - Google Patents
A kind of nesa coating, circuit and preparation method thereof Download PDFInfo
- Publication number
- CN107808820A CN107808820A CN201711079502.8A CN201711079502A CN107808820A CN 107808820 A CN107808820 A CN 107808820A CN 201711079502 A CN201711079502 A CN 201711079502A CN 107808820 A CN107808820 A CN 107808820A
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- Prior art keywords
- circuit
- nesa coating
- conductor wires
- conductive film
- film layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000011248 coating agent Substances 0.000 title claims abstract description 38
- 238000000576 coating method Methods 0.000 title claims abstract description 38
- 238000002360 preparation method Methods 0.000 title claims abstract description 16
- 239000004020 conductor Substances 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 12
- 238000011049 filling Methods 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 5
- 229920002799 BoPET Polymers 0.000 claims description 3
- 239000012528 membrane Substances 0.000 abstract description 7
- 239000010408 film Substances 0.000 description 40
- 238000010586 diagram Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 4
- 108090000862 Ion Channels Proteins 0.000 description 3
- 102000004310 Ion Channels Human genes 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 238000007664 blowing Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
- H01B5/14—Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Non-Insulated Conductors (AREA)
Abstract
This application provides a kind of nesa coating, circuit and preparation method thereof, the nesa coating circuit includes：It is arranged on conductive film layer, and with least two conductor wires of same intervals arranged in parallel；The electrode being connected with the same side of at least two conductor wires；Wherein, the line width that two conductor wires are formed described at least meets preset value.The nesa coating circuit that the application provides is not on the premise of line width is changed, an original circuit is diverted at least more than two, and the risk of electrically conducting transparent membrane damage can be reduced by the way that distance between circuit is widened as far as possible, and it only can just cause functional failure in the case where damage all occur in all circuits in parallel, improve the stability of product.
Description
Technical field
The application is related to conductive technical field of membrane, more particularly to a kind of nesa coating, circuit and preparation method thereof.
Background technology
Most important application is ito film to nesa coating at present, also has other AZO etc..Ito film is n-type semiconductor,
With high conductance, high visible light transmissivity, high mechanical hardness and good chemical stability.Therefore, it is liquid crystal
Display, plasma display, electroluminescent display, touch-screen, the transparent electricity of solar cell and other electronic instruments
Extremely the most frequently used thin-film material.
Nesa coating circuit in existing is designed as a kind of single circuit design, as shown in figure 1, of the prior art transparent
Conducting film internal wiring is tandem, wherein, circuit is represented shown in arrow, so, once some in nesa coating circuit
Point, because artificial or other operations cause damage, resistance exceeded, it may result in whole piece electrically conducting transparent membrane channels failure.
The content of the invention
In view of this, this application provides a kind of nesa coating, circuit and preparation method thereof, to overcome in the prior art
Once there is electrically conducting transparent membrane damage and may result in whole piece electrically conducting transparent membrane channels failure in the nesa coating circuit of tandem
Problem.
To achieve the above object, this application provides following technical scheme：
A kind of circuit of nesa coating, including：
It is arranged on conductive film layer, and with least two conductor wires of same intervals arranged in parallel；
The electrode being connected with the same side of at least two conductor wires；
Wherein, the line width that two conductor wires are formed described at least meets preset value.
Preferably, in addition to：
The filling block being arranged between two conductor wires of arbitrary neighborhood, the width of the filling block are less than any phase
The distance between two adjacent conductor wires.
Preferably, the distance between two conductor wires of the arbitrary neighborhood are not less than 120um.
Preferably, the shape of the conductor wire can be any in square-wave waveform, sawtooth waveform or sine waveform
It is a kind of.
Preferably, the number of the conductor wire can be 2.
Preferably, the preset value can be 1mm.
A kind of nesa coating, including：
Substrate；
It is arranged at the conductive film layer of the upper surface of substrate；
Circuit described in above-mentioned any one, the circuit are arranged on the conductive film layer.
Preferably, the substrate is PET film.
A kind of preparation method of nesa coating circuit, this method are applied to the system to the circuit described in above-mentioned any one
Make, including：
Add dry film in one side of the conductive film layer away from substrate, and utilize predetermined pattern, pair plus dry film after nesa coating
It is exposed；
Washed using developing technique and past dry film is not irradiated by ultraviolet, leave the dry film exposed；
It will be etched by the conductive film layer region that the dry film covers, to obtain the circuit for meeting predetermined pattern.
Preferably, in addition to：
After the completion of etching, the dry film exposed on the conductive film layer is peeled off.
From above technical scheme, this application provides a kind of nesa coating, circuit and preparation method thereof, this is transparent
Conducting film circuit includes：It is arranged on conductive film layer, and with least two conductor wires of same intervals arranged in parallel；With it is described extremely
The electrode that the same side of few two conductor wires is connected；Wherein, the line width that two conductor wires are formed described at least meets default
Value.An original circuit is diverted to by the nesa coating circuit that the application provides on the premise of line width is not changed
At least more than two, and the risk of electrically conducting transparent membrane damage can be reduced by the way that distance between circuit is widened as far as possible, and
It only can just cause functional failure in the case where damage all occur in all circuits in parallel, improve the stability of product.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is nesa coating circuit design diagram of the prior art；
Fig. 2 is a kind of nesa coating circuit design diagram that the embodiment of the present application one provides；
Fig. 3 is a kind of flow chart of the preparation method for nesa coating circuit that the embodiment of the present application three provides；
Fig. 4 is the flow chart of the preparation method for another nesa coating circuit that the embodiment of the present application three provides；
Fig. 5 (a) is a kind of exposure schematic diagram that the application provides；
Fig. 5 (b) is a kind of developing result schematic diagram that the application provides；
Fig. 5 (c) is a kind of etching result schematic diagram that the application provides；
Fig. 5 (d) is a kind of demoulding result schematic diagram that the application provides.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
It may result in overcome the nesa coating circuit of tandem in the prior art electrically conducting transparent membrane damage once occur
The problem of whole piece electrically conducting transparent membrane channels failure, this application provides a kind of nesa coating, circuit and preparation method thereof, specifically
Scheme is as described below：
Embodiment one
The embodiment of the present application one provides a kind of circuit of nesa coating, as shown in Fig. 2 Fig. 2 is the embodiment of the present application
A kind of one nesa coating circuit design diagram provided, the figure are illustrated using conductor wire as 2.The electrically conducting transparent
The circuit of film includes：Conductive film layer 10, at least two conductor wires 20 (part shown in square-wave waveform circuit in figure) and electrode are (in figure
It is not shown),
Specifically, at least two conductor wires are arranged on conductive film layer 10, and with identical interval arranged in parallel；
The same side of at least two conductor wires 20 is connected with electrode；
Wherein, the line width that at least two conductor wires are formed meets preset value.
In order that the circuit in nesa coating is more unintelligible in terms of appearance, so as to more attractive in appearance, to improve Consumer's Experience
Degree, the nesa coating circuit that the application provides can also set filling block 30 between two conductor wires of arbitrary neighborhood,
Block signal between two square-wave waveform circuits i.e. shown in Fig. 2, wherein, the width of filling block is less than two of arbitrary neighborhood
The distance between conductor wire.
The application by the way that the line optimization of existing single circuit design is designed for a kind of parallel nesa coating circuit,
On the premise of the line width for not changing nesa coating, a circuit is divided to more than two, and between a plurality of circuit
Distance widen as far as possible, so as to greatly reduce the risk of electrically conducting transparent membrane damage, improve the functional stabilization of product,
Also, only all parallel lines all occur just causing functional failure in the case of damage.
Specifically, the distance between adjacent two lines road is at least greater than 120um, (this is allowed for will be on two lines road
Distance between increase filling block, and the distance of the offline road of filling block in itself is greater than
60um just can more insure), in addition for circuit in itself, on the premise of ensureing not influence use, between circuit
Distance farthest have best effect (respectively hold a match similar to right-hand man, with mouth toward left hand air blowing, if right-hand man away from
From more remote, the match on the right hand is involved with regard to more difficult).As shown in Fig. 2 the distance between two dotted lines are two lines road
The distance between.
Specifically, the shape of conductor wire can be any one in square-wave waveform, sawtooth waveform or sine waveform,
Do not limit in this application, naturally it is also possible to designed from the circuit of other waveforms.As shown in Fig. 2 as square-wave waveform
Example.
Specifically, the number of conductor wire can be 2, certainly or 3 or more bar numbers, the application do not limit, and are
Meet process requirements, it is general to set 2.In addition, in the application, line width meets that preset value concretely protect by line width
Hold as 1mm, when setting two conductor wires, as shown in Fig. 2 the distance of first conductor wire and first dotted line is 0.5mm,
The distance of two conductor wires and Article 2 dotted line is also 0.5mm.
Shown in complex chart 1 and Fig. 2, an arrow represents a circuit, and Fig. 2 is to be split into two circuits, is just this Shen
Parallel-connection structure that please be described.The line width sum of two circuits in parallel, is equal with the width in original wall scroll loop, as long as not shadow
The total area for ringing the position can be achieved with the function of cascaded structure, and confirm that product functionality and cascaded structure are poor by checking
The opposite sex is negligible.
In the application, such as material such as tin indium oxide, Nano Silver can be selected in conductive film layer, does not limit specifically, can be according to reality
Border needs to select.
From above technical scheme, the nesa coating circuit that the embodiment of the present application one provides is not change circuit wide
On the premise of degree, an original circuit is diverted at least more than two, and can be by the way that distance between circuit is widened as far as possible
To reduce the risk of electrically conducting transparent membrane damage, and only can just cause in the case where damage all occur in all circuits in parallel
Functional failure, improve the stability of product.
Embodiment two
On the basis of embodiment one, the embodiment of the present application two provides a kind of nesa coating, including：
Substrate；
It is arranged at the conductive film layer of upper surface of substrate；
Any one circuit described in embodiment one, circuit are arranged on conductive film layer.
Wherein, such as material such as tin indium oxide, Nano Silver can be selected in conductive film layer, and substrate is PET film.
Embodiment three
The embodiment of the present application three provides a kind of preparation method of nesa coating circuit, as shown in figure 3, the preparation method
Applied to the making to the circuit described in embodiment one, this method includes：
S101：Add dry film in one side of the conductive film layer away from substrate, and utilize predetermined pattern, pair plus dry film after transparent lead
Electrolemma is exposed；
Specifically, choosing flim (film+PET that ITO has been plated on a kind of base material) first, the first step needs to plate in flim
One layer of light-sensitive surface (claim plus dry film), it is exposed (pattern of figure below is passed through i.e. by egative film ultraviolet on exposure sources afterwards
Line is next to exposing), as shown in Fig. 5 (a).
S102：Washed using developing technique and past dry film is not irradiated by ultraviolet, leave the dry film exposed；
The effect of development is to wash not irradiating past dry film part by ultraviolet by a kind of weak base, leaves and has exposed
Dry film, such as Fig. 5 (b).
S103：It will be etched by the conductive film layer region that dry film covers, to obtain the circuit for meeting predetermined pattern.
It is shown by the harsh ITO etching away regions for covering no dry film, section result such as Fig. 5 (c).
As shown in figure 4, Fig. 4 is the stream of the preparation method for another nesa coating circuit that the embodiment of the present application three provides
Cheng Tu.This method also includes：
S104：After the completion of etching, the dry film exposed on the conductive film layer is peeled off.
After the etch is completed, it is necessary to carry out demoulding, i.e., the dry film above ITO is peeled off, section result such as Fig. 5 (d)
It is shown, so far complete the manufacturing process of circuit.
Finally, it is to be noted that, herein, such as first and second or the like relational terms be used merely to by
One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation
Between any this actual relation or order be present.Moreover, term " comprising ", "comprising" or its any other variant meaning
Covering including for nonexcludability, so that process, method, article or equipment including a series of elements not only include that
A little key elements, but also the other element including being not expressly set out, or also include for this process, method, article or
The intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence "including a ...", is not arranged
Except other identical element in the process including the key element, method, article or equipment being also present.
Each embodiment is described by the way of progressive in this specification, what each embodiment stressed be and other
The difference of embodiment, between each embodiment identical similar portion mutually referring to.
The foregoing description of the disclosed embodiments, professional and technical personnel in the field are enable to realize or using the application.
A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein
General Principle can be realized in other embodiments in the case where not departing from spirit herein or scope.Therefore, the application
The embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase one
The most wide scope caused.
Claims (10)
- A kind of 1. circuit of nesa coating, it is characterised in that including：It is arranged on conductive film layer, and with least two conductor wires of same intervals arranged in parallel；The electrode being connected with the same side of at least two conductor wires；Wherein, the line width that two conductor wires are formed described at least meets preset value.
- 2. circuit according to claim 1, it is characterised in that also include：The filling block being arranged between two conductor wires of arbitrary neighborhood, the width of the filling block are less than the arbitrary neighborhood The distance between two conductor wires.
- 3. circuit according to claim 2, it is characterised in that the distance between two conductor wires of the arbitrary neighborhood are no Less than 120um.
- 4. circuit according to claim 1, it is characterised in that the shape of the conductor wire can be square-wave waveform, sawtooth waveforms Any one in waveform or sine waveform.
- 5. circuit according to claim 1, it is characterised in that the number of the conductor wire can be 2.
- 6. circuit according to claim 1, it is characterised in that the preset value can be 1mm.
- A kind of 7. nesa coating, it is characterised in that including：Substrate；It is arranged at the conductive film layer of the upper surface of substrate；Circuit described in claim 1-6 any one, the circuit are arranged on the conductive film layer.
- 8. nesa coating according to claim 7, it is characterised in that the substrate is PET film.
- 9. a kind of preparation method of nesa coating circuit, it is characterised in that this method is applied to any one to claim 1-6 The making of circuit described in, including：Add dry film in one side of the conductive film layer away from substrate, and utilize predetermined pattern, pair plus dry film after nesa coating carry out Exposure；Washed using developing technique and past dry film is not irradiated by ultraviolet, leave the dry film exposed；It will be etched by the conductive film layer region that the dry film covers, to obtain the circuit for meeting predetermined pattern.
- 10. preparation method according to claim 9, it is characterised in that also include：After the completion of etching, the dry film exposed on the conductive film layer is peeled off.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711079502.8A CN107808820A (en) | 2017-11-06 | 2017-11-06 | A kind of nesa coating, circuit and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711079502.8A CN107808820A (en) | 2017-11-06 | 2017-11-06 | A kind of nesa coating, circuit and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107808820A true CN107808820A (en) | 2018-03-16 |
Family
ID=61583367
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711079502.8A Pending CN107808820A (en) | 2017-11-06 | 2017-11-06 | A kind of nesa coating, circuit and preparation method thereof |
Country Status (1)
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| CN (1) | CN107808820A (en) |
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| CN203588228U (en) * | 2013-10-31 | 2014-05-07 | 南昌欧菲光学技术有限公司 | Transparent conducting film and touch device with transparent conducting film |
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| CN104391607A (en) * | 2014-12-11 | 2015-03-04 | 山东华芯富创电子科技有限公司 | Touch screen capable of preventing silver wire circuit break and manufacturing method of touch screen |
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2017
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101825139A (en) * | 2009-03-07 | 2010-09-08 | 深圳富泰宏精密工业有限公司 | Hinge sleeve and portable electronic device using same |
| CN102201828A (en) * | 2010-03-25 | 2011-09-28 | 比亚迪股份有限公司 | Portable handheld equipment with sliding way structure integrated with antenna functions |
| CN104219343A (en) * | 2013-05-30 | 2014-12-17 | 深圳市中兴移动通信有限公司 | Mobile terminal and protective cover |
| CN103399664A (en) * | 2013-07-22 | 2013-11-20 | 南昌欧菲光显示技术有限公司 | Touch input sheet and production method thereof |
| CN203588228U (en) * | 2013-10-31 | 2014-05-07 | 南昌欧菲光学技术有限公司 | Transparent conducting film and touch device with transparent conducting film |
| CN103824616A (en) * | 2014-02-26 | 2014-05-28 | 南昌欧菲光科技有限公司 | Conducting film and manufacturing method thereof, touch component and touch display device |
| CN103871547A (en) * | 2014-02-26 | 2014-06-18 | 南昌欧菲光科技有限公司 | Transparent conducting film and electronic device containing same |
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| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180316 |
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