CN107785383A - Image sensor and manufacturing method thereof - Google Patents
Image sensor and manufacturing method thereof Download PDFInfo
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- CN107785383A CN107785383A CN201610819519.1A CN201610819519A CN107785383A CN 107785383 A CN107785383 A CN 107785383A CN 201610819519 A CN201610819519 A CN 201610819519A CN 107785383 A CN107785383 A CN 107785383A
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- 238000004519 manufacturing process Methods 0.000 title abstract description 22
- 230000004888 barrier function Effects 0.000 claims abstract description 101
- 230000003287 optical effect Effects 0.000 claims abstract description 81
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 239000000463 material Substances 0.000 claims description 47
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 25
- 238000002360 preparation method Methods 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 14
- 239000000377 silicon dioxide Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 234
- 239000011229 interlayer Substances 0.000 description 17
- 238000002955 isolation Methods 0.000 description 6
- 239000003989 dielectric material Substances 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
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- 239000003795 chemical substances by application Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000005360 phosphosilicate glass Substances 0.000 description 3
- 239000005368 silicate glass Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
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- 238000005240 physical vapour deposition Methods 0.000 description 2
- 150000004760 silicates Chemical class 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 206010034960 Photophobia Diseases 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000000701 chemical imaging Methods 0.000 description 1
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- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14645—Colour imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention discloses an image sensor and a manufacturing method thereof. The image sensor comprises a photosensitive element, at least one patterned conductive layer, at least one lower dielectric layer, at least one optical barrier layer and at least one upper dielectric layer. The photosensitive element is arranged on the surface of a substrate, the patterned conductive layer is arranged on the substrate and comprises at least one interconnection line arranged on one side of the photosensitive element. The lower dielectric layer is set on the substrate and covers the inner connecting line, the optical barrier layer covers the lower dielectric layer, the upper dielectric layer covers the optical barrier layer, the refraction coefficient of the optical barrier layer is larger than the refraction coefficients of the upper dielectric layer and the lower dielectric layer.
Description
Technical field
The present invention relates to a kind of CIS and preparation method thereof, can improve across interference more particularly, to one kind
The CIS of (cross talk) and preparation method thereof.
Background technology
As the products such as digital camera, scanning electron machine are constantly developed and grown up, in the market is to Image Sensor
Demand continues to increase.Currently used Image Sensor includes Charged Couple sensing element (charge coupled
Device, CCD) and CMOS (complementary metal-oxide-
Semiconductor, CMOS) Image Sensor (also known as CMOS image sensor, CIS) two major classes, wherein CMOS images
Sensing element because with low operating voltage, low power consumption and high operating efficiency, can as needed to carry out arbitrary access etc. excellent
Point, while there is the advantage that can be integrated in current semiconductor technology largely to manufacture, therefore application is very extensive.
The light sensitivity principles of CMOS CISs are that incident ray is divided into the combination of several different wave length light, such as
Red, blue, green three colors, then respectively by multiple optical sensing elements on semiconductor base, such as light sensitive diode (photodiode)
Received, and convert it to different strong and weak data signals.However, with the micro of Pixel Dimensions, light sensitive diode
Size also follows microminiaturization so that being reduced across interference increase and luminous sensitivity between pixel.Therefore, how tool is provided
There is the low CIS across interference, still need persistently to solve the problems, such as industry.
The content of the invention
The invention provides a kind of CIS and preparation method thereof, and it utilizes and optical panel is set in CIS
Barrier layer, disturbed with improving crossing over for CIS.
According to one embodiment of the invention, the invention provides a kind of CIS, it includes a photo-sensitive cell, at least
One patterned conductive layer, at least once dielectric layer, at least an optical panel barrier layer and an at least upper dielectric layer.Photo-sensitive cell is set
In a substrate surface.Patterned conductive layer is arranged in substrate, and patterned conductive layer includes an at least intraconnections, is arranged at sense
The side of optical element.Lower dielectric layer is arranged in substrate and covers intraconnections, the lower dielectric layer of optical panel barrier layer covering, and upper dielectric
Layer covering optical panel barrier layer, the wherein refraction coefficient of optical panel barrier layer are more than the refraction coefficient of upper dielectric layer and lower dielectric layer.
According to one embodiment of the invention, the invention provides a kind of preparation method of CIS, it includes following
Step.One substrate is provided first, and a photo-sensitive cell is formed in substrate surface, then in forming a pattern conductive in substrate
Layer, and patterned conductive layer includes an at least intraconnections, is arranged at the side of photo-sensitive cell.Then, on patterned conductive layer
Dielectric layer is formed, its stepcoverage patterned conductive layer.Afterwards, an optical panel barrier layer and stepcoverage are formed in substrate
Lower dielectric layer, then forms a upper dielectric layer in substrate, and covers optical panel barrier layer, wherein the refraction coefficient of optical panel barrier layer
More than upper dielectric layer and the refraction coefficient of lower dielectric layer.
Brief description of the drawings
Fig. 1 to Fig. 7 depicts the manufacture craft schematic diagram of the first embodiment of CIS preparation method of the present invention；
Fig. 8 is the manufacturing process steps flow chart of the first embodiment of CIS preparation method of the present invention；
Fig. 9 is the opticpath schematic diagram of the first embodiment of CIS of the present invention；
Figure 10 is the close-up schematic view of region X in Fig. 9；
Figure 11 is the diagrammatic cross-section of the first alternate embodiment of the first embodiment of CIS of the present invention；
Figure 12 to Figure 13 depicts the manufacture craft signal of the preparation method of the second embodiment of CIS of the present invention
Figure；
Figure 14 is the diagrammatic cross-section of the alternate embodiment of the second embodiment of CIS of the present invention.
Symbol description
1A, 1B, 2A, 2B CIS
100 substrates
102 photo-sensitive cells
106 insulating barriers
112 intraconnections
114 interlayer dielectric layers
116 contact holes
118 times dielectric layers
120 optical panel barrier layer
144 interfaces
124 lateral parts
126 flats
128 upper dielectric layers
130 patterned mask layers
132 etching process
134 light guide tube openings
136 barrier layers
138 photoconductive tubes
140 chromatic filter layers
142 micro-optical collectors
144 isolation structures
L1, L2, L3 light
α angles
θ incidence angles
Embodiment
To enable the general technology person for being familiar with the technical field of the invention to be further understood that the present invention, hereafter spy enumerates
Presently preferred embodiments of the present invention, and coordinate appended diagram, describe CIS of the present invention and preparation method thereof and institute in detail
The effect of to be reached.
Fig. 1 to Fig. 8 is refer to, Fig. 1 to Fig. 7 depicts the system of the first embodiment of CIS preparation method of the present invention
Make process schematic representation, and Fig. 8 is the manufacturing process steps flow chart of the first embodiment of CIS preparation method of the present invention.
According to the present embodiment, as shown in figure 1, providing a substrate 100 first, wherein substrate 100 can be semiconductor base, for example, silicon substrate
Bottom, extension silicon base, silicon-Germanium base, silicon carbide substrate or insulating barrier cover silicon (silicon-on-insulator, SOI) substrate,
But it is not limited thereto.Then, multiple photo-sensitive cells 102 are formed on the surface of substrate 100.Photo-sensitive cell 102 includes various energy will
Luminous energy is converted into the element of electric energy.Such as photo-sensitive cell 102 may include PN types light sensitive diode, positive-negative-positive light sensitive diode, NPN
Type light sensitive diode etc..For example, the photo-sensitive cell 102 of the present embodiment can be positive-negative-positive light sensitive diode, its generation type example
P-type admixture and N-type admixture are such as injected separately into base by an ion implanting manufacture craft (ion implantation process)
Specific region in bottom 100 so that a p-type doped region is formed in a n-type doping area, and wherein n-type doping area is formed at a p-type
In substrate, but it is not limited.
Then, multiple grids (not illustrating) are formed selectively in substrate 100.It is photosensitive that grid can for example correspond to one respectively
Element 102 and formed, be arranged on corresponding to the side of photo-sensitive cell 102.The material of grid may include polysilicon (polysilicon)
Or metal material, but be not limited.For example, the grid of the present embodiment may be, for example, CIS 1A transfer gate
(transfer gate, Tx).In addition, a gate insulator (not illustrating) can be formed between grid and substrate 100, it is also optional
Multiple isolation structures 144, wherein isolation structure are formed before grid and gate insulator is formed prior to substrate 100 to selecting property
144 can be shallow isolating trough (shallow trench isolation, STI) or localized oxidation of silicon insulating barrier (local
Oxidation of silicon isolation layer, LOCOS), to avoid photo-sensitive cell 102 from connecting with other elements
Touch and short circuit occurs.It is noted that the present invention is not particularly limited photo-sensitive cell 102, grid and gate insulator and isolation junction
The production order of structure 144 is with being oppositely arranged position.
Then, insulating barrier 106 is formed in substrate 100 to cover grid.The material of the insulating barrier 106 of the present embodiment is two
Silica, but be not limited.The material of insulating barrier 106 can be the dielectric material (low-K of tool low-k
Dielectric material), for example, silica, boron phosphorus silicate glass (borophosphosilicate glass,
BPSG), phosphosilicate glass (phosphosilicate glass, PSG), fluorinated silicate glass (fluorinated
Silicate glass, FSG), the silica (carbon-doped silicon oxide) of doped carbon or the like.Insulating barrier
106 forming method is, for example, chemical vapor deposition (chemical vapor deposition, CVD) technology, but not as
Limit.Afterwards, make insulating barrier 106 that there is flat surface using a cmp (CMP) manufacture craft.Then, exhausted
A patterned conductive layer is formed in edge layer 106, the patterned conductive layer includes multiple intraconnections 112.For example, intraconnections
112 material can be aluminium (aluminum), copper (copper), the polysilicon (doped polysilicon) or the like of doping.
In addition, the sectional pattern of the intraconnections 112 of the present embodiment is trapezoidal, but it is not limited.
As shown in Fig. 2 then in forming interlayer dielectric layer 114 on the patterned conductive layer, it covers interior under it
Line 112 and photo-sensitive cell 102.The interlayer dielectric layer 114 of the present embodiment can be dielectric layer between metal layers (inter-metal
Dielectric layer), its material is exemplified as silica, but is not limited, and the material of interlayer dielectric layer 114 is alternatively
The dielectric material (low-K dielectric material) of other tool low-ks, such as the insulating barrier 106 that leading portion refers to
Material.The forming method of interlayer dielectric layer 114 is for example with CVD manufacture crafts collocation CMP manufacture crafts, but be not limited.
In the present embodiment, above-mentioned steps are repeated to be contiguously formed the interlayer dielectric layer 114 of multilayer and patterned conductive layer, and each layer
The intraconnections 112 of patterned conductive layer can form multiple layer inner connection line by the concatenation of contact hole 116 in each layer interlayer dielectric layer 114
(multilayer interconnect, MLI) structure.
Next referring to Fig. 3, dielectric layer 118 are formed on the patterned conductive layer of the superiors, wherein lower dielectric layer
The 118 stepcoverages patterned conductive layer, that is, lower dielectric layer 118 is understood the intraconnections 112 that covered with it and just risen and fallen.
Then, an optical panel barrier layer 120, and dielectric layer 118 under the stepcoverage of optical panel barrier layer 120 are formed on lower dielectric layer 118, with
The lower dielectric layer 118 covered and just rise and fall.Optical panel barrier layer 120 can be according to the material included by it with lower dielectric layer 118
And corresponding process for making is selected, such as chemical vapor deposition or physical vapour deposition (PVD) etc..Optical panel barrier layer 120 with
There is an interface, the patterned conductive layer covered with lower dielectric layer 118 and optical panel barrier layer 120 between lower dielectric layer 118
And height rises and falls, therefore interface includes multiple lateral parts 124 and multiple flats 126.Further, since the present embodiment is interior
The sectional pattern of line 112 is trapezoidal, therefore the lateral parts 124 at interface are inclined plane, its extension line and the surface of substrate 100
Or the top surface of the superiors' interlayer dielectric layer 114 has the angle α less than 90 degree.In addition, the refraction coefficient of optical panel barrier layer 120
More than the refraction coefficient of lower dielectric layer 118.For example, the material of the lower dielectric layer 118 of the present embodiment is silica, and it is rolled over
Coefficient is penetrated as 1.45, and the material of optical panel barrier layer 120 be silicon nitride (SiN), its refraction coefficient is 1.99, but not as
Limit.The material of lower dielectric layer 118 is also selected from the material included by above-mentioned insulating barrier 106.It is in the material of lower dielectric layer 118
In the case of silica, the material of optical panel barrier layer 120 is alternatively carborundum (refraction coefficient 2.6), (refraction coefficient is aluminium
2.7), silicon (refraction coefficient 3.44), tungsten (refraction coefficient 3.53) or other refraction coefficients are more than the material of silica.When
When selecting material as optical panel barrier layer 120 of silicon nitride or carborundum, its advantage is that these materials can be with cmos element
Other semiconductor fabrication process are integrated, and can save manufacture craft cost.
Then as shown in figure 4, forming a upper dielectric layer 128, the wherein folding of upper dielectric layer 128 in optical panel barrier layer 120
Penetrate the refraction coefficient that coefficient is less than optical panel barrier layer 120.According to the present embodiment, upper dielectric layer 128 preferably fills and leads up even more than light
The sunk part of barrier layer 120 is learned, such as the first upper dielectric layer 128 that one layer thicker is formed with CVD manufacture crafts completely covers light
Barrier layer 120 is learned, then by cmp manufacture craft to planarize the surface of upper dielectric layer 128.Upper Jie of the present embodiment
The material of electric layer 128 is silica, but is not limited.The material of upper dielectric layer 128 is also selected from above-mentioned insulating barrier 106
Included material.
As shown in figure 5, then in forming a patterned mask layer 130 on the surface of upper dielectric layer 128.The figure of the present embodiment
Case mask layer 130 has multiple openings to define the position of multiple light guide tube openings, and wherein patterned mask layer 130 is opened
The preferably corresponding photo-sensitive cell 102 of mouth is set.The patterned mask layer 130 of the present embodiment is exemplified as photo anti-corrosion agent material, but not
As limit.Then, an etching process 132 is carried out as etching mask using patterned mask layer 130, to remove portion
Point upper dielectric layer 128, optical panel barrier layer 120, lower dielectric layer 118 and its under interlayer dielectric layer 114, with each photo-sensitive cell
A light guide tube opening 134 is formed on 102.Then, patterned mask layer 130 is removed after light guide tube opening 134 is formed.
As shown in fig. 6, then optionally form a barrier layer in the bottom surface of light guide tube opening 134 and sidewall surfaces
136.The material of the barrier layer 136 of the present embodiment is silicon nitride, but is not limited.In other embodiments, barrier layer 136
Material may include silicon oxynitride or other suitable dielectric materials.Then, high index of refraction material is inserted in light guide tube opening 134
Material, with forming a photoconductive tube 138 on each photo-sensitive cell 102 respectively.The sectional pattern of the photoconductive tube 138 of the present embodiment is upper width
Under it is narrow, but be not limited.The refraction coefficient of the material of photoconductive tube 138 is preferably less than the refraction coefficient of the material of barrier layer 136,
The material of the photoconductive tube 138 of the present embodiment is photo anti-corrosion agent material or class photo anti-corrosion agent material, but is not limited.In shape
During into photoconductive tube 138, first high-index material can be filled and led up and exceed light guide tube opening 134, then pass through cmp system
Make the high-index material outside technique removal light guide tube opening 134, but be not limited.
As shown in fig. 7, then it is covered each by the chromatic filter layer 140 that multiple different colours are formed on upper dielectric layer 128
Corresponding photo-sensitive cell 102 and photoconductive tube 138.Chromatic filter layer 140 can for example including coloured photoresist pattern, and
Make, but be not limited using lithographic fabrication process.The color of chromatic filter layer 140 may include red, blueness or green,
So that photo-sensitive cell 102 can sense the light of particular color.Then, a micro-optical collector is formed on each chromatic filter layer 140
142, and cover the photo-sensitive cell 102 under it and photoconductive tube 138.
In summary, the method for making CIS 1A of the invention mainly includes the step shown in Fig. 8：
Step S10：One substrate is provided, and in forming photo-sensitive cell in substrate；
Step S12：A patterned conductive layer is formed in substrate, wherein patterned conductive layer includes an at least intraconnections,
It is electrically connected to photo-sensitive cell；
Step S14：Dielectric layer, stepcoverage patterned conductive layer are formed on patterned conductive layer；
Step S16：Form an optical panel barrier layer in substrate, dielectric layer under stepcoverage；And
Step S18：A upper dielectric layer is formed in substrate, covers the refraction system of optical panel barrier layer, wherein optical panel barrier layer
Number is more than the refraction coefficient of upper dielectric layer and lower dielectric layer.
Please continue to refer to Fig. 7, the CIS 1A of the present embodiment includes substrate 100, multiple photo-sensitive cells 102, at least
One patterned conductive layer, at least once dielectric layer 118, an optical panel barrier layer 120 and an at least upper dielectric layer 128.Wherein, feel
Optical element 102 is arranged at the surface of substrate 100, and patterned conductive layer is arranged in substrate 100, and patterned conductive layer is included at least
One intraconnections 112, it is arranged at the side of photo-sensitive cell 102.The intraconnections 112 of the present embodiment has trapezoidal sectional pattern.Need
It is noted that the CIS 1A of the present embodiment includes multi-layered patterned conductive layer and multilayer interlayer dielectric layer 114, wherein often
Covered with dielectric layer 114 between from level to level on one pattern layers conductive layer.The intraconnections 112 of each pattern layers conductive layer can be by each
The concatenation of contact hole 116 in layer interlayer dielectric layer 114 forms multi-layer internal connection line.In the CIS 1A of the present embodiment
In, the interlayer dielectric layer 114 of the superiors includes upper dielectric layer 128 and lower dielectric layer 118, and optical panel barrier layer 120 and lower dielectric
118 stepcoverage intraconnections 112 of layer, that is, optical panel barrier layer 120 and lower dielectric layer 118 with the intraconnections 112 covered and
Height rises and falls, that is, the interface between optical panel barrier layer 120 and lower dielectric layer 118 can be high with the intraconnections 112 covered
It is low to rise and fall and including multiple lateral parts 124 and multiple flats 126.Separately because the intraconnections 112 of the present embodiment has ladder
The sectional pattern of shape, therefore lateral parts 124 are respectively inclined plane, and lateral parts 124 have less than 90 with the surface of substrate 100
The angle α of degree.In addition, the refraction coefficient of optical panel barrier layer 120 is more than the refraction coefficient of upper dielectric layer 128 and lower dielectric layer 118.
In addition, CIS 1A can separately include reset transistor (reset transistor), source with transistor (source
Follower transistor) or selection transistor (read select transistor) is read, and may include three crystal
Manage (3T) and four transistors (4T) image element circuit.In order to highlight the present embodiment CIS 1A feature, said elements are not
Drawn in accompanying drawing.The other elements of CIS 1A of the present invention first embodiment refer to foregoing manufacture craft with material
Explanation, repeat no more.
Fig. 9 and Figure 10 are refer to, wherein Fig. 9 is the opticpath signal of the first embodiment of CIS of the present invention
Figure, and 10 figures are the close-up schematic view of region X in Fig. 9.The light of the present embodiment will be illustrated with light L1, L2, L3 below
Learn how barrier layer 120 reaches reduction across the effect of interference.Light L1 detailed conduct path refer to Figure 10, first, light
Line L1 is incident to optical panel barrier layer 120 via the chromatic filter layer 140 on right side from upper dielectric layer 128, and in optical panel barrier layer 120
Interface 144 between upper dielectric layer 128 reflects.Because the refraction coefficient of upper dielectric layer 128 is less than optical panel barrier layer 120
Refraction coefficient, therefore, according to snell law (Snell's law), light L1 can be continued in light with larger refraction angle
Learn and march to the interface lateral parts 124 between lower dielectric layer 118 in barrier layer 120 and there is an incidence angle θ.Due to this reality
The material for applying the lower dielectric layer 118 of example is silica (refraction coefficient 1.45), and the material of optical panel barrier layer 120 is nitridation
Silicon (refraction coefficient 1.99), therefore when light L1 is more than in optical panel barrier layer 120 and in the incidence angle θ of lateral parts 124
Can occur at 46 degree be totally reflected (total reflection) the lateral reflection so that light L1 turns right and it is right with it towards lower section
The photo-sensitive cell 102 answered advances, to avoid light L1 from advancing along former incident direction towards the adjacent photo-sensitive cell 102 in left side.
Please continue to refer to Fig. 9, the incidence angle of the light L2 in Fig. 9 is larger, after chromatic filter layer 140 towards left side
Adjacent photo-sensitive cell 102 is incident to the flat 126 of optical panel barrier layer 120 and the lower interface of dielectric layer 118, as long as but light
Line L2 incidence angle is more than the critical angle of total reflection, and light L2 can be through before being all-trans and shooting to direction in contrast to photo-sensitive cell 102
Enter, thus to avoid light L2 from advancing towards the adjacent photo-sensitive cell 102 in left side.On the other hand, light L3 is by colored filter
Injected after photosphere 140 in photoconductive tube 138, although advancing towards the adjacent photo-sensitive cell 102 in left side, be incident to barrier layer
During interface between 136 and interlayer dielectric layer 114, because the material of barrier layer 136 is silicon nitride, and interlayer dielectric layer 114
Material is silica, therefore light L3 incidence angle is easily larger than the critical angle of total reflection, and through corresponding to being all-trans and shooting to
The direction of photo-sensitive cell 102 is advanced, thus to avoid light L3 from advancing towards the adjacent photo-sensitive cell 102 in left side.
From the foregoing, due to being sequentially provided with lower dielectric on the intraconnections 112 of CIS 1A tops of the present invention
Layer 118, optical panel barrier layer 120 and upper dielectric layer 128, and by the refraction system for selecting to cause optical panel barrier layer 120 of material
Number is more than lower dielectric layer 118 and the refraction coefficient of upper dielectric layer 128, therefore light is marching to optical barrier layer 120 and lower Jie
It is easy to produce total reflection during interface between electric layer 118.In addition, in optical panel barrier layer 120 and the stepcoverage of lower dielectric layer 118
Line 112 so that the interface between optical panel barrier layer 120 and lower dielectric layer 118 has lateral parts 124 and flat 126,
Further such that the light of more different incident directions can be totally reflected.Therefore, in the case where the present invention designs, can effectively avoid
Originally adjacent photo-sensitive cell is not incident to it towards the light that corresponding photo-sensitive cell 102 advances across the region of intraconnections 112
102 and absorbed, and then can effectively improve CIS 1A leap interference problem.
CIS of the present invention and preparation method thereof is not limited with above-described embodiment.It will hereafter continue to disclose this hair
Bright other embodiments and alternate embodiment, so for the purpose of simplifying the description and the difference between each embodiment is highlighted, hereinafter used
Identical label marks similar elements, and no longer counterweight partly repeats again.
Figure 11 is refer to, it is the diagrammatic cross-section of the alternate embodiment of the first embodiment of CIS of the present invention.
As shown in figure 11, the sectional pattern that the difference of this alternate embodiment and first embodiment is in intraconnections 112 is rectangle, wherein
The side wall of intraconnections 112 is essentially perpendicular to the surface of substrate 100.Due between optical panel barrier layer 120 and lower dielectric layer 118
Interface is the intraconnections 112 with lower section and height rises and falls, therefore the lateral parts 124 at CIS 1B interface are generally
Perpendicular to the surface of substrate 100.
Figure 12 and Figure 13 are refer to, it is the manufacture craft of the preparation method of the second embodiment of CIS of the present invention
Schematic diagram, and Figure 13 illustrates the diagrammatic cross-section of the CIS of second embodiment of the invention, wherein in a second embodiment,
Figure 12 is the manufacture craft of hookup 1.As shown in figure 12, the present embodiment place different from first embodiment is, is insulating
After having made first layer intraconnections 112 on layer 106, i.e., prior to forming lower dielectric layer 118 on intraconnections 112, connect in stepcoverage
Line 112.Then the dielectric layer 118 under formation optical panel barrier layer 120 on lower dielectric layer 118, same stepcoverage, then then at light
Learn and the upper dielectric layer 128 with flat surfaces is formed on barrier layer 120, covering optical panel barrier layer 120 and lower dielectric layer 118, its
The refraction coefficient of middle optical panel barrier layer 120 is more than the refraction coefficient of upper dielectric layer 128 and lower dielectric layer 118.
As shown in figure 13, then in upper dielectric layer 128, lower dielectric layer 118 with forming multiple contact in optical panel barrier layer 120
Hole 116, then in forming another layer of intraconnections 112 on upper dielectric layer 128, and by each contact hole 116 to be electrically connected to lower floor
Intraconnections 112.Then it may be repeated the system of above-mentioned formation upper dielectric layer 128, optical panel barrier layer 120 and lower dielectric layer 118
Make technique and form contact hole 116 and the manufacture craft of intraconnections 112.In addition, the intraconnections 112 of each pattern layers conductive layer
Multiple layer inner connection line can be formed with the concatenation of contact hole 116 in optical panel barrier layer 120 by each upper dielectric layer 128, lower dielectric layer 118
Structure.Furthermore the upper dielectric layer 128 between upper and lower layer intraconnections 112 can be collectively treated as first embodiment with lower dielectric layer 118
In interlayer dielectric layer 114, in other words, the CIS 2A of the present embodiment includes multiple interlayer dielectric layers 114, wherein each layer
Between there is an optical panel barrier layer 120 in dielectric layer 114.After the upper dielectric layer 128 of the superiors has been made, photoconductive tube can be made again
134th, chromatic filter layer 140 and micro-optical collector 142, position, material and the production method of remaining element can in CIS 2A
With reference to first embodiment, therefore repeat no more.
Figure 14 is refer to, it is the diagrammatic cross-section of the alternate embodiment of the second embodiment of CIS of the present invention.
As shown in figure 14, this alternate embodiment place different from second embodiment is that the sectional pattern of intraconnections 112 is rectangle, its
The side wall of middle intraconnections 112 is essentially perpendicular to the surface of substrate 100.Due between optical panel barrier layer 120 and lower dielectric layer 118
Interface be intraconnections 112 with lower section and height rises and falls, therefore the lateral parts 124 at CIS 2B interface are substantially
On perpendicular to the surface of substrate 100.
In summary, the present invention is in setting at least an optical panel barrier layer, wherein optics on the photo-sensitive cell of CIS
Barrier layer is arranged between the upper dielectric layer of interlayer dielectric layer and lower dielectric layer, and causes optical barrier by the selection of material
The refraction coefficient of layer is more than the refraction coefficient of lower dielectric layer and upper dielectric layer, to provide bar of the incident ray compared with total reflection is also easy to produce
Part.In addition, optical panel barrier layer and lower dielectric layer stepcoverage intraconnections so that the interface between optical panel barrier layer and lower dielectric layer
With lateral parts and flat, further such that the light of more different incident directions can be totally reflected, thus keep away
The light for exempting from towards corresponding photo-sensitive cell not advance originally is absorbed by adjacent photo-sensitive cell, or even the light of deviation is anti-
It is emitted back towards in corresponding photo-sensitive cell, and then improves the leap interference problem of CIS, and improves light receiving efficiency simultaneously.
Presently preferred embodiments of the present invention is the foregoing is only, all equivalent changes done according to the claims in the present invention are with repairing
Decorations, it should all belong to the covering scope of the present invention.
Claims (19)
1. a kind of CIS, including：
Photo-sensitive cell, it is arranged at a substrate surface；
An at least patterned conductive layer, it is arranged in the substrate, the patterned conductive layer includes an at least intraconnections
(interconnect), it is arranged at the side of the photo-sensitive cell；
At least once dielectric layer, is arranged in the substrate and covers the intraconnections；
An at least optical panel barrier layer, cover the lower dielectric layer；And
An at least upper dielectric layer, the optical panel barrier layer is covered, the wherein refraction coefficient of the optical panel barrier layer is more than the upper dielectric layer
With the refraction coefficient of the lower dielectric layer.
2. CIS as claimed in claim 1, wherein the optical panel barrier layer and the lower dielectric layer stepcoverage this interior connect
Line, and there is an interface between the optical panel barrier layer and the lower dielectric layer, the interface is with the lower dielectric layer and the optical barrier
The intraconnections that is covered of layer and height rises and falls and including multiple lateral parts and multiple flats.
3. CIS as claimed in claim 2, wherein the plurality of lateral parts are essentially perpendicular to the surface of the substrate.
4. CIS as claimed in claim 2, wherein the plurality of lateral parts are respectively an inclined plane, and with the substrate
Surface has the angle less than 90 degree.
5. CIS as claimed in claim 1, it includes multi-layered patterned conductive layer and is sequentially arranged in the substrate, respectively
The pattern layers conductive layer includes an at least intraconnections, and the intraconnections of the optical panel barrier layer covering the superiors respectively.
6. CIS as claimed in claim 1, it includes multi-layered patterned conductive layer and is sequentially arranged in the substrate, and
Respectively the surface of the pattern layers conductive layer is from bottom to top sequentially provided with the lower dielectric layer, the optical panel barrier layer and dielectric on this
Layer, each optical panel barrier layer is set to be covered each by the intraconnections of the respectively pattern layers conductive layer.
7. CIS as claimed in claim 1, separately includes：
Chromatic filter layer, it is arranged on the upper dielectric layer, and covers the photo-sensitive cell；And
Micro-optical collector, it is arranged on the chromatic filter layer, and covers the photo-sensitive cell.
8. CIS as claimed in claim 1, separately including photoconductive tube (light pipe), it is arranged on the photo-sensitive cell
And in the lower dielectric layer, the optical panel barrier layer and the upper dielectric layer.
9. the material of CIS as claimed in claim 1, the wherein upper dielectric layer and the lower dielectric layer includes two respectively
Silica.
10. CIS as claimed in claim 1, the wherein material of the optical panel barrier layer include silicon nitride, carborundum,
Aluminium, silicon or tungsten.
11. a kind of preparation method of CIS, including：
One substrate is provided, and a photo-sensitive cell is formed in the substrate surface；
A patterned conductive layer is formed on this substrate, and the patterned conductive layer includes an at least intraconnections, and it is photosensitive to be arranged at this
The side of element；
Dielectric layer, the stepcoverage patterned conductive layer are formed on the patterned conductive layer；
An optical panel barrier layer, the stepcoverage lower dielectric layer are formed on this substrate；And
A upper dielectric layer is formed on this substrate, covers the optical panel barrier layer, and the refraction coefficient of the wherein optical panel barrier layer is more than
The refraction coefficient of the upper dielectric layer and the lower dielectric layer.
It is more that 12. the preparation method of CIS as claimed in claim 11, wherein this method are included in formation in the substrate
Pattern layers conductive layer, and the patterned conductive layer of the optical panel barrier layer stepcoverage the superiors.
It is more that 13. the preparation method of CIS as claimed in claim 11, wherein this method are included in formation in the substrate
Pattern layers conductive layer, and sequentially form dielectric layer, an optical barrier respectively on the surface of the respectively pattern layers conductive layer
Layer and a upper dielectric layer, respectively each pattern layers conductive layer of optical panel barrier layer difference stepcoverage.
14. the preparation method of CIS as claimed in claim 11, wherein the optical panel barrier layer and the lower dielectric layer it
Between there is an interface, the interface with the patterned conductive layer that the lower dielectric layer and the optical panel barrier layer are covered and height rises
Lie prostrate and including multiple lateral parts and multiple flats.
15. the preparation method of CIS as claimed in claim 11, separately includes：
The part upper dielectric layer, the lower dielectric layer and the optical panel barrier layer are removed, with forming a photoconductive tube on the photo-sensitive cell
Opening；And
High-index material is inserted in the light guide tube opening, with forming a photoconductive tube on the photo-sensitive cell.
16. the preparation method of CIS as claimed in claim 15, separately it is included in before inserting high-index material first
A barrier layer is formed in the light guide tube opening.
17. the preparation method of CIS as claimed in claim 11, separately includes：
A chromatic filter layer is formed on the upper dielectric layer, and covers the photo-sensitive cell；And
A micro-optical collector is formed on the chromatic filter layer, and covers the photo-sensitive cell.
18. the preparation method of CIS as claimed in claim 11, the wherein upper dielectric layer and the material of the lower dielectric layer
Material includes silica respectively.
19. the preparation method of CIS as claimed in claim 11, the wherein material of the optical panel barrier layer include nitridation
Silicon, carborundum, aluminium, silicon or tungsten.
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| US11121162B2 (en) * | 2019-05-07 | 2021-09-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Light pipe structure with high quantum efficiency |
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| CN101908550A (en) * | 2009-06-04 | 2010-12-08 | 索尼公司 | Solid-state image pickup element, its manufacture method and the electronic equipment that uses it |
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| JP5076679B2 (en) * | 2007-06-28 | 2012-11-21 | ソニー株式会社 | Solid-state imaging device and camera module |
| JP5241902B2 (en) * | 2011-02-09 | 2013-07-17 | キヤノン株式会社 | Manufacturing method of semiconductor device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107958913A (en) * | 2016-10-14 | 2018-04-24 | 力晶科技股份有限公司 | Image sensor and manufacturing method thereof |
| CN107958913B (en) * | 2016-10-14 | 2020-02-07 | 力晶积成电子制造股份有限公司 | Image sensor and manufacturing method thereof |
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