CN107731891A - A kind of groove Schottky semiconductor device - Google Patents
A kind of groove Schottky semiconductor device Download PDFInfo
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- CN107731891A CN107731891A CN201610664757.XA CN201610664757A CN107731891A CN 107731891 A CN107731891 A CN 107731891A CN 201610664757 A CN201610664757 A CN 201610664757A CN 107731891 A CN107731891 A CN 107731891A
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- groove
- drift layer
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- schottky
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 81
- 239000000463 material Substances 0.000 claims abstract description 53
- 239000004020 conductor Substances 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims description 46
- 239000011810 insulating material Substances 0.000 claims description 45
- 230000004888 barrier function Effects 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000012774 insulation material Substances 0.000 claims description 15
- 239000007772 electrode material Substances 0.000 claims description 5
- -1 which includes Substances 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 30
- 230000001413 cellular effect Effects 0.000 description 30
- 239000002210 silicon-based material Substances 0.000 description 23
- 239000000377 silicon dioxide Substances 0.000 description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 14
- 230000000903 blocking effect Effects 0.000 description 9
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 7
- 229910052796 boron Inorganic materials 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 6
- 239000001301 oxygen Substances 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 238000010276 construction Methods 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- 238000000926 separation method Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 239000002305 electric material Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Abstract
The invention discloses a kind of groove Schottky semiconductor device, for Schottky rectifying device, inversion regime is set in drift layer, inversion regime material is alternately arranged with drift layer material, conductive material of the inversion regime away from flute surfaces is set simultaneously, extreme value electric field quantity under reverse biased is increased in drift layer with this, improves the electrical property of schottky device.
Description
Technical field
The present invention relates to a kind of trench schottky device.
Background technology
Schottky device because of it there is low unlatching pressure drop and high-speed switch characteristic to be widely used, it has also become rectifying device is sent out
The important trend of exhibition；Schottky device also has the shortcomings that reverse blocking pressure drop is low and leakage current is big, and application is restricted.
It is used for the reverse blocking voltage for improving Schottky there has been proposed new construction, a kind of new construction is in schottky device table
Face introduces P-type conduction material, improves the reverse BV and leakage current characteristic of device, while also in device forward conduction
Few son is introduced, reduces the switch performance of device；Second class new construction introduces MIS structure in device surface, by the way that surface is electric
Inside gesture introduction means, the pressure drop of device reverse blocking or conducting resistance are improved with this, the method in device because setting insulation
Material so that the reliability of device is affected；3rd class new construction introduces P-type conduction material in device, changes drift with this
Area's electric field is moved, improves the reverse BV of device, because needing multiple extension manufacturing process, brings the manufacturing process of device complicated
The problem of greatly being raised with manufacturing cost.
The content of the invention
The present invention proposes for above-mentioned one or more problems, there is provided a kind of trench schottky device.
A kind of groove Schottky semiconductor device, including substrate layer, it is semi-conducting material；Drift layer, positioned at substrate layer it
On, it is the first conducting semiconductor material；Multiple grooves, in drift layer, bottom sets heavy insulation material in groove, in groove
Upper portion side wall sets insulating materials, groove internal upper part filling conductive material, and conductive material includes partly leading for metal or doped polycrystalline
Body material, conductive material is connected with surface electrode material in groove, and the second conductive semiconductor material is set in channel bottom drift layer
Material；Schottky barrier junction, positioned at drift layer surface.Bottom sets the thickness of heavy insulation material to be more than drift layer in described groove
The a quarter of thickness；The second conducting semiconductor material set in described channel bottom drift layer includes abutting against substrate layer.
Above-mentioned device sets surface electrode metal, connects conductive material and schottky barrier junction in groove.
A kind of groove Schottky semiconductor device, including substrate layer, it is semi-conducting material；Drift layer, positioned at substrate layer it
On, it is the first conducting semiconductor material；Multiple grooves, in drift layer, trenched side-wall sets insulating materials, groove internal upper part
Conductive material is filled, it is metal or doped polycrystalline semi-conducting material that conductive material, which includes, conductive material and surface electrode in groove
Material connects, and bottom sets semi insulating material in groove, and the second conducting semiconductor material, groove are set in channel bottom drift layer
Interior bottom sets semi insulating material to connect the second conductive semiconductor material in groove internal upper part conductive material and channel bottom drift layer
Material；Schottky barrier junction, positioned at drift layer surface；Bottom sets the thickness of semi insulating material to be more than drift layer in described groove
The a quarter of thickness；The second conducting semiconductor material set in described channel bottom drift layer includes abutting against substrate layer；
Described semi insulating material is included to mix oxygen polysilicon, semi-conducting material, persilicic nitride or wide bandgap semiconductor being lightly doped
Material；It is U-shaped, U-shaped interior under-filled insulating materials that described semi insulating material, which includes, and U-shaped internal upper part fills conductive material.On
State device and surface electrode metal is set, connect conductive material and schottky barrier junction in groove.
A kind of groove Schottky semiconductor device, including substrate layer, it is semi-conducting material；Cushion, positioned at substrate layer it
On, it is the first conducting semiconductor material；Drift layer, it is the first conducting semiconductor material on cushion；Multiple grooves,
In drift layer, trench wall sets insulating materials, conductive material is filled in groove, it is metal or doping that conductive material, which includes,
Polycrystalline semiconductor material, conductive material is connected with surface electrode material in groove；Multiple inversion regimes, in cushion, for the
Two conducting semiconductor materials, be alternately arranged with the first conducting semiconductor material on parallel substrate layer direction, inversion regime material with
Groove is not attached to；Schottky barrier junction, positioned at drift layer surface；The distance of conductive material and inversion regime is more than in described groove
The a quarter of drift layer and buffer layer thickness sum；The described conducting semiconductor material of inversion regime second includes abutting against substrate
Layer.Above-mentioned device sets surface electrode metal, connects conductive material and schottky barrier junction in groove.
A kind of groove Schottky semiconductor device, including substrate layer, it is semi-conducting material；Drift layer, positioned at substrate layer it
On, it is the first conducting semiconductor material；Multiple grooves, in drift layer, insulating materials is set, or sets groove in groove
Side wall insulating material wraps up semi insulating material；Multiple inversion regimes, positioned at channel bottom, substrate layer is abutted against, partly led for the second conduction
Body material；Schottky barrier junction, positioned at drift layer surface.Wherein described semi insulating material is included to be U-shaped, and U-shaped interior filling is exhausted
Edge material, trench schottky cellular of the present invention include being arranged to terminal structure simultaneously, and layer surface of now drifting about sets insulating materials
Covering.
Brief description of the drawings
Fig. 1 is a kind of trench schottky cellular diagrammatic cross-section of the present invention.
Fig. 2 is the trench schottky cellular diagrammatic cross-section of the present invention.
Fig. 3 is a kind of more insulator separation trench schottky cellular diagrammatic cross-sections of the present invention.
Fig. 4 is more insulator separation trench schottky cellular diagrammatic cross-sections of the present invention.
One kind that Fig. 5 is the present invention has semi insulating material trench schottky cellular diagrammatic cross-section.
Fig. 6 has semi insulating material trench schottky cellular diagrammatic cross-section for the present invention's.
Fig. 7 has semi insulating material trench schottky cellular diagrammatic cross-section for the present invention's.
Fig. 8 has semi insulating material trench schottky cellular diagrammatic cross-section for the present invention's.
One kind that Fig. 9 is the present invention has cushion trench schottky cellular diagrammatic cross-section.
Figure 10 has cushion trench schottky cellular diagrammatic cross-section for the present invention's.
Figure 11 has cushion trench schottky cellular diagrammatic cross-section for the present invention's.
Figure 12 has cushion trench schottky cellular diagrammatic cross-section for the present invention's.
Figure 13 is the trench schottky cellular diagrammatic cross-section of the present invention.
Figure 14 is the semi insulating material trench schottky cellular diagrammatic cross-section of the present invention.
Wherein, 1, substrate layer；2nd, drift layer；3rd, cushion；4th, inversion regime；5th, insulating materials；6th, conductive material；7th, half absolutely
Edge material；8 schottky barrier junctions；9 silicon nitrides.
Embodiment
Fig. 1 is a kind of trench schottky cellular diagrammatic cross-section of the present invention, including：Substrate layer 1, it is N conduction types half
Conductor silicon materials, drift layer 2, it is the semiconductor silicon material of N conduction types on substrate layer 1, thickness is 10 microns；Xiao
Special base barrier junction 8, on drift layer 2；Gash depth is 8 microns, and groove inner bottom part sets 4 micron heavy insulation materials
Silica 5, groove upper portion side wall set insulating materials silica, and groove internal upper part fills conductive material DOPOS doped polycrystalline silicon 6,
Inversion regime 4 is set in channel bottom drift layer, is Boron doped semiconductor silicon materials, inversion regime 4 abuts against substrate layer.Above and below this example
Electrode metal can be set in surface, and upper surface electrode metal connects conductive material 6 in schottky barrier junction 8 and groove.Fig. 3 is this hair
A kind of bright more insulator separation trench schottky cellular diagrammatic cross-sections, are on the basis of Fig. 1 structures, by groove inner bottom part
Set what heavy insulation materials silicon dioxide 5 replaced with silica 5 and silicon nitride 9 to be superimposed insulating materials.Examples detailed above pass through by
Inversion regime is arranged at channel bottom and abuts against substrate layer, and sets groove inner bottom part heavy insulation material, is set in drift layer multiple
Peak value electric field under reverse biased, the reverse blocking voltage or forward conduction ability of device are improved, improving device reverse breakdown can
By property.
Fig. 2 is the trench schottky cellular diagrammatic cross-section of the present invention, including：Substrate layer 1, it is N conductive type semiconductors
Silicon materials, drift layer 2, it is the semiconductor silicon material of N conduction types on substrate layer 1, thickness is 10 microns；Schottky
Barrier junction 8, on drift layer 2；Gash depth is 6 microns, and groove inner bottom part sets 4 micron heavy insulation material dioxies
SiClx 5, groove upper portion side wall set insulating materials silica, groove internal upper part filling conductive material DOPOS doped polycrystalline silicon 6, groove
Inversion regime 4 is set in the drift layer of bottom, is Boron doped semiconductor silicon materials, the thickness of inversion regime 4 is 2 microns；Float the bottom of inversion regime 4
It is 2 microns to move the thickness of layer 2.Electrode metal, upper surface electrode metal connection schottky barrier junction 8 can be set in this example upper and lower surface
With conductive material 6 in groove.Fig. 4 is more insulator separation trench schottky cellular diagrammatic cross-sections of the present invention, is in Fig. 2 knots
On the basis of structure, heavy insulation materials silicon dioxide 5 is set to replace with being superimposed for silica 5 and silicon nitride 9 groove inner bottom part
Insulating materials.Examples detailed above sets groove inner bottom part heavy insulation material by the way that inversion regime is arranged at into channel bottom, is drifting about
Peak value electric field under multiple reverses biased is set in layer, improves the reverse blocking voltage or forward conduction ability of device, is reduced anti-
Leakage current under bias.
One kind that Fig. 5 is the present invention has semi insulating material trench schottky cellular diagrammatic cross-section, including：Substrate layer 1,
Drift layer 2, it is the semiconductor silicon material of N conduction types on substrate layer 1 for N conductive type semiconductor silicon materials, it is thick
Spend for 10 microns；Schottky barrier junction 8, on drift layer 2；Gash depth is 8 microns, and trenched side-wall sets insulation material
Material 5, material being superimposed with silicon nitride for silica or silica, groove inner bottom part sets the semi insulating material 7 of 4 microns,
To mix oxygen polysilicon or monocrystalline silicon being lightly doped, groove internal upper part filling conductive material DOPOS doped polycrystalline silicon 6, in channel bottom drift layer
Inversion regime 4 is set, is Boron doped semiconductor silicon materials, inversion regime 4 abuts against substrate layer.Electrode gold can be set in this example upper and lower surface
Category, upper surface electrode metal connect conductive material 6 in schottky barrier junction 8 and groove.Fig. 6 has semi-insulating material for the present invention's
Expect trench schottky cellular diagrammatic cross-section, be on the basis of Fig. 5 structures, trench wall is provided with semi insulating material 7, is
Mix oxygen polysilicon or monocrystalline silicon is lightly doped, groove inner bottom part sets thick silicon nitride 9, and groove internal upper part is provided with 4 micron thickness
Conductive material DOPOS doped polycrystalline silicon 6.Examples detailed above abuts against substrate layer by the way that inversion regime is arranged at into channel bottom, and setting half is exhausted
Edge layer material connects conductive material 6 and inversion regime 4, improves the reverse blocking voltage of device, improves device reverse breakdown reliability.
One kind that Fig. 7 is the present invention has semi insulating material trench schottky cellular diagrammatic cross-section, including：Substrate layer 1,
Drift layer 2, it is the semiconductor silicon material of N conduction types on substrate layer 1 for N conductive type semiconductor silicon materials, it is thick
Spend for 10 microns；Schottky barrier junction 8, on drift layer 2；Gash depth is 6 microns, and trenched side-wall sets insulation material
Material 5, material being superimposed with silicon nitride for silica or silica, groove inner bottom part sets the semi insulating material 7 of 4 microns,
To mix oxygen polysilicon or monocrystalline silicon being lightly doped, groove internal upper part filling conductive material DOPOS doped polycrystalline silicon 6, in channel bottom drift layer
Inversion regime 4 is set, is Boron doped semiconductor silicon materials, the bottom drift layer thickness of inversion regime 4 is 2 microns.This example upper and lower surface
Settable electrode metal, upper surface electrode metal connect conductive material 6 in schottky barrier junction 8 and groove.Fig. 8 is of the invention
One kind has semi insulating material trench schottky cellular diagrammatic cross-section, is on the basis of Fig. 7 structures, trench wall is set
Semi insulating material 7, to mix oxygen polysilicon or monocrystalline silicon is lightly doped, groove inner bottom part sets thick silicon nitride 9, and groove internal upper part is set
The conductive material DOPOS doped polycrystalline silicon 6 of 2 micron thickness is put.Examples detailed above between inversion regime 6 and conductive material 6 by will be provided with
Thick semi insulating material layer, improve the reverse blocking voltage of device.
One kind that Fig. 9 is the present invention has cushion trench schottky cellular diagrammatic cross-section, including：Substrate layer 1, it is N
Conductive type semiconductor silicon materials, cushion 3 are located on substrate layer 1, for the semiconductor silicon material of N conduction types, thickness 4
Micron, inversion regime 4 is set in the cushion 3 of lower trench, is Boron doped semiconductor silicon materials, the lower buffer thickness of inversion regime 4
Spend for 2 microns；Drift layer 2, it is the semiconductor silicon material of N conduction types on cushion 2, thickness is 6 microns；Xiao Te
Base barrier junction 8, on drift layer 2；Gash depth is 4 microns, and it is silica that trench wall, which sets insulating materials 5,
Thickness is 1 micron, and conductive material DOPOS doped polycrystalline silicon 6 is filled in groove, and channel bottom sets 2 micron drift layers.This example
Electrode metal can be set in upper and lower surface, and upper surface electrode metal connects conductive material 6 in schottky barrier junction 8 and groove.Figure 11
For the present invention there is cushion trench schottky cellular diagrammatic cross-section, be on the basis of Fig. 9 structures, will in cushion instead
Type area 4 is arranged to intersect with groove in the orientation that device surface projects.Examples detailed above passes through in cushion and drift layer
Multiple reverse biased peak value electric fields are set, improve the reverse blocking voltage of device.
Figure 10 is that the present invention has a cushion trench schottky cellular diagrammatic cross-section, including：Substrate layer 1, it is N conductive
Type semiconductor silicon materials, cushion 3 are located on substrate layer 1, are the semiconductor silicon material of N conduction types, and thickness is 2 micro-
Meter, inversion regime 4 is set in the cushion 3 of lower trench, is Boron doped semiconductor silicon materials, inversion regime 4 is connected with substrate layer；Drift
Layer 2 is moved, is the semiconductor silicon material of N conduction types on cushion 2, thickness is 8 microns；Schottky barrier junction 8, position
On drift layer 2；Gash depth is 5 microns, and it is silica that trench wall, which sets insulating materials 5, fills and leads in groove
Electric material DOPOS doped polycrystalline silicon 6, channel bottom set 3 micron drift layers.Electrode metal, upper table can be set in this example upper and lower surface
Conductive material 6 in face electrode metal connection schottky barrier junction 8 and groove.Figure 12 has cushion groove Xiao Te for the present invention's
Primitive born of the same parents' diagrammatic cross-section, it is on the basis of Figure 10 structures, inversion regime in cushion 4 and groove is projected in device surface
Orientation is arranged to intersect.Examples detailed above is carried by setting multiple reverse biased peak value electric fields in cushion and drift layer
The reverse blocking voltage of high device.
Figure 13 is the trench schottky cellular diagrammatic cross-section of the present invention, including：Substrate layer 1, it is N conductive type semiconductors
Silicon materials, drift layer 2, it is the semiconductor silicon material of N conduction types on substrate layer, thickness is 5 microns；Schottky gesture
Knot 8 is built, on drift layer 2；Gash depth is 4 microns, and it is silica that insulating materials 5 is set in groove, trench bottom
Portion sets inversion regime 4, is Boron doped semiconductor silicon materials, inversion regime 4 is connected with substrate layer.The settable electricity of this example upper and lower surface
Pole metal, the cellular of this example can be used as device terminal structure, and terminal structure cellular drift layer surface sets insulation material layer.Figure
14 examples are semi insulating material trench schottky cellular diagrammatic cross-section, and on Figure 13 architecture basics, half is provided with groove
Insulating materials 7 mixes oxygen polysilicon, and trenched side-wall sets insulating materials silica.Examples detailed above in drift layer bottom by setting
Inversion regime, improve the conductive capability of device.
The present invention is elaborated by examples detailed above, while other examples can also be used to realize the present invention, not office of the invention
It is limited to above-mentioned instantiation, therefore the present invention is limited by scope.
Claims (10)
- A kind of 1. groove Schottky semiconductor device, it is characterised in that：Including：Substrate layer, it is semi-conducting material；Drift layer, it is the first conducting semiconductor material on substrate layer；Multiple grooves, in drift layer, bottom sets heavy insulation material in groove, and groove internal upper part side wall sets insulation material Material, groove internal upper part filling conductive material, it is metal or doped polycrystalline semi-conducting material that conductive material, which includes, conduction material in groove Material is connected with surface electrode material, and the conducting semiconductor material of inversion regime second is set in channel bottom drift layer；Schottky barrier junction, positioned at drift layer surface.
- 2. semiconductor device as claimed in claim 1, it is characterised in that：Bottom sets heavy insulation material in described groove Thickness is more than a quarter of drift layer thickness.
- 3. semiconductor device as claimed in claim 1, it is characterised in that：Second set in described channel bottom drift layer Conducting semiconductor material includes abutting against substrate layer.
- A kind of 4. groove Schottky semiconductor device, it is characterised in that：Including：Substrate layer, it is semi-conducting material；Drift layer, it is the first conducting semiconductor material on substrate layer；Multiple grooves, in drift layer, trenched side-wall sets insulating materials, groove internal upper part filling conductive material, conduction material It is metal or doped polycrystalline semi-conducting material that material, which includes, and conductive material is connected with surface electrode material in groove, bottom in groove Semi insulating material is set, the conducting semiconductor material of inversion regime second is set in channel bottom drift layer, bottom sets half in groove Insulating materials connects the second conducting semiconductor material in groove internal upper part conductive material and channel bottom drift layer；Schottky barrier junction, positioned at drift layer surface.
- 5. semiconductor device as claimed in claim 4, it is characterised in that：Bottom sets semi insulating material in described groove Thickness is more than a quarter of drift layer thickness.
- 6. semiconductor device as claimed in claim 4, it is characterised in that：Second set in described channel bottom drift layer Conducting semiconductor material includes abutting against substrate layer.
- A kind of 7. groove Schottky semiconductor device, it is characterised in that：Including：Substrate layer, it is semi-conducting material；Cushion, it is the first conducting semiconductor material on substrate layer；Drift layer, it is the first conducting semiconductor material on cushion；Multiple grooves, in drift layer, trench wall sets insulating materials, and conductive material, conductive material bag are filled in groove Include as metal or doped polycrystalline semi-conducting material, conductive material is connected with surface electrode material in groove；Multiple inversion regimes, it is the second conducting semiconductor material, with the first conducting semiconductor material in parallel lining in cushion Bottom is alternately arranged on direction, and inversion regime material is not attached to groove；Schottky barrier junction, positioned at drift layer surface.
- 8. semiconductor device as claimed in claim 7, it is characterised in that：In described groove conductive material and inversion regime away from From a quarter more than drift layer and buffer layer thickness sum.
- 9. semiconductor device as claimed in claim 7, it is characterised in that：Described inversion regime the second conducting semiconductor material bag Include and abut against substrate layer.
- A kind of 10. groove Schottky semiconductor device, it is characterised in that：Including：Substrate layer, it is semi-conducting material；Drift layer, it is the first conducting semiconductor material on substrate layer；Multiple grooves, in drift layer, insulating materials is set in groove, or sets trenched side-wall wrapped with insulation half exhausted Edge material；Multiple inversion regimes, positioned at channel bottom, substrate layer is abutted against, be the second conducting semiconductor material；Schottky barrier junction, positioned at drift layer surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610664757.XA CN107731891A (en) | 2016-08-14 | 2016-08-14 | A kind of groove Schottky semiconductor device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610664757.XA CN107731891A (en) | 2016-08-14 | 2016-08-14 | A kind of groove Schottky semiconductor device |
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| CN107731891A true CN107731891A (en) | 2018-02-23 |
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| CN201610664757.XA Withdrawn CN107731891A (en) | 2016-08-14 | 2016-08-14 | A kind of groove Schottky semiconductor device |
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| JP2006210392A (en) * | 2005-01-25 | 2006-08-10 | Toyota Motor Corp | Semiconductor device and manufacturing method thereof |
| CN101221989A (en) * | 2007-01-11 | 2008-07-16 | 株式会社东芝 | SiC schottky barrier semiconductor device |
| CN101366124A (en) * | 2005-12-27 | 2009-02-11 | 美商科斯德半导体股份有限公司 | Ultrafast recovery diode |
| CN101901807A (en) * | 2010-06-23 | 2010-12-01 | 苏州硅能半导体科技股份有限公司 | Channel schottky barrier diode rectifying device and manufacturing method |
| US20110084353A1 (en) * | 2009-10-12 | 2011-04-14 | Pfc Device Corporation | Trench schottky rectifier device and method for manufacturing the same |
| CN104037237A (en) * | 2014-04-21 | 2014-09-10 | 西安电子科技大学 | Grooved floating junction silicon carbide SBD (Schottky Barrier Diode) device with annular massive buried layer |
| US9059147B1 (en) * | 2014-03-22 | 2015-06-16 | Alpha And Omega Semiconductor Incorporated | Junction barrier schottky (JBS) with floating islands |
-
2016
- 2016-08-14 CN CN201610664757.XA patent/CN107731891A/en not_active Withdrawn
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006210392A (en) * | 2005-01-25 | 2006-08-10 | Toyota Motor Corp | Semiconductor device and manufacturing method thereof |
| CN101366124A (en) * | 2005-12-27 | 2009-02-11 | 美商科斯德半导体股份有限公司 | Ultrafast recovery diode |
| CN101221989A (en) * | 2007-01-11 | 2008-07-16 | 株式会社东芝 | SiC schottky barrier semiconductor device |
| US20110084353A1 (en) * | 2009-10-12 | 2011-04-14 | Pfc Device Corporation | Trench schottky rectifier device and method for manufacturing the same |
| CN101901807A (en) * | 2010-06-23 | 2010-12-01 | 苏州硅能半导体科技股份有限公司 | Channel schottky barrier diode rectifying device and manufacturing method |
| US9059147B1 (en) * | 2014-03-22 | 2015-06-16 | Alpha And Omega Semiconductor Incorporated | Junction barrier schottky (JBS) with floating islands |
| CN104037237A (en) * | 2014-04-21 | 2014-09-10 | 西安电子科技大学 | Grooved floating junction silicon carbide SBD (Schottky Barrier Diode) device with annular massive buried layer |
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