CN107729029A - Method and apparatus for run memory - Google Patents
Method and apparatus for run memory Download PDFInfo
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- CN107729029A CN107729029A CN201710675197.2A CN201710675197A CN107729029A CN 107729029 A CN107729029 A CN 107729029A CN 201710675197 A CN201710675197 A CN 201710675197A CN 107729029 A CN107729029 A CN 107729029A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/61—Installation
- G06F8/63—Image based installation; Cloning; Build to order
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- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Combined Controls Of Internal Combustion Engines (AREA)
- Read Only Memory (AREA)
Abstract
The present invention relates to the method and apparatus for run memory.There is first module array for running(21)With second unit array(22)Memory(24)Method(10), it is characterised in that following characteristics:In the starting stage(11)In, when in the memory(24)When middle the first stored program is carried out, the cell array is run in a differential manner(21、22), in programming phases(12)In, when first program is from the first module array(21)It is carried out and the second program is programmed into the second unit array(22)When middle, the cell array is run in a manner of asymmetric(21、22), and in transition stage(13)In selectively implement come from the first module array(21)First program or from the second unit array(22)Second program.
Description
Technical field
The present invention relates to the method for run memory.In addition, the present invention relates to corresponding device, corresponding meter
Calculation machine program and corresponding storage medium.
Background technology
Non-volatile electronic memory module is as Electrically Erasable Read Only Memory(electrically
erasable programmable read-only memory, EEPROM)It is known for professional, wherein described
The content of non-volatile electronic memory module can be with electrically erasable.In the range of embodiments below, term " EEPROM " is herein
Used and similarly included in addition to traditional EEPROM newer with the wide in range meaning of a word(It is capable of block-by-block erasing)
So-called flash memory.In order to realize non-volatile memories in the case of small energy expenditure, according to prior art
These flash EEPROM memories are preferentially used in vehicle electronics, in the case of the flash EEPROM memory
The information deposited in each memory cell is stored in conductor insulator semiconductor fet in the form of a charge
(metal insulator semiconductor field-effect transistor, MISFET)Floating boom on or electric charge
Capture in memory element.In principle, memory cell is disposed in so-called cell array as matrix in the case(cell
array)In, wherein address wire is used for the column or row of select storage unit via a coordinate and data wire is with another coordinate
Lead to memory cell.In addition newer flexible program be present, from different cell arrays in the flexible program
(Zellfelder)The signals of two units differentially transmitted, finally represent individual bit.Such flash memory
Characteristic is its high interference tolerance limit because possible physical influence two cell arrays are worked in much the same way and
Therefore the single interference in the case where forming difference via two unit voltages is substantially cancelled out each other.
EP0956561B1 is disclosed for the storing multi-bit in the difference flash memory cell of flash memory cell arrays
According to(Mehrbit-Daten)Method, the flash memory cell has have the memory transistor of floating boom accordingly respectively, described
Method, which is included on the floating boom of memory transistor, stores electric charge, to change and can measure the drain current of the memory transistor
Numerical value, wherein the numerical value of the change of the drain current has a values below, described value is corresponding with one of multiple possible values simultaneously
And the multi-bit data to be stored in flash memory cell is represented, and methods described has balanced step before storing step
Suddenly, the conducting state of memory transistor is made by the equalization step(Leitfähigkeitszustand)With memory cell
The conducting state of corresponding reference transistor is substantially the same so that the conducting state of reference transistor is in the follow-up of storing step
Conducting state of the continuous reflection memory transistor before storing step.
The content of the invention
The present invention provide according to independent claims be used for the method for run memory, corresponding device, accordingly
Computer program and corresponding storage medium.
The understanding being based in the case according to the solution of the present invention is, by the software of vehicle electronic system(SW)By
Workshop constraint(werkstattgebunden)The high cost of renewal causes ground, more and more via sky in modern system
Middle interface(over the air(It is aerial to download), OTA)Changing includes the system image of instruction and data(images).In order to hold
Row is such to be updated, and shows different possibilities;The possibility has the advantages of different and shortcoming respectively.
Traditional method is based on:There is provided(vorhalten)Two systems image, controlled by a system image in engine
In the case of for example maintain engine to run, and new system image is mounted(aufgespielt)To relevant control device
(electronic control unit(Electronic control unit), ECU)On.When starting engine next time, control device
It can be run on the basis of new system image.
In order to support traditional method, it is necessary to bigger than the memory space in the case where being unable to OTA control device
One times of memory space, because must be in nonvolatile memory(non-volatile memory, NVM)In simultaneously placement two
Individual system image.This is in the case where manufacturing corresponding control device and finally by vehicular manufacturer or first assembler
(original equipment manufacturer(Original equipment manufacturer), OEM)Using control device OTA abilities without
Closing ground has the shortcomings that high unit cost.
The advantage of solution suggested herein is, creates the operation method with reduced storage demand.
By measure mentioned in the dependent claims, illustrated basic thought has in the independent claim
The improvement project and improving countermeasure of profit are possible.Therefore it can be stated that applying methods described in the range of OTA renewals.
In the range of such embodiment, advantageously the presence of difference unit is also used for update control device, without improving the control
The manufacturing cost of control equipment, wherein the modern times be capable of OTA control device in the case of the difference unit sometimes after all by
It is provided for improving operational reliability.
Brief description of the drawings
Embodiments of the invention are illustrated and further explained in the description that follows in the accompanying drawings.
Fig. 1 shows the flow chart of the method according to first embodiment.
Fig. 2 schematically shows the control device according to second embodiment.
Embodiment
Fig. 1 is illustrated by the microcontroller for controlling the internal combustion engine in motor vehicle(μC), the method according to the invention
(10)Basic procedure, the memory of the microcontroller includes at least two cell arrays.The memory is in the case
Selectively (single-ended can be grounded with difference, symmetrical pattern or with monopole(Single-ended)), it is asymmetrical
Pattern is run.
In the normal running status of engine, in the case, when the application program quilt stored in memory
When implementing to be used to control engine, the cell array is run in a differential manner.In this method(10)The starting stage
(11)In can be depending on demand and availability via the telematics of vehicle(telematisch)Interface, which obtains, new is
System image(Systemabbild), the new system image generally represent application renewal version.
Once the system image is entirely present in the suitable caching of vehicle, cell array is just set temporarily to be in it
Asymmetric running status, each cell array can individually be grasped by microcontroller in the asymmetric running status
Control.Therefore, when second unit array is programmed using the renewal transmitted in advance block by block, application program can be from first
Cell array is unceasingly carried out(Reference 12).
The asymmetric operation can be in random length(Only by application(anliegend)The feelings of Temperature Distribution
Reliability under condition and limited)Transition stage(13)In be maintained, in the transition stage selectively implement come from
The original application of first module array or the version of the renewal from second unit array.Only fully confirmed when in vehicle
Network(Fahrzeugverbund)In new program version functional safety when, microcontroller is just in first module array
The running status for making memory be again at its normal difference after being accordingly programmed with new system image.With this
Mode, control device realize its required reliability for continuous service again using new application.
As illustrated in Fig. 2 schematic diagram, such as can be with software or hardware or mixed to be made up of software and hardware
Conjunction form is for example in control device(20)In realize methods described (10).
Claims (10)
1. there is first module array for running(21)With second unit array(22)Memory(24)Method(10), its
It is characterised by following characteristics:
- in the starting stage(11)In, when in the memory(24)When middle the first stored program is carried out, with difference
Mode runs the cell array(21、22),
- in programming phases(12)In, when first program is from the first module array(21)It is carried out and the second program
It is programmed into the second unit array(22)When middle, the cell array is run in a manner of asymmetric(21、22), and
- in transition stage(13)In selectively implement come from the first module array(21)First program or come
From the second unit array(22)Second program.
2. in accordance with the method for claim 1(10),
It is characterized in that following characteristics:
- in terminal stage(14)In, when in the memory(24)When middle the second stored program is carried out, again with difference
The mode divided runs the cell array(21、22).
3. according to the method described in claim 1 or 2(10),
It is characterized in that following characteristics:
- by the memory(24)Different address range assignment give the first module array(21)With the second unit
Array(22).
4. according to the method described in one of claims 1 to 3(10),
It is characterized in that following characteristics:
- second program is the version of the renewal of first program.
5. according to the method described in one of Claims 1-4(10),
It is characterized in that following characteristics:
- first program and second program are adapted to control field apparatus, especially internal combustion in motor vehicle
Machine.
6. in accordance with the method for claim 5(10),
It is characterized in that following characteristics:
- second program is in the programming phases(12)It is transferred to before via air interface in the motor vehicle.
7. computer program, the computer program is configured for implementing according to the method described in one of claim 1 to 6
(10).
8. machine readable storage medium(24), especially flash-EEPROM, be stored with said storage according to right
It is required that the computer program described in 7.
9. device(23), described device be configured for implement according to the method described in one of claim 1 to 6(10).
10. according to the device described in claim 9, described device is in the form of microcontroller.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102016214879.6 | 2016-08-10 | ||
DE102016214879.6A DE102016214879A1 (en) | 2016-08-10 | 2016-08-10 | Method and device for operating a memory |
Publications (1)
Publication Number | Publication Date |
---|---|
CN107729029A true CN107729029A (en) | 2018-02-23 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201710675197.2A Pending CN107729029A (en) | 2016-08-10 | 2017-08-09 | Method and apparatus for run memory |
Country Status (2)
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CN (1) | CN107729029A (en) |
DE (1) | DE102016214879A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11256442B2 (en) | 2018-01-05 | 2022-02-22 | Stmicroelectronics S.R.L. | Real-time update method for a differential memory, differential memory and electronic system |
IT201800000580A1 (en) | 2018-01-05 | 2019-07-05 | St Microelectronics Srl | REAL-TIME UPDATE METHOD OF A DIFFERENTIAL MEMORY WITH CONTINUOUS READING ACCESSIBILITY, DIFFERENTIAL MEMORY AND ELECTRONIC SYSTEM |
IT201800000581A1 (en) | 2018-01-05 | 2019-07-05 | St Microelectronics Srl | METHOD OF MANAGING REAL-TIME ACCESS TO A DIFFERENTIAL MEMORY, DIFFERENTIAL MEMORY AND ELECTRONIC SYSTEM INCLUDING THE DIFFERENTIAL MEMORY |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5754477A (en) * | 1997-01-29 | 1998-05-19 | Micron Technology, Inc. | Differential flash memory cell and method for programming |
CN101127236A (en) * | 2002-01-11 | 2008-02-20 | 索尼公司 | Memory cell circuit |
CN102859501A (en) * | 2010-04-16 | 2013-01-02 | 美光科技公司 | Boot partitions in memory devices and systems |
CN103106092A (en) * | 2013-02-18 | 2013-05-15 | 青岛海信宽带多媒体技术有限公司 | System software updating method and device in terminal appliance |
CN104217756A (en) * | 2013-06-03 | 2014-12-17 | 英飞凌科技股份有限公司 | System and method to store data in an adjustably partitionable memory array |
-
2016
- 2016-08-10 DE DE102016214879.6A patent/DE102016214879A1/en active Pending
-
2017
- 2017-08-09 CN CN201710675197.2A patent/CN107729029A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5754477A (en) * | 1997-01-29 | 1998-05-19 | Micron Technology, Inc. | Differential flash memory cell and method for programming |
CN101127236A (en) * | 2002-01-11 | 2008-02-20 | 索尼公司 | Memory cell circuit |
CN102859501A (en) * | 2010-04-16 | 2013-01-02 | 美光科技公司 | Boot partitions in memory devices and systems |
CN103106092A (en) * | 2013-02-18 | 2013-05-15 | 青岛海信宽带多媒体技术有限公司 | System software updating method and device in terminal appliance |
CN104217756A (en) * | 2013-06-03 | 2014-12-17 | 英飞凌科技股份有限公司 | System and method to store data in an adjustably partitionable memory array |
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DE102016214879A1 (en) | 2018-02-15 |
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