CN107688505A - Data verification method and device based on hardware circuit - Google Patents
Data verification method and device based on hardware circuit Download PDFInfo
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- CN107688505A CN107688505A CN201710699044.1A CN201710699044A CN107688505A CN 107688505 A CN107688505 A CN 107688505A CN 201710699044 A CN201710699044 A CN 201710699044A CN 107688505 A CN107688505 A CN 107688505A
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- data
- hardware circuit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
Abstract
The present invention discloses a kind of data verification method and device based on hardware circuit, wherein, being somebody's turn to do the data verification method based on hardware circuit includes：After initial data is read, data conversion is carried out to initial data and obtains change data；Progress inverse operation direct to change data obtains inverse conversion data；And whether compare initial data identical with inverse conversion data, and according to comparative result output data.Technical scheme can reduce the delay of whole piece data path, improve data-handling efficiency；Reduce the bandwidth demand to DDR RAM, it is possible to increase whole hardware circuit operational efficiency, the overall system performance of the above-mentioned hardware circuit of optimization application.
Description
Technical field
The present invention relates to technical field of data transmission, more particularly to a kind of data verification method and dress based on hardware circuit
Put.
Background technology
At present, semiconductor circuit may be because the bombardment of high energy particle and changes original state at work.Such case is
Few, but in the application high to data reliability requirement, this accidental mistake may cause serious loss of data, because
And the chip of enterprise-level application is generally protected using data redundancy algorithm to data path, such as parity, ECC etc..When
When accidental mistake occurs, hardware can be found mistake immediately using data redundancy algorithm or even can correct mistake；But when number
When being changed according to itself, for example it is compressed or encrypts, data redundancy algorithm can not be protected to the transfer process of data
Shield, the mistake occurred in transfer process can cause user to lose data.
In order to guarantee to find the mistake occurred in transfer process, method commonly used in the prior art receives converted
After data, then it is pushed to inverse transform unit and carries out inverse operation and verification, ensures not having mistake in transfer process.Due to existing
In framework, exist before initial data conversion in DRAM, converting unit is changed data after DDR RAM readings, so
Result is stored in DDR RAM afterwards；If inverse transform unit is pushed to, it is necessary to read data-pushing to inverse from DDR RAM again
Converting unit, this framework waste DDR RAM bandwidth, and the read-write to DDR RAM adds whole piece data and led to back and forth
The delay on road.
In view of this, it is necessary to which current data check technology is further improved for proposition.
The content of the invention
To solve an above-mentioned at least technical problem, the main object of the present invention is to provide a kind of data based on hardware circuit
Method of calibration.
To achieve the above object, one aspect of the present invention is：A kind of data based on hardware circuit are provided
Method of calibration, including：
After initial data is read, data conversion is carried out to initial data and obtains change data；
Progress inverse operation direct to change data obtains inverse conversion data；And
It is whether identical with inverse conversion data to compare initial data, and according to comparative result output data.
In a specific embodiment, whether relatively initial data and the inverse conversion data are identical, and are tied according to comparing
The step of fruit output data, specifically includes：
It is whether identical with the summary of inverse conversion content to compare the summary of original contents,
If the summary of original contents is identical with the summary of inverse conversion content, output data；
If the summary of original contents is identical with the summary of inverse conversion content, abandons output data and feed back transcription error
Information.
In a specific embodiment, the summary of the original contents is the attribute data of change data, and can follow and turn
Data are changed to circulate on data path.
It is described initial data to be carried out in the step of data conversion obtains change data specifically in a specific embodiment
Including：
Change data is obtained to the Embedded process of initial data；
Specifically included in the step of progress inverse operation direct to change data obtains inverse conversion data：
The Embedded process opposite with initial data is carried out to change data and obtains inverse conversion data.
It is described that initial data is carried out to go back after the step of data conversion obtains change data in a specific embodiment
Including：
On same data path add have bypass control logic, with simultaneously change data is verified and inverse operation grasp
Make.
To achieve the above object, another technical solution used in the present invention is：A kind of number based on hardware circuit is provided
According to calibration equipment, it is characterised in that the data calibration device based on hardware circuit includes：
Modular converter, after initial data is read, change data is obtained for carrying out data conversion to initial data；
Inverse transform block, for obtaining inverse conversion data to the direct progress inverse operation of change data；And
Correction verification module, it is whether identical with inverse conversion data for comparing initial data, and according to comparative result output data.
In a specific embodiment, the correction verification module is specifically used for：
It is whether identical with the summary of inverse conversion content to compare the summary of original contents,
If the summary of original contents is identical with the summary of inverse conversion content, output data；
If the summary of original contents is identical with the summary of inverse conversion content, abandons output data and feed back transcription error
Information.
In a specific embodiment, the summary of the original contents is the attribute data of change data, and can follow and turn
Data are changed to circulate on data path.
In a specific embodiment, the modular converter is specifically used for：
Change data is obtained to the Embedded process of initial data；
The inverse transform block is specifically used for：
The Embedded process opposite with initial data is carried out to change data and obtains inverse conversion data.
In a specific embodiment, the data calibration device based on hardware circuit also includes bypass control module,
There is bypass control logic for being added on same data path, so that the inverse transform block is tested change data simultaneously
Card and inverse operation operation.
Technical scheme mainly using after initial data is read, carries out data conversion to initial data and turned
Data are changed, then progress inverse operation direct to change data obtains inverse conversion data, without the read-write behaviour to DDR RAM back and forth
Make, it is whether identical with inverse conversion data finally by initial data is compared, and led to according to comparative result output data, whole data
Road further optimizes the delay of data path according to the pipeline design, that is, in the last part data operated also
In data path, the data can of next operation enters data path, particularly when the data block of operation is smaller, and
When the time that conversion process needs is long, multiple operations can be performed simultaneously on data path, substantially increase hardware electricity
The treatment effeciency on road, so as to improve the performance of whole system.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Structure according to these accompanying drawings obtains other accompanying drawings.
Fig. 1 is the method flow diagram of data verification method of the first embodiment of the invention based on hardware circuit；
Fig. 2 is the method flow diagram of data verification method of the second embodiment of the invention based on hardware circuit；
Fig. 3 is the block diagram of data calibration device of the first embodiment of the invention based on hardware circuit；
Fig. 4 is the block diagram of data calibration device of the second embodiment of the invention based on hardware circuit；
Fig. 5 is the block diagram of data calibration device of the third embodiment of the invention based on hardware circuit.
The realization, functional characteristics and advantage of the object of the invention will be described further referring to the drawings in conjunction with the embodiments.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only the part of the embodiment of the present invention, rather than whole embodiments.Base
Embodiment in the present invention, those of ordinary skill in the art obtained under the premise of creative work is not made it is all its
His embodiment, belongs to the scope of protection of the invention.
It is to be appreciated that the description for being related to " first ", " second " etc. in the present invention be only used for describe purpose, and it is not intended that
Indicate or imply its relative importance or the implicit quantity for indicating indicated technical characteristic.Thus, define " first ",
At least one this feature can be expressed or be implicitly included to the feature of " second ".In addition, the technical side between each embodiment
Case can be combined with each other, but must can be implemented as basis with those of ordinary skill in the art, when the combination of technical scheme
Occur conflicting or will be understood that the combination of this technical scheme is not present when can not realize, also not in the guarantor of application claims
Within the scope of shield.
In the data verification method of existing hardware circuit, exist before initial data conversion in DDR RAM, CPU controls
Converting unit processed is changed data after DDR RAM readings, and result is stored into DDR RAM by the data after conversion；If
Inverse transform unit is pushed to, it is necessary to which read data from DDR RAM again is pushed to inverse transform unit again, this flow wastes
DDR RAM bandwidth, process is cumbersome, it is necessary to back and forth to DDR RAM read-write operation, adds the delay of whole piece data path.,
Reduce read-write efficiency.Therefore, present solution provides a kind of data verification method based on hardware circuit, concrete scheme refer to
Following embodiments.
Embodiment one
Fig. 1 is refer to, in embodiments of the present invention, is somebody's turn to do the data verification method based on hardware circuit, including：
Step S10, after initial data is read, data conversion is carried out to initial data and obtains change data；
Step S20, progress inverse operation direct to change data obtains inverse conversion data；And
Step S30, it is whether identical with inverse conversion data to compare initial data, and according to comparative result output data.
In the present embodiment, initial data is read from DDR RAM, can carry out conversion process, and the conversion process includes encryption, pressure
Contracting processing etc., inverse operation then is carried out to the initial data of conversion process, the inverse operation includes corresponding with conversion process opposite
Whether processing, obtains inverse conversion data, identical with inverse conversion data finally by initial data is compared, according to result of the comparison
Accurate data is exported after judging the integrality of change data, so, it is possible to reduce the read-write number to DDR RAM, improve hardware
The data transmission performance of circuit.
Technical scheme mainly using after initial data is read, carries out data conversion to initial data and turned
Data are changed, then progress inverse operation direct to change data obtains inverse conversion data, without the read-write behaviour to DDR RAM back and forth
Make, it is whether identical with inverse conversion data finally by initial data is compared, and led to according to comparative result output data, whole data
Road further optimizes the delay of data path according to the pipeline design, that is, in the last part data operated also
In data path, the data can of next operation enters data path, particularly when the data block of operation is smaller, and
When the time that conversion process needs is long, multiple operations can be performed simultaneously on data path, substantially increase hardware electricity
The treatment effeciency on road, so as to improve the performance of whole system.
Continue referring to Fig. 1, in a specific embodiment, relatively initial data and the inverse conversion data whether phase
Together, and according to the step S30 of comparative result output data specifically include：
It is whether identical with the summary of inverse conversion content to compare the summary of original contents,
If the summary of original contents is identical with the summary of inverse conversion content, output data；
If the summary of original contents is identical with the summary of inverse conversion content, abandons output data and feed back transcription error
Information.
Further, the summary of the original contents is the attribute data of change data, and can follow change data in number
According to being circulated on path.
In the present embodiment, initial data includes original contents, equally, inverse conversion content is included in inverse conversion data, specifically
When comparing, it need to only compare the summary of original contents and inverse conversion content, when both summaries are identical, then it represents that inverse conversion data
, now can be with output data by the complete sexual satisfaction requirement of verification, i.e. change data；When both summaries are different or part not
Simultaneously, then it represents that inverse conversion data abandon output data and simultaneously feed back transition error information not over verification, to point out or
Carry out subsequent error correction operation.
In addition, the summary of above-mentioned initial data calculates before switching, due to the conversion of initial data and inverse
The time that conversion needs is general longer, and the summary is not if following change data to circulate, it is necessary to open up memory space in addition
This summary is kept in, and by above-mentioned scheme, the space that individually storage initial data is made a summary can be saved.
Embodiment two
Fig. 2 is refer to, it is described that change data is obtained to initial data progress data conversion in a specific embodiment
Specifically included in step S10：
Change data is obtained to the Embedded process of initial data；
The progress inverse operation direct to change data obtains specifically including in the step S20 of inverse conversion data：
The Embedded process opposite with initial data is carried out to change data and obtains inverse conversion data.
In the present embodiment, data conversion treatment can be specifically to encrypt secondary Embedded process after first compression is handled, can also
It is first to compress to encrypt secondary Embedded process afterwards, can also be compression-encryption-frequency modulation Embedded process three times, corresponding, data inverse fortune
Calculation is handled：Secondary opposite Embedded process is decompressed after decryption processing, or first decompresses and decrypts afterwards at secondary opposite nesting
Reason, or demodulation-decryption-decompression opposite Embedded process three times.In the operation of multiple arithmetic is needed, this method is further
The number that intermediate data comes and goes DDR RAM is saved, system bandwidth is saved, reduces data processing delay.
In a specific embodiment, the data conversion that carried out to initial data obtains the step S10 tools of change data
Body includes：
Step S11, processing is compressed to initial data；And
Step S12, the initial data of compression processing is encrypted；
The step S20 that the progress inverse operation direct to change data obtains inverse conversion data is specifically included：
Step S21, processing change data is decrypted；And
Step S22, decompression is carried out to the change data of decryption processing.
It should be understood that it is above-mentioned initial data is compressed-mode of encryption is only one kind of data conversion
The processing modes such as modulation can also be added in preferred scheme, also real process；It is corresponding, it is above-mentioned that change data is solved
The mode of close-decompression is a kind of corresponding scheme of data inverse operation conversion, can also also add demodulation in real process
Etc. processing mode.
Embodiment three
In a specific embodiment, it is described to initial data carry out data conversion obtain change data step S10 it
Also include afterwards：
On same data path add have bypass control logic, with simultaneously change data is verified and inverse operation grasp
Make.For example, in the application of encryption and decryption, first operation is encryption data A, and second operation is ciphertext data B.For solution
Close unit, first operation need it that the result after data A encryptions is decrypted, then calculated according to follow-up CL Compare Logic
Made a summary with comparing.Order, second operation ciphertext data B can be carried out during decryption.The benefit so arranged makes decryption and reality
When verification carry out simultaneously, save logic；Another benefit is that the order of two operations can be according to pipeline system seamlessly
Into data path, the performance of path processing data can be lifted to greatest extent.
In the present embodiment, change data can also be verified, verification change data can be preset data, by this
Checking procedure, which can tell which link in conversion process and inverse operation processing, to break down, and checking procedure optimization data
The performance of path.
Embodiment one
Refer to Fig. 3, in embodiments of the invention, should data calibration device based on hardware circuit, including CPU module 10
And DDR RAM modules 20, in addition to：
Modular converter 30, after initial data is read, change data is obtained for carrying out data conversion to initial data；
Inverse transform block 40, for obtaining inverse conversion data to the direct progress inverse operation of change data；And
Correction verification module 50, it is whether identical with inverse conversion data for comparing initial data, and number is exported according to comparative result
According to.
In the present embodiment, initial data is read from DDR RAM modules 20, and conversion process can be carried out by modular converter 30,
The conversion process includes encryption, compression processing etc., then the initial data of conversion process is carried out by inverse transform block 40 inverse
Computing, the inverse operation include opposite processing corresponding with conversion process, obtain inverse conversion data, compare finally by correction verification module 50
It is whether identical with inverse conversion data compared with initial data, to CPU moulds after the integrality of change data is judged according to result of the comparison
Block 10 exports accurate data, so, it is possible to reduce the read-write number to DDR RAM modules 20, the data for improving hardware circuit pass
Defeated performance.
In a specific embodiment, the correction verification module 50 is specifically used for：
It is whether identical with the summary of inverse conversion content to compare the summary of original contents,
If the summary of original contents is identical with the summary of inverse conversion content, output data；
If the summary of original contents is identical with the summary of inverse conversion content, abandons output data and feed back transcription error
Information.
Further, the summary of the original contents is the attribute data of change data, and can follow change data in number
According to being circulated on path.
In the present embodiment, initial data includes original contents and its summary, equally, comprising in inverse conversion in inverse conversion data
Hold and its summary, specifically relatively when, 50 need of correction verification module compare the summary of original contents and inverse conversion content, can improve
CPU treatment effeciency, when both summaries are identical, then it represents that inverse conversion data pass through verification, the i.e. integrality of change data
Meet to require, now can be with output data；When both summaries are different or part is different, then it represents that inverse conversion data are not logical
Verification is crossed, output data is abandoned and feeds back transition error information, to point out or carry out subsequent error correction operation.
Further, since attribute data of the summary of original contents for change data, and change data can be followed to lead in data
Circulated on road, therefore single memory space need not be opened up to keep in the data, save memory space resource.
Embodiment two
Fig. 4 is refer to, in a specific embodiment, the modular converter 30 is specifically used for：
Change data is obtained to the Embedded process of initial data；
The inverse transform block 40 is specifically used for：
The Embedded process opposite with initial data is carried out to change data and obtains inverse conversion data.
In the present embodiment, data conversion treatment can be specifically to encrypt secondary Embedded process after first compression is handled, can also
It is first to compress to encrypt secondary Embedded process afterwards, can also be compression-encryption-frequency modulation Embedded process three times, corresponding, data inverse fortune
Calculation is handled：Secondary opposite Embedded process is decompressed after decryption processing, or first decompresses and decrypts afterwards at secondary opposite nesting
Reason, or demodulation-decryption-decompression opposite Embedded process three times.In the operation of multiple arithmetic is needed, this method is further
The number that intermediate data comes and goes DDR RAM is saved, system bandwidth is saved, reduces data processing delay.
Fig. 5 is refer to, in a specific embodiment, the modular converter 30 is used for：
Processing is compressed to initial data；And the initial data of compression processing is encrypted；The reverse
Mold changing block 40 is used for：
Change data is decrypted processing；And decompression is carried out to the change data of decryption processing.
It is above-mentioned initial data is compressed-mode of encryption is only a kind of preferred scheme of data conversion, real
The processing modes such as modulation can also be added during border；It is corresponding, it is above-mentioned change data to be decrypted-decompression
Mode is a kind of corresponding scheme of data inverse operation conversion, and the processing modes such as demodulation can also be added in real process.
Embodiment three
Fig. 4 and Fig. 5 are refer to, in a specific embodiment, the data calibration device based on hardware circuit also wraps
Bypass control module 60 is included, has bypass control logic for being added on same data path, so that the inverse transform block is same
When change data is verified and inverse operation operation.The bypass control module 60 can add Bypass Control on data path and patrol
Volume, for example, in the combination of ciphering unit+decryption unit, first operation is encryption data A, and second operation is ciphertext data
B.For decryption unit, first operation needs it that the result after data A encryptions is decrypted, then according to follow-up comparison
Logical calculated and compare summary.Order, decryption unit can carry out second operation ciphertext data B.The benefit so arranged
It is that inverse transform block can be used for decryption and in real time two purposes of verification, saves logic；Another benefit is two operations
Order can seamlessly enter data path according to pipeline system, can lift the property of link processing data to greatest extent
Energy.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the scope of the invention, it is every at this
Under the inventive concept of invention, the equivalent structure transformation made using description of the invention and accompanying drawing content, or directly/use indirectly
It is included in other related technical areas in the scope of patent protection of the present invention.
Claims (10)
- A kind of 1. data verification method based on hardware circuit, it is characterised in that the data check side based on hardware circuit Method includes：After initial data is read, data conversion is carried out to initial data and obtains change data；Progress inverse operation direct to change data obtains inverse conversion data；AndIt is whether identical with inverse conversion data to compare initial data, and according to comparative result output data.
- 2. the data verification method based on hardware circuit as claimed in claim 1, it is characterised in that the relatively initial data It is whether identical with inverse conversion data, and specifically included according to the step of comparative result output data：It is whether identical with the summary of inverse conversion content to compare the summary of original contents,If the summary of original contents is identical with the summary of inverse conversion content, output data；If the summary of original contents is identical with the summary of inverse conversion content, abandons output data and feed back transcription error letter Breath.
- 3. the data verification method based on hardware circuit as claimed in claim 2, it is characterised in that the original contents are plucked To be the attribute data of change data, and change data can be followed to be circulated on data path.
- 4. the data verification method based on hardware circuit as claimed in claim 1, it is characterised in that described to enter to initial data Specifically included in the step of row data are converted to change data：Change data is obtained to the Embedded process of initial data；Specifically included in the step of progress inverse operation direct to change data obtains inverse conversion data：The Embedded process opposite with initial data is carried out to change data and obtains inverse conversion data.
- 5. the data verification method based on hardware circuit as claimed in claim 1, it is characterised in that described to enter to initial data Also include after the step of row data are converted to change data：On same data path add have bypass control logic, with simultaneously change data is verified and inverse operation operate.
- A kind of 6. data calibration device based on hardware circuit, it is characterised in that the data check dress based on hardware circuit Put including：Modular converter, after initial data is read, change data is obtained for carrying out data conversion to initial data；Inverse transform block, for obtaining inverse conversion data to the direct progress inverse operation of change data；AndCorrection verification module, it is whether identical with inverse conversion data for comparing initial data, and according to comparative result output data.
- 7. the data calibration device based on hardware circuit as claimed in claim 6, it is characterised in that the correction verification module is specific For：It is whether identical with the summary of inverse conversion content to compare the summary of original contents,If the summary of original contents is identical with the summary of inverse conversion content, output data；If the summary of original contents is identical with the summary of inverse conversion content, abandons output data and feed back transcription error letter Breath.
- 8. the data calibration device based on hardware circuit as claimed in claim 7, it is characterised in that the original contents are plucked To be the attribute data of change data, and change data can be followed to be circulated on data path.
- 9. the data calibration device based on hardware circuit as claimed in claim 6, it is characterised in that the modular converter is specific For：Change data is obtained to the Embedded process of initial data；The inverse transform block is specifically used for：The Embedded process opposite with initial data is carried out to change data and obtains inverse conversion data.
- 10. the data calibration device based on hardware circuit as claimed in claim 6, it is characterised in that described based on hardware electricity The data calibration device on road also includes bypass control module, has bypass control logic for being added on same data path, with Make the inverse transform block and meanwhile change data is verified and inverse operation operation.
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| CN112948167A (en) * | 2021-03-31 | 2021-06-11 | 地平线征程(杭州)人工智能科技有限公司 | Protection circuit, method, device and computer readable storage medium for data path |
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Application publication date: 20180213 |