CN107682707A - Meet the image dividing system based on quad-tree structure of H.265 standard - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
- H04N19/96—Tree coding, e.g. quad-tree coding
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/103—Selection of coding mode or of prediction mode
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/119—Adaptive subdivision aspects, e.g. subdivision of a picture into rectangular or non-rectangular coding blocks
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- H—ELECTRICITY
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
- H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/182—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a pixel
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Abstract
The present invention relates to a kind of image dividing system based on quad-tree structure for meeting H.265 standard, 4 kinds of symmetric graph pictures divisions can be completed specified in H.265 standard and 4 kinds of asymmetric images divide, using complexity of the one-dimension array as calculating location information in record pixel in the picture residing data structure simplification that is horizontal, indulging positional information image partition process.A kind of image dividing system based on quad-tree structure for meeting H.265 standard proposed by the invention, simplify the complexity of calculating location information in image partition process.Pixel enters line renumbering in each sub-block after being divided due to system to image, and sub-block, which can be re-entered recursively after system carries out image division, forms quad-tree structure type.The pixel of piece image, which travels through one time, can complete image division and without the computing of complexity, be especially suitable for applying the coding and decoding video to time and resource sensitive.
Description
Technical field
The present invention relates to a kind of image dividing system based on quad-tree structure for meeting H.265 standard.
Background technology
Efficient video coding standard of new generation H.265/HEVC in an important innovation in place of be exactly for prediction and change
Change encoding target and the image division based on quad-tree structure has been carried out to image, reduce the macro block of high-definition digital video
Number, also just reduces the parameter information for describing macroblock content, is easy to more be obviously improved high-resolution video code efficiency.
Compared to previous generation coding standards H.264/AVC in size be 16 × 16 macro block (MB) divide, H.265 standard breaches original
The limitation of some transform and quantization sizes, coding unit (CU) that size is 4 × 4 to 32 × 32 can be supported to be divided into one or more
The individual converter unit (TU) in quaternary tree type structural arrangement is as the elementary cell that transform and quantization is carried out in cataloged procedure.
At the same time, it is H.265 single using elementary cell of the predicting unit (PU) as prediction computing, a coding in standard
First (CU) can be divided into one or more predicting units (PU), and in 4 kinds specified in H.264/AVC standard symmetrical divisions
4 kinds of asymmetric partition modes are added on the basis of pattern.
The existing image partitioning technology based on quaternary tree is mostly using two-dimensional array or structure variable as data record
With the data structure of processing, consume substantial amounts of storage resource, by the use of two-dimensional array as record pixel in the picture residing horizontal stroke,
The data structure of vertical positional information can also reduce the execution speed of image division.Therefore, for memory space and data processing speed
Spend for sensitive video coding and decoding system, it is necessary to image partitioning algorithm efficiency is improved, preferably to complete image division task.
The content of the invention
It is an object of the invention to provide a kind of image dividing system based on quad-tree structure for meeting H.265 standard,
To overcome defect present in prior art.
To achieve the above object, the technical scheme is that：It is a kind of meet H.265 standard based on quad-tree structure
Image dividing system, including image input, image division parameter input end, image analysis module, image buffer storage module and
Image division module；The image that described image parsing module inputs to mirror described image input parses, and obtains picture number
According to；Described image cache module caches to view data, to coordinate the message transmission rate of system different piece；The figure
As the view data and described image that division module reception described image cache module provides divide what parameter input end provided
Image divides parameter, and image is divided.
In an embodiment of the present invention, described image parsing module parses to the image of input, obtains the height of image
Degree pixel value corresponding with width data and each pixel, and distribute a pixel number, root for each pixel in image
Stored according to the data mode of pixel value one-dimension array corresponding to pixel number all in image.
In an embodiment of the present invention, it is V to obtain picture altitude after note parsing, and width is H, and numbering is the pixel of i pixels
Value is Pi, in image the numbering path of all pixels by between adjacent lines it is the first be connected in the way of；
The pixel value of pixel and pixel number are one-to-one relationship in image, pixel value corresponding pixel number i
PiFunctional relation it is as follows：
Pi=f (i)；
{i|0≤i≤V×H-1；i∈Z+}；
Remember that residing line number is x in the picture for pixel number i pixel, residing columns is y in the picture, then pixel is compiled
Residing line number x, columns y functional relation are shown below in the picture for number i and the pixel：
I=H × x+y；
{(x,y)|0≤x≤V-1,0≤y≤H-1；x,y∈Z+}。
In an embodiment of the present invention, described image cache module uses data buffer storage Fifo.
In an embodiment of the present invention, the pixel value of each pixel presses pixel number order, is inputted using byte stream form
After the data buffer storage Fifo, described image division module is conveyed to；After the completion of piece image division, described image division mould
Block sends a feedback signal to the data cache module, shows that image division is completed；The data cache module again will be next
The data of width image are conveyed to described image division module, and preventing data contention causes image division error.
In an embodiment of the present invention, described image division module uses the image dividing mode based on quaternary tree, will be whole
The pixel of individual image is divided into four sub- square grids in the direction of the clock, and is organized into a quaternary tree；If sub- square grid
In contained pixel need further division, then to the sub- square grid according to being counterclockwise further divided into four son sides
Block grid.
In an embodiment of the present invention, also comprise the following steps：
Step S1：Remember picture traverse division number nTimex, height divides number nTimey；
Determine that residing line number x, columns y, int [] represent to round in the picture for pixel that pixel number is i by following formula
Number；
X=int [i ÷ H]
Y=int [i%H]
Step S2：Pixel that pixel number is i is determined as follows to divide corresponding to residing line number x in the picture
Sub-block line number x in image afterwards1, the columns y of the sub-block after division corresponding to columns y in image1；
x1=int [x ÷ (V ÷ nTimey)]
y1=int [y ÷ (H ÷ nTimex)]
If x1More than or equal to nTimex, then x1From subtracting 1；If y1More than or equal to nTimex, then y1From subtracting 1；
Step S3：In the following way to obtaining the sub-block number z belonging to the pixel that pixel number is i：
Z=x1×nTimex+y1
Step S4：After traveling through all pixels by said process, the pixel in each sub-block after image divides is obtained；
Step S5：Distinguish 4 sub-blocks after output image division by 4 sub-block output ports；The sub-block each exported
In pixel pixel value corresponding to pixel number is stored using the data structure of one-dimension array, and the pixel in each sub-block is compiled
Number renumberd since 0.
In an embodiment of the present invention, described image division parameter includes：Whether symmetrical division symbolizing position, picture traverse draw
Portioning number and height division number.
It is in an embodiment of the present invention, described that whether symmetrical division symbolizing position is one 3 bits；When described whether right
When division symbolizing position is referred to as 3 ' b1xx, image is symmetrically divided, and including four kinds of symmetrical classified types, and pass through 3 two
Lowest order and time high-order type for determining present image partition mode in system number；When whether symmetrical division symbolizing position is 3 '
During b0xx, asymmetric division, and four kinds of asymmetric classified types are carried out to image, and pass through the lowest order in 3 bits
With the secondary high-order type for determining present image partition mode.
Compared to prior art, the invention has the advantages that：The present invention proposes a kind of H.265 standard of meeting
Image dividing system based on quad-tree structure, can complete 4 kinds of symmetric graph picture divisions specified in H.265 standard and 4 kinds non-
Symmetric graph picture divides, using one-dimension array as record pixel residing data structure that is horizontal, indulging positional information in the picture
Method, simplify the complexity of calculating location information in image partition process.It is each after being divided due to system to image
Pixel enters line renumbering in sub-block, and sub-block, which can be re-entered recursively after system carries out image division, forms quaternary tree knot
Configuration.The pixel of piece image, which travels through one time, can complete image division and without the computing of complexity, be especially suitable for applying right
In the coding and decoding video of time and resource sensitive.
Brief description of the drawings
Fig. 1 is the system block diagram for meeting the H.265 image dividing system based on quad-tree structure of standard in the present invention.
Fig. 2 is pixel number path schematic diagram in one embodiment of the invention
Fig. 3 is pixel number and line number and columns graph of a relation residing for pixel in one embodiment of the invention.
Fig. 4 be in one embodiment of the invention whether symmetrical division symbolizing position and the corresponding relation of 4 kinds of symmetrical partition modes.
Fig. 5 be in one embodiment of the invention whether symmetrical division symbolizing position and the corresponding relation of 4 kinds of asymmetric partition modes.
Fig. 6 is sub-block number path schematic diagram after the image division based on quad-tree structure in one embodiment of the invention.
Fig. 7 be in one embodiment of the invention when whether symmetrical division symbolizing position is 111 when sub-block in the pixel side of renumbeing
Formula.
Fig. 8 be in one embodiment of the invention when whether symmetrical division symbolizing position is 011 when sub-block in the pixel side of renumbeing
Formula.
Embodiment
Below in conjunction with the accompanying drawings, technical scheme is specifically described.
The present invention provides a kind of image dividing system based on quad-tree structure for meeting H.265 standard, image division system
The system block diagram of system is as shown in figure 1, including image input, image division parameter input end, image analysis module, image buffer storage
Module and image division module；The image that image analysis module inputs to mirror described image input parses, and obtains figure
As data；Described image cache module caches to view data, to coordinate the message transmission rate of system different piece；Figure
The view data of image buffer storage module offer and the image division of image division parameter input end offer are provided as division module
Parameter, image is divided.
Further, in the present embodiment, image analysis module parses to the image of input, obtains the height of image
And width data, i.e. the horizontally and vertically number of pixel；And pixel value corresponding to each pixel, and be image
In each pixel distribute a pixel number, by the number of pixel value one-dimension array corresponding to pixel number all in image
Stored according to form.
Further, in the present embodiment, if the piece image height obtained after parsing is V, namely vertical direction pixel
Number is V, and width is H, namely horizontal direction number of pixels is H, and the pixel value of pixel is PiNumbering is i.According to such as Fig. 2
Design in the shown numbering path to all pixels in piece image.
Further, due to being all one-to-one relation between the pixel value of pixel and pixel number in image, so
Pixel value P corresponding the pixel number i of certain pixeliFunctional relation expression formula such as shown in (1)：
Pi=f (i) (1)
{i|0≤i≤V×H-1；i∈Z+}
Location is relevant in the picture with it for pixel number as corresponding to Fig. 2 can analyze a pixel, this position
Put relation with the pixel in the picture where line number and columns describe.If residing line number is x to pixel in the picture, certain picture
Residing columns is y to element in the picture, then the pixel number i of certain pixel and its residing line number x, columns y letter in the picture
Number relational expression is such as shown in (2)：
I=H × x+y (2)
{(x,y)|0≤x≤V-1,0≤y≤H-1；x,y∈Z+}
Further, in the present embodiment, pixel number and line number and columns relation residing for pixel are illustrated in figure 3.
Further, in the present embodiment, it is the pixel value of each pixel is defeated with byte stream form by pixel number order
Image division module is conveyed to after entering into data buffer storage Fifo.Data buffer storage is real with Fifo (FirstinFirst out) technology
Existing, the effect of data buffer storage unit is to play data buffer storage, coordinates the message transmission rate of system different piece, i.e., in a width figure
Image division module can show that present image division is completed to data buffer storage unit transmission feedback signal after the completion of picture division, then by
The data of lower piece image are conveyed to image division module, and preventing data contention causes image division error.
Further, in the present embodiment, image division module is the nucleus module of system, and image division module is according to upper
The image division parameter that layer application provides divides to image.Image divide parameter by whether symmetrical division symbolizing position form,
Picture traverse division number, height division number.
Further, in the present embodiment, if symmetric flag position is 3 bits.
When whether symmetrical division symbolizing position is 3 ' b1xx when, image is symmetrically divided, it is minimum in 3 bits
Position and time high-order decision present image partition mode are specifically any in four kinds of symmetrical classified types, if symmetrical division mark
Will position and corresponding relation such as Fig. 4 of 4 kinds of symmetrical partition modes.Wherein, N can be 4,8,16,32,
When whether symmetrical division symbolizing position is 3 ' b0xx when carry out asymmetric division to image, in 3 bits most
Low level and time high-order decision present image partition mode are specifically any in four kinds of asymmetric classified types, if symmetrical to draw
Divide corresponding relation such as Fig. 5 of flag bit and 4 kinds of asymmetric partition modes.
Further, in the present embodiment, picture traverse division number nTimex is remembered, height divides number nTimey.Figure
During as division module operation first by expression formula such as (3) determine pixel number for i pixel in the picture residing line number x, arrange
Y is counted, int [..] represents round numbers in expression formula.
X=int [i ÷ H] (3)
Y=int [i%H]
Again by expression formula such as (4) determine pixel number for i pixel in the picture residing line number x belong to divide after image
Which of in the row of sub-block, columns y belongs to after division in which of image row of sub-block.
x1=int [x ÷ (V ÷ nTimey)] (4)
y1=int [y ÷ (H ÷ nTimex)]
If x in above formula result of calculation1More than or equal to nTimex, then x1From subtracting 1；If y in above formula result of calculation1Greatly
In or equal to nTimex, then y1From subtracting 1.
Further, in the present embodiment, the image division based on quaternary tree is by x, y direction by the pixel of whole image
Four sub- square grids are divided into, are organized into a quaternary tree.If contained pixel needs further in a certain sub- square grid
Division, then do further division to the sub- square grid, and the sub-block number path design used in the system is as shown in Figure 6.
Pass through sub-block number z of the expression formula as belonging to being calculated the pixel that pixel number is i in (5):
Z=x1×nTimex+y1 (5)
The pixel after image divides in each sub-block is obtained after traveling through all pixels by said process, that is, completes image and draws
The function of sub-module.In the present embodiment, sub-block number has 0,1,2,3 under symmetrical partition mode, and sub-block is compiled under asymmetric mode
Number have 0,1.
Finally distinguish 4 sub-blocks after output image division by 4 sub-block output ports.Picture in the sub-block each exported
Element is equally to store pixel value corresponding to pixel number with the data structure of one-dimension array, moreover, being based on four for Recursive Implementation
The image for pitching tree construction divides, and the pixel number in each sub-block will renumber since 0.
Further, in the present embodiment, when whether symmetrical division symbolizing position is 111, i.e. picture traverse divides number, height
When degree division number is equal to 2, it is as shown in Figure 7 to renumber mode for pixel in sub-block.When whether symmetrical division symbolizing position is 011
When, i.e., when picture traverse division number is equal to 1, height division number equal to 4, pixel renumbers mode such as Fig. 8 institutes in sub-block
Show.According to the explanation of asymmetric division in H.265 standard, it is asymmetric division image when, image is made up of two parts after division,
That is 1/4 part and 3/4 part, now the 0th quadrantal diagram picture exports 1/4 parts of images, 1st quadrant image in submodule output port
Export remaining 3/4 parts of images, pixel number mode is by that analogy in other sub-blocks.
Further, in the present embodiment, it is divided into using the image based on quad-tree structure of 256 grades of gray level images
Example, i.e., each pixel only has the image of a sample color, from most dark black to most bright white pixel value with 0~255
Represent, the coloured images of other arbitrary dimensions can also be realized according to thought provided by the invention meet H.265 standard based on
The image division of quad-tree structure.
Above is presently preferred embodiments of the present invention, all changes made according to technical solution of the present invention, caused function are made
During with scope without departing from technical solution of the present invention, protection scope of the present invention is belonged to.
Claims (9)
1. a kind of image dividing system based on quad-tree structure for meeting H.265 standard, it is characterised in that inputted including image
End, image division parameter input end, image analysis module, image buffer storage module and image division module；Described image parses
The image that module inputs to mirror described image input parses, and obtains view data；Described image cache module is to image
Data are cached, to coordinate the message transmission rate of system different piece；Described image division module receives described image and delayed
The image division parameter that view data and described image the division parameter input end that storing module provides provide, draws to image
Point.
2. the image dividing system based on quad-tree structure according to claim 1 for meeting H.265 standard, its feature exist
In described image parsing module parses to the image of input, obtains the height and the width data of image and each pixel
Corresponding pixel value, and a pixel number is distributed for each pixel in image, according to pixel number pair all in image
The data mode storage for the pixel value one-dimension array answered.
3. the image dividing system based on quad-tree structure according to claim 2 for meeting H.265 standard, its feature exist
In it is V to obtain picture altitude after note parsing, and width is H, and numbering is that the pixel value of i pixels is Pi, the volume of all pixels in image
Number path by between adjacent lines it is the first be connected in the way of；
The pixel value of pixel and pixel number are one-to-one relationship in image, pixel value P corresponding pixel number iiLetter
Number relation is as follows：
Pi=f (i)；
{i|0≤i≤V×H-1；i∈Z+}；
Remember that residing line number is x in the picture for pixel number i pixel, residing columns is y in the picture, then pixel number i
With the pixel in the picture residing line number x, columns y functional relation be shown below：
I=H × x+y；
{(x,y)|0≤x≤V-1,0≤y≤H-1；x,y∈Z+}。
4. the image dividing system based on quad-tree structure according to claim 2 for meeting H.265 standard, its feature exist
In described image cache module uses data buffer storage Fifo.
5. the image dividing system based on quad-tree structure according to claim 4 for meeting H.265 standard, its feature exist
In the pixel value of each pixel presses pixel number order, after inputting the data buffer storage Fifo using byte stream form, is conveyed to
Described image division module；After the completion of piece image division, described image division module is sent to the data cache module
One feedback signal, show that image division is completed；The data of lower piece image are conveyed to the figure by the data cache module again
As division module, preventing data contention causes image division error.
6. the image dividing system based on quad-tree structure according to claim 3 for meeting H.265 standard, its feature exist
In described image division module uses the image dividing mode based on quaternary tree, by the pixel of whole image in the direction of the clock
Four sub- square grids are divided into, and are organized into a quaternary tree；If contained pixel needs further to draw in sub- square grid
Point, then to the sub- square grid according to being counterclockwise further divided into four sub- square grids.
7. the image dividing system based on quad-tree structure according to claim 6 for meeting H.265 standard, its feature exist
In also comprising the following steps：
Step S1：Remember picture traverse division number nTimex, height divides number nTimey；
Determine that residing line number x, columns y, int [] represent round numbers in the picture for pixel that pixel number is i by following formula；
X=int [i ÷ H]
Y=int [i%H]
Step S2：It is determined as follows after pixel that pixel number is i is divided corresponding to residing line number x in the picture and schemes
Sub-block line number x as in1, the columns y of the sub-block after division corresponding to columns y in image1；
x1=int [x ÷ (V ÷ nTimey)]
y1=int [y ÷ (H ÷ nTimex)]
If x1More than or equal to nTimex, then x1From subtracting 1；If y1More than or equal to nTimex, then y1From subtracting 1；
Step S3：In the following way to obtaining the sub-block number z belonging to the pixel that pixel number is i：
Z=x1×nTimex+y1
Step S4：After traveling through all pixels by said process, the pixel in each sub-block after image divides is obtained；
Step S5：Distinguish 4 sub-blocks after output image division by 4 sub-block output ports；In the sub-block each exported
Pixel stores pixel value corresponding to pixel number using the data structure of one-dimension array, and the pixel number in each sub-block from
0 starts to renumber.
8. the image dividing system based on quad-tree structure according to claim 1 for meeting H.265 standard, its feature exist
In described image division parameter includes：Whether symmetrical division symbolizing position, picture traverse division number and height divide number.
9. the image dividing system based on quad-tree structure according to claim 8 for meeting H.265 standard, its feature exist
In described whether symmetrical division symbolizing position is one 3 bits；When it is described whether symmetrical division symbolizing position is 3 ' b1xx when,
Image is symmetrically divided, and including four kinds of symmetrical classified types, and pass through the lowest order in 3 bits and a time high position
Determine the type of present image partition mode；When whether symmetrical division symbolizing position is 3 ' b0xx when, asymmetric stroke is carried out to image
Point, and four kinds of asymmetric classified types, and mould is divided by the lowest order in 3 bits and time high-order decision present image
The type of formula.
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| CN103747272A (en) * | 2014-01-09 | 2014-04-23 | 西安电子科技大学 | Fast transformation method for residual quadtree coding in HEVC (high efficiency video coding) |
| CN105791868A (en) * | 2016-04-07 | 2016-07-20 | 北京中星微电子有限公司 | Video coding method and equipment |
| CN107133994A (en) * | 2017-05-05 | 2017-09-05 | 大连理工大学 | A kind of new image encryption method |
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| CN110572651A (en) * | 2018-06-05 | 2019-12-13 | 北京字节跳动网络技术有限公司 | extended quadtree depth computation |
| US11265584B2 (en) | 2018-06-05 | 2022-03-01 | Beijing Bytedance Network Technology Co., Ltd. | EQT depth calculation |
| US11381848B2 (en) | 2018-06-05 | 2022-07-05 | Beijing Bytedance Network Technology Co., Ltd. | Main concept of EQT, unequally four partitions and signaling |
| US11438635B2 (en) | 2018-06-05 | 2022-09-06 | Beijing Bytedance Network Technology Co., Ltd. | Flexible tree partitioning processes for visual media coding |
| US11445224B2 (en) | 2018-06-05 | 2022-09-13 | Beijing Bytedance Network Technology Co., Ltd. | Shape of EQT subblock |
| US11570482B2 (en) | 2018-06-05 | 2023-01-31 | Beijing Bytedance Network Technology Co., Ltd. | Restriction of extended quadtree |
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