CN105681807A - Method and device for calculating sub pixel motion vector based on H264 protocol - Google Patents
Method and device for calculating sub pixel motion vector based on H264 protocol Download PDFInfo
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- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
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- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
- H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
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- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/182—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being a pixel
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- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
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Abstract
The invention discloses a method and device for calculating a sub pixel motion vector based on an H264 protocol. The device is used for calculating the sub pixel motion vector of a macro block, and comprises a buffer unit, a main control unit, a reference frame reuse and maintenance unit, an SAD cost calculation unit and an SAD cost selection unit. In the process of calculating the sub pixel motion vector of the H264 protocol, an original block pixel is obtained based on the size of a 16 x 16 block, so that the reusability of original block pixels of a 8 x 8 block and a 4 x 4 block can be guaranteed; and when acquiring a reference block pixel, a corresponding relationship between integer pixel motion vectors is recorded according to the reference frame reuse and maintenance unit, reference block pixels of different sub-blocks of the integer pixel motion vectors are acquired selectively, and reference block pixels of the same integer pixel motion vector are not acquired repeatedly, so that the reusability of a reference pixel can be greatly improved, the calculation efficiency of the sub pixel motion vector can be improved, the power consumption can be saved, and the hardware cost can also be saved.
Description
Technical field
The present invention relates to computer chip field, particularly relate to a kind of point pixel motion vector computational methods and device based on H264 agreement.
Background technology
Along with the fast development of computer technology, communication technology, Internet technology and multimedia technology, the every aspect of people's daily life has been goed deep in multimedia application, and gradually changes the life style of people. Video is most commonly seen in multimedia application and that quantity of information is maximum media. At present, multimedia service develops into based on video from audio frequency for main, no matter being the Emerging multimedia application such as the conventional Multi Media application such as film, TV, video monitoring, or net streaming media video, videophone and video conference, video is all the ingredient of wherein core the most.
The agreement of Video coding has a variety of, and H264 agreement is exactly wherein important one. And in video coding process, calculate, by obtaining whole pixel motion vector, the important ring that point pixel motion vector is again Video coding step. Need to obtain original block pixel and reference block pixel owing to calculating a point pixel motion vector, and the pixel of reference block is based on whole pixel motion vector and obtains. Existing method often adopts, in the pixel obtaining reference block, the method obtained one by one, namely each original block pixel is required for going to obtain in corresponding buffer unit reference block pixel according to whole pixel motion vector, causes that when reference block pixel obtains, reusability is low, complex steps, power consumption are big, hardware area is big, high in cost of production problem.
Summary of the invention
For this, need to provide a kind of technical scheme calculated based on point pixel motion vector of H264 agreement, in order to solve in when dividing pixel motion vector of calculating video pixel block, owing to obtaining, reference block pixel step is loaded down with trivial details, reusability is low, causes that Video coding power consumption is big, hardware area big, high in cost of production problem.
For achieving the above object, inventor providing a kind of point pixel motion vector calculation element based on H264 agreement, described device is for point pixel motion vector of computing macro block, and described macro block is divided into multiple 16x16 sub-block; Each 16x16 sub-block is divided into 4 8x8 sub-blocks, and each 8x8 sub-block is divided into 4 4x4 sub-blocks; Described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit; Described buffer unit is connected with main control unit, described main control unit is connected with reference frame multiplexing maintenance unit, described reference frame multiplexing maintenance unit is connected with SAD cost calculating unit, described SAD cost calculating unit is chosen unit with SAD cost and is connected, and described SAD cost is chosen unit and is connected with main control unit; Described buffer unit includes the first cache module, the second cache module, the 3rd cache module; Described main control unit includes acquiring unit and register cell; Described acquiring unit includes the first acquisition module, the second module obtains and the 3rd acquisition module; Described register cell includes the first register cell and the second register cell;
Described first acquisition module for obtaining the whole pixel motion vector of 16x16 sub-block from described first cache module, described whole pixel motion vector includes the first whole pixel motion vector, the second pixel motion vector and the 3rd whole pixel vector, described first whole pixel motion vector is the whole pixel motion vector of 16x16 layer in 16x16 sub-block, described second whole pixel motion vector is the whole pixel motion vector of 8x8 layer in 16x16 sub-block, and described 3rd whole pixel motion vector is the whole pixel motion vector of 4x4 layer in 16x16 sub-block;
Described reference frame multiplexing maintenance unit is for recording corresponding relation between whole pixel motion vector, and the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block;
Described second acquisition module for obtaining the original block pixel that 16x16 sub-block is corresponding from described second cache module, and described first register cell is used for the original block pixel that buffer memory 16x16 sub-block is corresponding;
Described 3rd acquisition module for according to the corresponding relation between whole pixel motion vector, obtaining reference block pixel from described 3rd cache module, and described second register cell is used for buffer memory reference block pixel;
Described SAD cost calculating unit for obtaining original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location;
Described SAD cost chooses unit for the reference block pixel SAD cost of diverse location being compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel;
Described main control unit chooses, for receiving SAD cost, point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector.
Further, described " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the second pixel motion vector of the 8x8 sub-block of 8x8 layer and the first whole pixel motion vector are identical, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
Further, described " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of reference frame multiplexing maintenance unit record is identical with the second pixel motion vector of the 8x8 sub-block of a upper 8x8 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
Further, described " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the 3rd pixel motion vector of the 4x4 sub-block of the 4x4 layer of reference frame multiplexing maintenance unit record is identical with the 3rd pixel motion vector of the 4x4 sub-block of a upper 4x4 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
Further, described " main control unit for will point pixel motion vector write in the first cache module " including: main control unit is for writing in the first cache module after being packed by the whole pixel motion vector that point pixel motion vector is corresponding with this point of pixel motion vector.
Inventor additionally provides a kind of point pixel motion vector computational methods based on H264 agreement, described method is applied to point pixel motion vector calculation element based on H264 agreement, described device is for point pixel motion vector of computing macro block, and described macro block is divided into multiple 16x16 sub-block; Each 16x16 sub-block is divided into 4 8x8 sub-blocks, and each 8x8 sub-block is divided into 4 4x4 sub-blocks; Described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit; Described buffer unit is connected with main control unit, described main control unit is connected with reference frame multiplexing maintenance unit, described reference frame multiplexing maintenance unit is connected with SAD cost calculating unit, described SAD cost calculating unit is chosen unit with SAD cost and is connected, and described SAD cost is chosen unit and is connected with main control unit; Described buffer unit includes the first cache module, the second cache module, the 3rd cache module; Described main control unit includes acquiring unit and register cell; Described acquiring unit includes the first acquisition module, the second module obtains and the 3rd acquisition module; Described register cell includes the first register cell and the second register cell; Described method comprises the steps:
First acquisition module obtains the whole pixel motion vector of 16x16 sub-block from described first cache module, described whole pixel motion vector includes the first whole pixel motion vector, the second pixel motion vector and the 3rd whole pixel vector, described first whole pixel motion vector is the whole pixel motion vector of 16x16 layer in 16x16 sub-block, described second whole pixel motion vector is the whole pixel motion vector of 8x8 layer in 16x16 sub-block, and described 3rd whole pixel motion vector is the whole pixel motion vector of 4x4 layer in 16x16 sub-block;
Reference frame multiplexing maintenance unit records the corresponding relation between whole pixel motion vector, and the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block;
Second acquisition module obtains the original block pixel that 16x16 sub-block is corresponding, the original block pixel that described first register cell buffer memory 16x16 sub-block is corresponding from described second cache module;
3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel, described second register cell buffer memory reference block pixel from described 3rd cache module;
SAD cost calculating unit obtains original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location;
SAD cost is chosen unit and the reference block pixel SAD cost of diverse location is compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel;
Main control unit receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector.
Further, described step " the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module " including:
If the second pixel motion vector of the 8x8 sub-block of 8x8 layer and the first whole pixel motion vector are identical, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
Further, described step " the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module " including:
If the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of reference frame multiplexing maintenance unit record is identical with the second pixel motion vector of the 8x8 sub-block of a upper 8x8 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
Further, described step " the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module " including:
If the 3rd pixel motion vector of the 4x4 sub-block of the 4x4 layer of reference frame multiplexing maintenance unit record is identical with the 3rd pixel motion vector of the 4x4 sub-block of a upper 4x4 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
Further, described step " main control unit will divide a pixel motion vector to write in the first cache module " including:
Main control unit writes in the first cache module after being packed by the whole pixel motion vector that point pixel motion vector is corresponding with this point of pixel motion vector.
Point pixel motion vector computational methods and device based on H264 agreement described in technique scheme, described method is applied to described device, described device is for point pixel motion vector of computing macro block, described method comprises the steps: that first the first acquisition module obtains the whole pixel motion vector of 16x16 sub-block from described first cache module; Then reference frame multiplexing maintenance unit records the corresponding relation between whole pixel motion vector; Then the second acquisition module for obtaining the original block pixel that 16x16 sub-block is corresponding from described second cache module; Then the 3rd acquisition module is according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module, and described second register cell is used for buffer memory reference block pixel;
SAD cost calculating unit for obtaining original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location;
SAD cost is chosen unit and the reference block pixel SAD cost of diverse location is compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel;
Main control unit receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector.
Point pixel motion vector computational methods and device based on H264 agreement described in such scheme, described method is applied to point pixel motion vector calculation element based on H264 agreement, described device is for point pixel motion vector of computing macro block, and described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit. Described method comprises the steps: that first the first acquisition module obtains the whole pixel motion vector of 16x16 sub-block from described first cache module; Then reference frame multiplexing maintenance unit records the corresponding relation between whole pixel motion vector; Then the second acquisition module obtains the original block pixel that 16x16 sub-block is corresponding from described second cache module, and the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module; Then SAD cost calculating unit obtains original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location; Then SAD cost is chosen unit and the reference block pixel SAD cost of diverse location is compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel; Then main control unit receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector. So, in point pixel motion vector process calculating H264 agreement, acquired original block pixel obtains based on the size of 16x16 block, it is ensured that the durability of the original block pixel of 8x8 block and 4x4 block; When obtaining reference block pixel, the corresponding relation between whole pixel motion vector is recorded according to reference frame multiplexing maintenance unit, the reference block pixel optionally obtaining each layer (16x16 layer, 8x8 layer and 4x4 layer) being absent from multiplexed situation obtains, for can multiplexing reference block pixel then be not repeated obtain, thus substantially increasing the reusability of reference pixel, and improve the computational efficiency of point pixel motion vector, save power consumption, also a saving hardware cost simultaneously.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of point pixel motion vector calculation element based on H264 agreement that an embodiment of the present invention relates to;
Fig. 2 is the flow chart of point pixel motion vector computational methods based on H264 agreement that an embodiment of the present invention relates to.
Detailed description of the invention
By describing the technology contents of technical scheme, structural feature in detail, being realized purpose and effect, below in conjunction with specific embodiment and coordinate accompanying drawing to be explained in detail.
Refer to Fig. 1, for the schematic diagram of point pixel motion vector calculation element based on H264 agreement that an embodiment of the present invention relates to. Described device is for point pixel motion vector of computing macro block, and described macro block is divided into multiple 16x16 sub-block; Each 16x16 sub-block is divided into 4 8x8 sub-blocks, and each 8x8 sub-block is divided into 4 4x4 sub-blocks; Described device includes buffer unit, main control unit 109, reference frame multiplexing maintenance unit 106, SAD cost calculating unit 107, SAD cost choose unit 108; Described buffer unit is connected with main control unit, described main control unit is connected with reference frame multiplexing maintenance unit, described reference frame multiplexing maintenance unit is connected with SAD cost calculating unit, described SAD cost calculating unit is chosen unit with SAD cost and is connected, and described SAD cost is chosen unit and is connected with main control unit; Described buffer unit includes first cache module the 101, second cache module the 102, the 3rd cache module 105; Described main control unit 109 includes acquiring unit 103 and register cell 104; Described acquiring unit 103 includes the first acquisition module the 113, second module acquisition 123 and the 3rd acquisition module 133; Described register cell 104 includes the first register cell 114 and the second register cell 124;
Described first acquisition module 113 for obtaining the whole pixel motion vector of 16x16 sub-block from described first cache module, described whole pixel motion vector includes the first whole pixel motion vector, the second pixel motion vector and the 3rd whole pixel vector, described first whole pixel motion vector is the whole pixel motion vector of 16x16 layer in 16x16 sub-block, described second whole pixel motion vector is the whole pixel motion vector of 8x8 layer in 16x16 sub-block, and described 3rd whole pixel motion vector is the whole pixel motion vector of 4x4 layer in 16x16 sub-block;
Described reference frame multiplexing maintenance unit 106 is for recording the corresponding relation between whole pixel motion vector, and the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block;
Described second acquisition module 123 for obtaining the original block pixel that 16x16 sub-block is corresponding from described second cache module, and described first register cell is used for the original block pixel that buffer memory 16x16 sub-block is corresponding;
Described 3rd acquisition module 133 for according to the corresponding relation between whole pixel motion vector, obtaining reference block pixel from described 3rd cache module, and described second register cell is used for buffer memory reference block pixel;
Described SAD cost calculating unit 107 for obtaining original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location;
Described SAD cost chooses unit 108 for the reference block pixel SAD cost of diverse location being compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel;
Described main control unit 109 chooses, for receiving SAD cost, point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector.
When using point pixel motion vector calculation element based on H264 agreement, first the first acquisition module 113 obtains the whole pixel motion vector of 16x16 sub-block from described first cache module. Described first cache module is the electronic component with storage data function, for instance can be ROM memory. For each 16x16 sub-block, " three layers " structure can be divided into, i.e. 16x16 layer, 8x8 layer and 4x4 layer. For 16x16 layer, namely carrying out dividing in units of 16x16,16x16 sub-block can be divided into 1 16x16 block, thus the whole pixel motion vector that each 16x16 sub-block is to there being 1 16x16 layer, i.e. the first whole pixel motion vector. For 8x8 layer, namely carrying out dividing in units of 8x8,16x16 sub-block can be divided into 4 8x8 blocks, thus the whole pixel motion vector that each 16x16 sub-block is to there being 4 16x16 layers, i.e. the second whole pixel motion vector. For 4x4 layer, namely carrying out dividing in units of 4x4,16x16 sub-block can be divided into 16 4x4 blocks, thus the whole pixel motion vector that each 16x16 sub-block is to there being 16 4x4 layers, i.e. the 3rd whole pixel motion vector. To sum up, in when dividing pixel motion vector of each 16x16 sub-block of calculating, the first acquisition module needs to obtain 1 16x16 layer, 4 8x8 layers and 16 4x4 layers from described first cache module and amounts to 21 whole pixel motion vectors.
Described reference frame multiplexing maintenance unit 106 is for recording the corresponding relation between whole pixel motion vector, and the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block. In the present embodiment, in when dividing pixel motion vector of calculating 16x16 layer, the block being also based on 8x8 size is that unit is calculated, thus the corresponding relation of the first whole pixel motion vector and the second pixel motion vector specifically includes: whether the first whole pixel motion vector and second pixel motion vector of the 8x8 sub-block of record same position be identical.
Such as 16x16 layer, include the 8x8 sub-block of 4 16x16 layers, be 8x8 sub-block 1,8x8 sub-block 2,8x8 sub-block 3 and 8x8 sub-block 4 respectively. For 8x8 layer, include the 8x8 sub-block of 4 8x8 layers, be 8x8 sub-block a, 8x8 sub-block b, 8x8 sub-block c and 8x8 sub-block d respectively. The position of 8x8 sub-block a and 8x8 sub-block 1 is corresponding, and the position of 8x8 sub-block b and 8x8 sub-block 2 is corresponding, and the position of 8x8 sub-block c and 8x8 sub-block 3 is corresponding, and the position of 8x8 sub-block d and 8x8 sub-block 4 is corresponding. Then reference frame multiplexing maintenance unit can judge that whether 8x8 sub-block a is identical with the whole pixel motion vector of 8x8 sub-block 1, if identical, illustrate that the reference pixel of the two sub-block is can the 8x8 sub-block of multiplexing reference pixel, illustrating that their SAD cost is identical, point pixel motion vector namely calculated is identical. Thus when calculating the SAD cost of the 8x8 sub-block a of 8x8 layer, calculation procedure can be skipped, and the SAD cost of the 8x8 sub-block 1 of the computed 16x16 layer obtained before directly adopting, on the one hand without reacquiring the reference pixel of 8x8 sub-block 1, save calculation procedure and power consumption, avoid the different sub-block double counting SAD costs of identical whole pixel fraction vector on the other hand, substantially increase code efficiency.
Then the second acquisition module obtains the original block pixel that 16x16 sub-block is corresponding, the original block pixel that described first register cell buffer memory 16x16 sub-block is corresponding from described second cache module. In the present embodiment, acquisition original block pixel is based on 16x16 sub-block is that unit obtains. So, calculate each 16x16 sub-block point pixel motion vector time, just get disposable for the original block pixel of required different layers in main control unit, and pass through the first register cell in addition buffer memory. Owing to being no matter 4 8x8 blocks of 16x16 layer, or 4 8x8 blocks of 8x8 layer, or the 16 of 4x4 layer 4x4 blocks, the original block pixel of they correspondences is both contained in the original block pixel of 16x16 sub-block, thus when calculating the SAD cost of each different straton block, second acquisition module only need to obtain from the first register cell, without obtaining from the second cache module several times, thus improve the extent for multiplexing of original block pixel again.
Then the 3rd acquisition module is according to the corresponding relation between whole pixel motion vector, obtains reference block pixel, described second register cell buffer memory reference block pixel from described 3rd cache module. In the present embodiment, described " the 3rd acquisition module is according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of reference frame multiplexing maintenance unit record is identical with the second pixel motion vector of the 8x8 sub-block of a upper 8x8 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
In the present embodiment, the corresponding relation of the second whole pixel motion vector of 8x8 layer difference 8x8 sub-block specifically includes: whether the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of record adjacent encoder order is identical. Such as 8x8 layer includes the 8x8 sub-block of 4 8x8 layers, is 8x8 sub-block a, 8x8 sub-block b, 8x8 sub-block c and 8x8 sub-block d respectively. Coded sequence is sub-block a, sub-block b, sub-block c and sub-block d successively. So reference frame multiplexing maintenance unit can judge that whether the second pixel motion vector between 8x8 sub-block a and 8x8 sub-block b, between 8x8 sub-block b and 8x8 sub-block c, between 8x8 sub-block c and 8x8 sub-block d is identical successively, and result is given record. Second pixel motion vector of such as sub-block a and sub-block b is identical, then illustrate the reference pixel of the two sub-block be can the 8x8 sub-block of multiplexing reference pixel, illustrate that their SAD cost is identical, point pixel motion vector namely calculated is identical. Thus when calculating the SAD cost of the 8x8 sub-block b of 8x8 layer, calculation procedure can be skipped, and the SAD cost of the 8x8 sub-block a of the computed 8x8 layer obtained before directly adopting, on the one hand without reacquiring the reference pixel of 8x8 sub-block b, save calculation procedure and power consumption, avoid the different sub-block double counting SAD costs of identical whole pixel fraction vector on the other hand, substantially increase code efficiency. The corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block in like manner can obtain, and specifically includes: whether the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of record adjacent encoder order is identical. And if second pixel motion vector of sub-block a and sub-block b is different, then the result of calculation of the SAD cost between two sub-blocks of explanation is different, thus when calculating the SAD cost of sub-block b, need from the 3rd cache module, obtain reference block pixel corresponding to sub-block b, in order to the SAD continuing sub-block b calculates.
In some embodiments, described " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the 3rd pixel motion vector of the 4x4 sub-block of the 4x4 layer of reference frame multiplexing maintenance unit record is identical with the 3rd pixel motion vector of the 4x4 sub-block of a upper 4x4 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
For 4x4 layer, include the 4x4 sub-block of 16 4x4 layers, for front 4 4x4 sub-blocks that 4x4 layer sorts according to coded sequence, be 4x4 sub-block 1,4x4 sub-block 2,4x4 sub-block 3 and 4x4 sub-block 4 respectively. reference frame multiplexing maintenance unit can judge between 4x4 sub-block 1 and 4x4 sub-block 2, whether the 3rd whole pixel motion vector between 4x4 sub-block 2 and 4x4 sub-block 3, between 4x4 sub-block 3 and 4x4 sub-block 4 is identical, and result is stored record. when obtaining the reference block pixel of 4x4 sub-block 1,3rd acquiring unit can obtain a reference block being several times as much as 4x4 sub-block size from the 3rd cache module, and by acquired reference block picture element caching in the second depositor, such as in the present embodiment, acquired reference block be sized to 32x10 or 10x32 size. when calculating the SAD cost of 4x4 sub-block 2, if the 3rd whole pixel motion vector is identical between the 4x4 sub-block 1 that reference frame multiplexing maintenance unit records and 4x4 sub-block 2, then illustrate that the reference pixel of 4x4 sub-block 1 and 4x4 sub-block 2 is can the 4x4 sub-block of multiplexing reference pixel, illustrating that their SAD cost is identical, point pixel motion vector namely calculated is identical. thus when calculating the SAD cost of 4x4 sub-block 2, calculation procedure can be skipped, and the SAD cost of the computed 4x4 sub-block 1 obtained before directly adopting, on the one hand without reacquiring the reference pixel of 4x4 sub-block 2, save calculation procedure and power consumption, avoid the different sub-block double counting SAD costs of identical whole pixel fraction vector on the other hand, substantially increase code efficiency. if and 4x4 sub-block 1 is different from the 3rd whole pixel motion vector of 4x4 sub-block 2, then illustrate that the reference block pixel that they to obtain is different, thus first the 3rd acquisition module can search for the reference block pixel whether also existed needed for 4x4 sub-block 2 in the second depositor, (due to buffer memory is a reference block being several times as much as 4x4 sub-block size, thus first can scan in the second depositor), if existing, the 3rd acquisition module obtains the reference block pixel of 4x4 sub-block 2 correspondence from the second depositor, to carry out the calculating of the SAD cost of 4x4 sub-block 2, if being absent from, the 3rd acquisition module can obtain a reference block being several times as much as 4x4 sub-block size again from the 3rd buffer unit, and by acquired reference block picture element caching (refresh register) in the second depositor, then repeat the above steps reacquires the reference block pixel needed for 4x4 sub-block 2 from the second depositor.
Then SAD cost calculating unit 107 obtains original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location. SAD cost can be a numerical value, call parameter needed for calculating the SAD cost of certain block of pixels is original block pixel corresponding to this block of pixels and reference block pixel, specifically, in H264 agreement, for each reference block pixel, SAD cost calculating unit interpolation can go out the reference block pixel of 49 diverse locations in its vicinity, and the SAD cost that the reference block pixel that calculates these 49 diverse locations respectively is corresponding, and concrete algorithm is according to H264 agreement.
Then SAD cost is chosen unit and the reference block pixel SAD cost of diverse location is compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel. SAD cost is characterize the physical quantity whether this reference block pixel is optimum reference block pixel, and SAD cost is more little, illustrates that reference block pixel is closer to original block pixel. SAD cost is chosen the reference block pixel of 49 diverse locations that unit can go out from institute's interpolation, choose the SAD cost value of the reference block pixel of SAD Least-cost, and calculating point pixel motion vector of this reference block pixel and original block pixel, calculated point of pixel motion vector is point pixel motion vector of acquired original block pixel. So far, pixel motion vector is divided to calculate complete, it is possible to enter next step.
Then main control unit 109 receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector. In the present embodiment, described " main control unit will point pixel motion vector write in the first cache module " including: main control unit is for writing in the first cache module after being packed by the whole pixel motion vector that point pixel motion vector is corresponding with this point of pixel motion vector.
Refer to Fig. 2, and inventor additionally provides a kind of point pixel motion vector computational methods based on H264 agreement, described method is applied to point pixel motion vector calculation element based on H264 agreement, described device is for point pixel motion vector of computing macro block, and described macro block is divided into multiple 16x16 sub-block; Each 16x16 sub-block is divided into 4 8x8 sub-blocks, and each 8x8 sub-block is divided into 4 4x4 sub-blocks; It is characterized in that, described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit; Described buffer unit is connected with main control unit, described main control unit is connected with reference frame multiplexing maintenance unit, described reference frame multiplexing maintenance unit is connected with SAD cost calculating unit, described SAD cost calculating unit is chosen unit with SAD cost and is connected, and described SAD cost is chosen unit and is connected with main control unit; Described buffer unit includes the first cache module, the second cache module, the 3rd cache module; Described main control unit includes acquiring unit and register cell; Described acquiring unit includes the first acquisition module, the second module obtains and the 3rd acquisition module; Described register cell includes the first register cell and the second register cell; Described method comprises the steps:
Initially enter step S201 the first acquisition module from described first cache module, obtain the whole pixel motion vector of 16x16 sub-block. Described first cache module is the electronic component with storage data function, for instance can be ROM memory. For each 16x16 sub-block, " three layers " structure can be divided into, i.e. 16x16 layer, 8x8 layer and 4x4 layer. For 16x16 layer, namely carrying out dividing in units of 16x16,16x16 sub-block can be divided into 1 16x16 block, thus the whole pixel motion vector that each 16x16 sub-block is to there being 1 16x16 layer, i.e. the first whole pixel motion vector. For 8x8 layer, namely carrying out dividing in units of 8x8,16x16 sub-block can be divided into 4 8x8 blocks, thus the whole pixel motion vector that each 16x16 sub-block is to there being 4 16x16 layers, i.e. the second whole pixel motion vector. For 4x4 layer, namely carrying out dividing in units of 4x4,16x16 sub-block can be divided into 16 4x4 blocks, thus the whole pixel motion vector that each 16x16 sub-block is to there being 16 4x4 layers, i.e. the 3rd whole pixel motion vector. To sum up, in when dividing pixel motion vector of each 16x16 sub-block of calculating, the first acquisition module needs to obtain 1 16x16 layer, 4 8x8 layers and 16 4x4 layers from described first cache module and amounts to 21 whole pixel motion vectors.
Then entering step S203 reference frame multiplexing maintenance unit and record the corresponding relation between whole pixel motion vector, the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block. In the present embodiment, in when dividing pixel motion vector of calculating 16x16 layer, the block being also based on 8x8 size is that unit is calculated, thus the corresponding relation of the first whole pixel motion vector and the second pixel motion vector specifically includes: whether the first whole pixel motion vector and second pixel motion vector of the 8x8 sub-block of record same position be identical.
Such as 16x16 layer, include the 8x8 sub-block of 4 16x16 layers, be 8x8 sub-block 1,8x8 sub-block 2,8x8 sub-block 3 and 8x8 sub-block 4 respectively. For 8x8 layer, include the 8x8 sub-block of 4 8x8 layers, be 8x8 sub-block a, 8x8 sub-block b, 8x8 sub-block c and 8x8 sub-block d respectively. The position of 8x8 sub-block a and 8x8 sub-block 1 is corresponding, and the position of 8x8 sub-block b and 8x8 sub-block 2 is corresponding, and the position of 8x8 sub-block c and 8x8 sub-block 3 is corresponding, and the position of 8x8 sub-block d and 8x8 sub-block 4 is corresponding. Then reference frame multiplexing maintenance unit can judge that whether 8x8 sub-block a is identical with the whole pixel motion vector of 8x8 sub-block 1, if identical, illustrate that the reference pixel of the two sub-block is can the 8x8 sub-block of multiplexing reference pixel, illustrating that their SAD cost is identical, point pixel motion vector namely calculated is identical. Thus when calculating the SAD cost of the 8x8 sub-block a of 8x8 layer, calculation procedure can be skipped, and the SAD cost of the 8x8 sub-block 1 of the computed 16x16 layer obtained before directly adopting, on the one hand without reacquiring the reference pixel of 8x8 sub-block 1, save calculation procedure and power consumption, avoid the different sub-block double counting SAD costs of identical whole pixel fraction vector on the other hand, substantially increase code efficiency.
Then enter step S203 the second acquisition module from described second cache module, obtain the original block pixel that 16x16 sub-block is corresponding, the original block pixel that described first register cell buffer memory 16x16 sub-block is corresponding. In the present embodiment, acquisition original block pixel is based on 16x16 sub-block is that unit obtains. So, calculate each 16x16 sub-block point pixel motion vector time, just get disposable for the original block pixel of required different layers in main control unit, and pass through the first register cell in addition buffer memory. Owing to being no matter 4 8x8 blocks of 16x16 layer, or 4 8x8 blocks of 8x8 layer, or the 16 of 4x4 layer 4x4 blocks, the original block pixel of they correspondences is both contained in the original block pixel of 16x16 sub-block, thus when calculating the SAD cost of each different straton block, second acquisition module only need to obtain from the first register cell, without obtaining from the second cache module several times, thus improve the extent for multiplexing of original block pixel again.
Then enter step S204 the 3rd acquisition module according to the corresponding relation between whole pixel motion vector, from described 3rd cache module, obtain reference block pixel, described second register cell buffer memory reference block pixel. In the present embodiment, described " the 3rd acquisition module is according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of reference frame multiplexing maintenance unit record is identical with the second pixel motion vector of the 8x8 sub-block of a upper 8x8 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
In the present embodiment, the corresponding relation of the second whole pixel motion vector of 8x8 layer difference 8x8 sub-block specifically includes: whether the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of record adjacent encoder order is identical. Such as 8x8 layer includes the 8x8 sub-block of 4 8x8 layers, is 8x8 sub-block a, 8x8 sub-block b, 8x8 sub-block c and 8x8 sub-block d respectively. Coded sequence is sub-block a, sub-block b, sub-block c and sub-block d successively. So reference frame multiplexing maintenance unit can judge that whether the second pixel motion vector between 8x8 sub-block a and 8x8 sub-block b, between 8x8 sub-block b and 8x8 sub-block c, between 8x8 sub-block c and 8x8 sub-block d is identical successively, and result is given record. Second pixel motion vector of such as sub-block a and sub-block b is identical, then illustrate the reference pixel of the two sub-block be can the 8x8 sub-block of multiplexing reference pixel, illustrate that their SAD cost is identical, point pixel motion vector namely calculated is identical. Thus when calculating the SAD cost of the 8x8 sub-block b of 8x8 layer, calculation procedure can be skipped, and the SAD cost of the 8x8 sub-block a of the computed 8x8 layer obtained before directly adopting, on the one hand without reacquiring the reference pixel of 8x8 sub-block b, save calculation procedure and power consumption, avoid the different sub-block double counting SAD costs of identical whole pixel fraction vector on the other hand, substantially increase code efficiency. The corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block in like manner can obtain, and specifically includes: whether the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of record adjacent encoder order is identical. And if second pixel motion vector of sub-block a and sub-block b is different, then the result of calculation of the SAD cost between two sub-blocks of explanation is different, thus when calculating the SAD cost of sub-block b, need from the 3rd cache module, obtain reference block pixel corresponding to sub-block b, in order to the SAD continuing sub-block b calculates.
In some embodiments, described " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the 3rd pixel motion vector of the 4x4 sub-block of the 4x4 layer of reference frame multiplexing maintenance unit record is identical with the 3rd pixel motion vector of the 4x4 sub-block of a upper 4x4 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
For 4x4 layer, include the 4x4 sub-block of 16 4x4 layers, for front 4 4x4 sub-blocks that 4x4 layer sorts according to coded sequence, be 4x4 sub-block 1,4x4 sub-block 2,4x4 sub-block 3 and 4x4 sub-block 4 respectively. reference frame multiplexing maintenance unit can judge between 4x4 sub-block 1 and 4x4 sub-block 2, whether the 3rd whole pixel motion vector between 4x4 sub-block 2 and 4x4 sub-block 3, between 4x4 sub-block 3 and 4x4 sub-block 4 is identical, and result is stored record. when obtaining the reference block pixel of 4x4 sub-block 1,3rd acquiring unit can obtain a reference block being several times as much as 4x4 sub-block size from the 3rd cache module, and by acquired reference block picture element caching in the second depositor, such as in the present embodiment, acquired reference block be sized to 32x10 or 10x32 size. when calculating the SAD cost of 4x4 sub-block 2, if the 3rd whole pixel motion vector is identical between the 4x4 sub-block 1 that reference frame multiplexing maintenance unit records and 4x4 sub-block 2, then illustrate that the reference pixel of 4x4 sub-block 1 and 4x4 sub-block 2 is can the 4x4 sub-block of multiplexing reference pixel, illustrating that their SAD cost is identical, point pixel motion vector namely calculated is identical. thus when calculating the SAD cost of 4x4 sub-block 2, calculation procedure can be skipped, and the SAD cost of the computed 4x4 sub-block 1 obtained before directly adopting, on the one hand without reacquiring the reference pixel of 4x4 sub-block 2, save calculation procedure and power consumption, avoid the different sub-block double counting SAD costs of identical whole pixel fraction vector on the other hand, substantially increase code efficiency. if and 4x4 sub-block 1 is different from the 3rd whole pixel motion vector of 4x4 sub-block 2, then illustrate that the reference block pixel that they to obtain is different, thus first the 3rd acquisition module can search for the reference block pixel whether also existed needed for 4x4 sub-block 2 in the second depositor, (due to buffer memory is a reference block being several times as much as 4x4 sub-block size, thus first can scan in the second depositor), if existing, the 3rd acquisition module obtains the reference block pixel of 4x4 sub-block 2 correspondence from the second depositor, to carry out the calculating of the SAD cost of 4x4 sub-block 2, if being absent from, the 3rd acquisition module can obtain a reference block being several times as much as 4x4 sub-block size again from the 3rd buffer unit, and by acquired reference block picture element caching (refresh register) in the second depositor, then repeat the above steps reacquires the reference block pixel needed for 4x4 sub-block 2 from the second depositor.
Then enter step S205SAD cost calculating unit from described first register cell, obtain original block pixel, and obtain reference block pixel from described second register cell, and carry out SAD cost calculating, obtain the reference block pixel SAD cost of multiple diverse location. SAD cost can be a numerical value, call parameter needed for calculating the SAD cost of certain block of pixels is original block pixel corresponding to this block of pixels and reference block pixel, specifically, in H264 agreement, for each reference block pixel, SAD cost calculating unit interpolation can go out the reference block pixel of 49 diverse locations in its vicinity, and the SAD cost that the reference block pixel that calculates these 49 diverse locations respectively is corresponding, and concrete algorithm is according to H264 agreement.
Then enter step S206SAD cost to choose unit and the reference block pixel SAD cost of diverse location compared, choose the SAD cost value of the reference block pixel of SAD Least-cost, and calculate point pixel motion vector of this reference block pixel and original block pixel. SAD cost is characterize the physical quantity whether this reference block pixel is optimum reference block pixel, and SAD cost is more little, illustrates that reference block pixel is closer to original block pixel. SAD cost is chosen the reference block pixel of 49 diverse locations that unit can go out from institute's interpolation, choose the SAD cost value of the reference block pixel of SAD Least-cost, and calculating point pixel motion vector of this reference block pixel and original block pixel, calculated point of pixel motion vector is point pixel motion vector of acquired original block pixel. So far, pixel motion vector is divided to calculate complete, it is possible to enter next step.
Then entrance step S207 main control unit 109 receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector. In the present embodiment, described " main control unit will point pixel motion vector write in the first cache module " including: main control unit is for writing in the first cache module after being packed by the whole pixel motion vector that point pixel motion vector is corresponding with this point of pixel motion vector.
Point pixel motion vector computational methods and device based on H264 agreement described in such scheme, described method is applied to point pixel motion vector calculation element based on H264 agreement, described device is for point pixel motion vector of computing macro block, and described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit. Described method comprises the steps: that first the first acquisition module obtains the whole pixel motion vector of 16x16 sub-block from described first cache module; Then reference frame multiplexing maintenance unit records the corresponding relation between whole pixel motion vector; Then the second acquisition module obtains the original block pixel that 16x16 sub-block is corresponding from described second cache module, and the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module; Then SAD cost calculating unit obtains original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location; Then SAD cost is chosen unit and the reference block pixel SAD cost of diverse location is compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel; Then main control unit receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector. So, in point pixel motion vector process calculating H264 agreement, acquired original block pixel obtains based on the size of 16x16 block, it is ensured that the durability of the original block pixel of 8x8 block and 4x4 block; When obtaining reference block pixel, the corresponding relation between whole pixel motion vector is recorded according to reference frame multiplexing maintenance unit, the reference block pixel optionally obtaining each layer (16x16 layer, 8x8 layer and 4x4 layer) being absent from multiplexed situation obtains, for can multiplexing reference block pixel then be not repeated obtain, thus substantially increasing the reusability of reference pixel, and improve the computational efficiency of point pixel motion vector, save power consumption, also a saving hardware cost simultaneously.
It should be noted that, in this article, the relational terms of such as first and second or the like is used merely to separate an entity or operation with another entity or operating space, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially. And, term " includes ", " comprising " or its any other variant are intended to comprising of nonexcludability, so that include the process of a series of key element, method, article or terminal unit not only include those key elements, but also include other key elements being not expressly set out, or also include the key element intrinsic for this process, method, article or terminal unit. When there is no more restriction, statement " including ... " or " comprising ... " key element limited, it is not excluded that there is also other key element in including the process of described key element, method, article or terminal unit. Additionally, in this article, " more than ", " less than ", " exceeding " etc. be interpreted as not including this number; " more than ", " below ", " within " etc. be interpreted as including this number.
Although the various embodiments described above being described; but those skilled in the art are once know basic creative concept; then these embodiments can be made other change and amendment; so the foregoing is only embodiments of the invention; not thereby the scope of patent protection of the present invention is limited; every equivalent structure utilizing description of the present invention and accompanying drawing content to make or equivalence flow process conversion; or directly or indirectly it is used in other relevant technical fields, all in like manner include within the scope of patent protection of the present invention.
Claims (10)
1., based on a point pixel motion vector calculation element for H264 agreement, described device is for point pixel motion vector of computing macro block, it is characterised in that described macro block is divided into multiple 16x16 sub-block; Each 16x16 sub-block is divided into 4 8x8 sub-blocks, and each 8x8 sub-block is divided into 4 4x4 sub-blocks; Described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit; Described buffer unit is connected with main control unit, described main control unit is connected with reference frame multiplexing maintenance unit, described reference frame multiplexing maintenance unit is connected with SAD cost calculating unit, described SAD cost calculating unit is chosen unit with SAD cost and is connected, and described SAD cost is chosen unit and is connected with main control unit; Described buffer unit includes the first cache module, the second cache module, the 3rd cache module; Described main control unit includes acquiring unit and register cell; Described acquiring unit includes the first acquisition module, the second module obtains and the 3rd acquisition module; Described register cell includes the first register cell and the second register cell;
Described first acquisition module for obtaining the whole pixel motion vector of 16x16 sub-block from described first cache module, described whole pixel motion vector includes the first whole pixel motion vector, the second pixel motion vector and the 3rd whole pixel vector, described first whole pixel motion vector is the whole pixel motion vector of 16x16 layer in 16x16 sub-block, described second whole pixel motion vector is the whole pixel motion vector of 8x8 layer in 16x16 sub-block, and described 3rd whole pixel motion vector is the whole pixel motion vector of 4x4 layer in 16x16 sub-block;
Described reference frame multiplexing maintenance unit is for recording corresponding relation between whole pixel motion vector, and the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block;
Described second acquisition module for obtaining the original block pixel that 16x16 sub-block is corresponding from described second cache module, and described first register cell is used for the original block pixel that buffer memory 16x16 sub-block is corresponding;
Described 3rd acquisition module for according to the corresponding relation between whole pixel motion vector, obtaining reference block pixel from described 3rd cache module, and described second register cell is used for buffer memory reference block pixel;
Described SAD cost calculating unit for obtaining original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location;
Described SAD cost chooses unit for the reference block pixel SAD cost of diverse location being compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel;
Described main control unit chooses, for receiving SAD cost, point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector.
2. point pixel motion vector calculation element based on H264 agreement as claimed in claim 1, it is characterized in that, described " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector; obtain reference block pixel from described 3rd cache module " including: if the second pixel motion vector of the 8x8 sub-block of 8x8 layer and the first whole pixel motion vector are identical, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
3. point pixel motion vector calculation element based on H264 agreement as claimed in claim 1 or 2, it is characterized in that, it is described that " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector, reference block pixel is obtained from described 3rd cache module " including: if the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of reference frame multiplexing maintenance unit record is identical with the second pixel motion vector of the 8x8 sub-block of a upper 8x8 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
4. point pixel motion vector calculation element based on H264 agreement as claimed in claim 1 or 2, it is characterized in that, it is described that " the 3rd acquisition module is for according to the corresponding relation between whole pixel motion vector, reference block pixel is obtained from described 3rd cache module " including: if the 3rd pixel motion vector of the 4x4 sub-block of the 4x4 layer of reference frame multiplexing maintenance unit record is identical with the 3rd pixel motion vector of the 4x4 sub-block of a upper 4x4 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
5. point pixel motion vector calculation element based on H264 agreement as claimed in claim 1, it is characterized in that, described " main control unit for will point pixel motion vector write in the first cache module " including: main control unit is for writing in the first cache module after being packed by the whole pixel motion vector that point pixel motion vector is corresponding with this point of pixel motion vector.
6. point pixel motion vector computational methods based on H264 agreement, described method is applied to point pixel motion vector calculation element based on H264 agreement, described device is for point pixel motion vector of computing macro block, it is characterised in that described macro block is divided into multiple 16x16 sub-block; Each 16x16 sub-block is divided into 4 8x8 sub-blocks, and each 8x8 sub-block is divided into 4 4x4 sub-blocks; Described device includes buffer unit, main control unit, reference frame multiplexing maintenance unit, SAD cost calculating unit, SAD cost choose unit; Described buffer unit is connected with main control unit, described main control unit is connected with reference frame multiplexing maintenance unit, described reference frame multiplexing maintenance unit is connected with SAD cost calculating unit, described SAD cost calculating unit is chosen unit with SAD cost and is connected, and described SAD cost is chosen unit and is connected with main control unit; Described buffer unit includes the first cache module, the second cache module, the 3rd cache module; Described main control unit includes acquiring unit and register cell; Described acquiring unit includes the first acquisition module, the second module obtains and the 3rd acquisition module; Described register cell includes the first register cell and the second register cell; Described method comprises the steps:
First acquisition module obtains the whole pixel motion vector of 16x16 sub-block from described first cache module, described whole pixel motion vector includes the first whole pixel motion vector, the second pixel motion vector and the 3rd whole pixel vector, described first whole pixel motion vector is the whole pixel motion vector of 16x16 layer in 16x16 sub-block, described second whole pixel motion vector is the whole pixel motion vector of 8x8 layer in 16x16 sub-block, and described 3rd whole pixel motion vector is the whole pixel motion vector of 4x4 layer in 16x16 sub-block;
Reference frame multiplexing maintenance unit records the corresponding relation between whole pixel motion vector, and the corresponding relation of described whole pixel motion vector includes the corresponding relation of the second whole pixel motion vector of the first whole pixel motion vector and the corresponding relation of the second pixel motion vector, 8x8 layer difference 8x8 sub-block and the corresponding relation of the 3rd whole pixel vector of 4x4 layer difference 4x4 sub-block;
Second acquisition module obtains the original block pixel that 16x16 sub-block is corresponding from described second cache module, the original block pixel that the first register cell buffer memory 16x16 sub-block is corresponding;
3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel, the second register cell buffer memory reference block pixel from described 3rd cache module;
SAD cost calculating unit obtains original block pixel from described first register cell, and obtains reference block pixel from described second register cell, and carries out SAD cost calculating, obtains the reference block pixel SAD cost of multiple diverse location;
SAD cost is chosen unit and the reference block pixel SAD cost of diverse location is compared, and chooses the SAD cost value of the reference block pixel of SAD Least-cost, and calculates point pixel motion vector of this reference block pixel and original block pixel;
Main control unit receives SAD cost and chooses point pixel motion vector that unit sends, and is write in the first cache module by a point pixel motion vector.
7. point pixel motion vector computational methods based on H264 agreement as claimed in claim 6, it is characterized in that, described step " the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module " including:
If the second pixel motion vector of the 8x8 sub-block of 8x8 layer and the first whole pixel motion vector are identical, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
8. point pixel motion vector computational methods based on H264 agreement as claimed in claims 6 or 7, it is characterized in that, described step " the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module " including:
If the second pixel motion vector of the 8x8 sub-block of the 8x8 layer of reference frame multiplexing maintenance unit record is identical with the second pixel motion vector of the 8x8 sub-block of a upper 8x8 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
9. point pixel motion vector computational methods based on H264 agreement as claimed in claims 6 or 7, it is characterized in that, described step " the 3rd acquisition module, according to the corresponding relation between whole pixel motion vector, obtains reference block pixel from described 3rd cache module " including:
If the 3rd pixel motion vector of the 4x4 sub-block of the 4x4 layer of reference frame multiplexing maintenance unit record is identical with the 3rd pixel motion vector of the 4x4 sub-block of a upper 4x4 layer, then described 3rd acquisition module does not obtain reference block pixel from the 3rd cache module, and otherwise the 3rd acquisition module obtains reference block pixel from the 3rd cache module.
10. point pixel motion vector computational methods based on H264 agreement as claimed in claim 6, it is characterised in that described step " main control unit will divide a pixel motion vector to write in the first cache module " including:
Main control unit writes in the first cache module after being packed by the whole pixel motion vector that point pixel motion vector is corresponding with this point of pixel motion vector.
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