CN107665151B - Memory stability verification method and device - Google Patents
Memory stability verification method and device Download PDFInfo
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- CN107665151B CN107665151B CN201610602741.6A CN201610602741A CN107665151B CN 107665151 B CN107665151 B CN 107665151B CN 201610602741 A CN201610602741 A CN 201610602741A CN 107665151 B CN107665151 B CN 107665151B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0727—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a storage system, e.g. in a DASD or network based storage system
Abstract
The invention provides a method and a device for verifying the stability of a memory, wherein the memory is divided into a software system memory and a hardware system memory, the size of the software system memory is the minimum value of the memory required by an operating system to work, the hardware system memory is a memory separated from the software operating system, and the method comprises the following steps: filling data into the hardware system memory; reading data from the hardware system memory; when the read data is consistent with the filled data, judging that the hardware system memory is stable; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable. The invention can be separated from the memory management of the software system and independently verify the memory stability of the hardware system.
Description
Technical Field
The invention relates to the technical field of computer system verification, in particular to a method and a device for verifying memory stability.
Background
In a computer system, memory is one of the key factors determining the performance of the whole computer. With the rapid development of microelectronic technology, the performance of processors is multiplied, and the performance requirements for memories are higher and higher. The reliability of the memory performance of a memory depends on the correct design and testing of the memory, the main objective of memory testing is to verify that each bit in the memory can reliably store data, the functional testing of the memory consists of a series of read-write operations performed by digital test equipment, and after each read operation, the test system compares the read data with an expected value.
At present, in an operating system of an MIPS (Microprocessor with interlocked pipeline stages, without internal interlocked pipeline stages) platform vxWorks, there are two methods for testing a memory: the method is to transplant memory testing tools of other platforms, such as: linux stress, but the bottom implementation of the tool is to allocate the largest possible memory from the system memory pool by using a malloc (dynamic memory allocation) function, and perform data filling comparison on the memory. And secondly, under the condition of knowing the MIPS system structure, writing a memory verification program, distributing the memory by using a malloc function mode, and then performing data filling comparison on the memory.
In the process of implementing the invention, the inventor finds that at least the following technical problems exist in the prior art:
at present, the two methods used under the MIPS platform vxWorks operating system can verify the memory stability of the system, but the method can not be separated from the memory management of the software system when the memory stability of the hardware system is verified. In the case of a memory system problem, it is not possible to locate whether it is a hardware system memory stability problem or a software system memory stability problem.
Disclosure of Invention
The invention provides a memory stability verification method and device, which can be used for independently verifying the memory stability of a hardware system without software system memory management.
In one aspect, the present invention provides a method for verifying memory stability, where the memory is divided into a software system memory and a hardware system memory, the size of the software system memory is a minimum memory size required by an operating system to be able to work, and the hardware system memory is a memory separated from the software operating system, and the method includes:
filling data into the hardware system memory;
reading data from the hardware system memory;
when the read data is consistent with the filled data, judging that the hardware system memory is stable; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable.
In another aspect, the present invention provides a device for verifying memory stability, where the memory is divided into a software system memory and a hardware system memory, the size of the software system memory is a minimum memory size required by an operating system to be able to work, and the hardware system memory is a memory separated from the software operating system, and the device includes:
the filling unit is used for filling data into the hardware system memory;
the reading unit is used for reading data from the hardware system memory;
the judging unit is used for judging that the hardware system memory is stable when the read data is consistent with the filled data; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable.
According to the memory stability verification method and device provided by the embodiment of the invention, the memory is divided into the software system memory and the hardware system memory, and the memory stability verification which is separated from the management of the software operating system is independently carried out on the hardware system memory, so that the hardware system memory problem can be determined when the memory verification has a problem.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flowchart illustrating a method for verifying memory stability according to an embodiment of the present invention;
FIG. 2a is a diagram illustrating a hardware system memory structure managed by a software operating system according to a modified embodiment of the present invention;
FIG. 2b is a diagram illustrating the structure of a hardware system memory managed by a software operating system and a hardware system memory managed by a software operating system according to a modification of the embodiment of the present invention;
FIG. 3 is a schematic diagram of the operation of a crossbar according to an embodiment of the present invention;
FIG. 4 is a flowchart illustrating a method for performing stability verification on a hardware system memory according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a memory stability verification apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a memory stability verification method, wherein a memory is divided into a software system memory and a hardware system memory, the size of the software system memory is the minimum value of the memory required by an operating system to work, the hardware system memory is a memory separated from the software operating system, and as shown in fig. 1, the method comprises the following steps:
s11, filling data into the hardware system memory;
s12, reading data from the hardware system memory;
s13, when the read data are consistent with the filled data, judging that the hardware system memory is stable; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable.
According to the memory stability verification method provided by the embodiment of the invention, the memory is divided into the software system memory and the hardware system memory, and the memory stability verification which is separated from the management of the software operating system is independently carried out on the hardware system memory, so that the hardware system memory problem can be determined when the memory verification has a problem.
Optionally, before the filling data into the hardware system memory, the method further includes: configuring a transmission backup buffer table entry, wherein the transmission backup buffer table entry comprises a corresponding relation between a virtual address and physical addresses in the software system memory and the hardware system memory.
Optionally, the filling data into the hardware system memory includes: according to a virtual address in a data filling instruction sent by a CPU, finding a corresponding physical address in the transmission backup buffer table entry, and filling data into a memory corresponding to the physical address;
the reading data from the hardware system memory comprises: and searching a corresponding physical address in the transmission backup buffer table entry according to a virtual address in a data reading instruction sent by the CPU, and reading data from a memory corresponding to the physical address.
Optionally, the filling data into the memory corresponding to the physical address includes: and mapping part or all of the physical addresses to memory addresses through a cross-switch matrix window, and filling data in the memory addresses.
Optionally, the reading data from the memory corresponding to the physical address includes: and mapping the physical address to a memory address through a crossbar matrix window, and reading data from the memory address.
To implement the memory stability verification in the vxWorks operating system of the MIPS platform, the memory value LOCAL _ MEM _ SIZE of the vxWorks operating system needs to be reduced to the minimum value at which the system can work, and after the memory stability verification is modified, the system memory pool management memory is close to a small value. As shown in fig. 2a, the size of the vxWorks system memory before modification is 0x3e000000, and as shown in fig. 2b, the minimum system memory is modified to 0x10000000, and the size of the system memory may be defined according to specific needs. In fig. 2b, the area I is a minimum memory area required for the vxWorks operating system to run, that is, the software system memory pool manages the hardware system memory, which is referred to herein as the software system memory and cannot be used for hardware system memory stability verification separated from the software operating system management, and the area II is a hardware system memory separated from the software operating system management and is referred to herein as the hardware system memory, which is invisible to the software system and cannot be accessed using the malloc function, and is used for hardware system memory stability verification. Secondly, configuring a transmission look-aside buffer (TLB) table entry, wherein the TLB table entry comprises a corresponding relation between a virtual address and physical addresses in the software system memory and the hardware system memory.
The Crossbar is configured, and has functions of address routing and address switching, and the routing aspect may change the mapping relationship of addresses, for example, routing to a memory device, and also routing to a PCI (Peripheral Component Interconnect) device. In the aspect of address switch, crossbar can be understood as a window, addresses in the window can pass through, and addresses outside the window cannot pass through. Three registers are specified by Crossbar, and the user can finish the operation by setting the required base address value, the size value and the mapping destination address into the registers. As shown in fig. 3, BASE ADDR (BASE register) specifies a BASE address, MASK (size) specifies a size, and specifying a BASE address and a size determines a memory region, which is a window, and specifying a mapping destination address determines which address to route to.
And for the data filling in the hardware system memory, finding a corresponding physical address in the TLB table entry according to a virtual address in a data filling instruction sent by a CPU, mapping the physical address to a memory address through a cross switch matrix window, and filling data in the memory address. Specifically, the virtual address of the CPU is mapped to the first-stage crossbar after passing through the TLB, the first-stage crossbar does not perform routing (mapping), what address is still what address after passing through the first-stage crossbar, the address directly passes through the first-stage crossbar (the window is large enough and does not perform address translation), and the address reaches the memory after passing through the second-stage crossbar, so that the memory is filled with data. The principle of reading the data of the memory is the same, a corresponding physical address is found in the TLB table entry according to a virtual address in a data reading instruction sent by a CPU, the physical address is mapped to the memory address through a cross switch matrix window, and the data is read from the memory address. Optionally, the window size of the crossbar is adjustable, and when the window size of the crossbar is large enough, data filling and reading of all addresses in the memory of the hardware system can be achieved. When the window of the crossbar is set to be smaller, data filling and reading can be performed only on a part of memory addresses in the hardware system memory.
Fig. 4 shows a flowchart of verifying a hardware system memory, which mainly includes:
step S41, filling regular data in the memory addresses from 0xd0000000 to 0 xfffffffff, that is, the memory of the hardware system, where the regular data may be an increasing number sequence, a decreasing number sequence, a constant number sequence, or the like.
Step S42, read data from the memory address from 0xd0000000 to 0 xfffffffff, i.e. the hardware system memory.
Step S43, determining whether the read data is regular data, that is, whether the read data is consistent with the filled data, if the read data is regular data, that is, consistent with the filled data, executing step S44, and verifying that there is no problem in the hardware system memory; if the read data is not regular data, i.e. inconsistent with the filled data, step S45 is executed to verify that there is a problem in the hardware system memory.
Step S44, verifying the hardware system memory without any problem, and then go to step S41 to continue the verification, where the hardware system memory is verified multiple times, instead of only once.
And step S45, verifying that the memory of the hardware system has a problem, outputting the read data inconsistent with the filling data when the memory of the hardware system has the problem, and then finding out a corresponding error address according to the inconsistent read data.
An embodiment of the present invention further provides a device for verifying memory stability, where the memory is divided into a software system memory and a hardware system memory, the size of the software system memory is a minimum memory size required by an operating system to be able to work, and the hardware system memory is a memory separated from the software operating system, as shown in fig. 5, the device includes:
a filling unit 51, configured to fill data into the hardware system memory;
a reading unit 52, configured to read data from the hardware system memory;
a determination unit 53, configured to determine that the hardware system memory is stable when the read data is consistent with the filled data; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable.
The memory stability verification device provided by the embodiment of the invention divides the memory into the software system memory and the hardware system memory, and independently performs the memory stability verification which is separated from the management of the software operating system on the hardware system memory, so that the hardware system memory problem can be determined when the memory verification has a problem.
Optionally, the apparatus further includes a configuration unit, configured to configure a transmission look-aside buffer entry, where the transmission look-aside buffer entry includes a correspondence between a virtual address and a physical address in the software system memory and the hardware system memory.
Optionally, the filling unit 51 is configured to find a corresponding physical address in the transmission backup buffer entry according to a virtual address in a data filling instruction sent by the CPU, and fill data in a memory corresponding to the physical address;
the reading unit 52 is configured to find a corresponding physical address in the transmission backup buffer entry according to a virtual address in a data reading instruction sent by the CPU, and read data from a memory corresponding to the physical address.
Optionally, the filling unit 51 is configured to map part or all of the physical addresses to memory addresses through a crossbar matrix window, and fill data in the memory addresses.
Optionally, the reading unit 52 is configured to map the physical address to a memory address through a crossbar window, and read data from the memory address.
The working process of the memory stability verification device provided by the embodiment of the invention is described in detail in the memory stability verification method, and is not described herein again.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. A memory stability verification method is characterized in that a memory is divided into a software system memory and a hardware system memory, the size of the software system memory is the minimum value of the memory required by a vxWorks operating system to work, the hardware system memory is a memory which is not managed by the software operating system, and the method comprises the following steps:
configuring a transmission backup buffer table entry, wherein the transmission backup buffer table entry comprises a corresponding relation between a virtual address and physical addresses in the software system memory and the hardware system memory;
filling data into the hardware system memory, specifically: according to a virtual address in a data filling instruction sent by a CPU, finding a corresponding physical address in the transmission backup buffer table entry, and filling data into a memory corresponding to the physical address;
reading data from the hardware system memory, specifically: according to a virtual address in a data reading instruction sent by a CPU, finding a corresponding physical address in the transmission backup buffer table entry, and reading data from a memory corresponding to the physical address;
when the read data is consistent with the filled data, judging that the hardware system memory is stable; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable, outputting read data inconsistent with the filled data, and searching for a corresponding error address according to the inconsistent read data.
2. The method according to claim 1, wherein the populating data into the memory corresponding to the physical address comprises: and mapping part or all of the physical addresses to memory addresses through a cross-switch matrix window, and filling data in the memory addresses.
3. The method according to claim 1, wherein reading data from the memory corresponding to the physical address comprises: and mapping the physical address to a memory address through a crossbar matrix window, and reading data from the memory address.
4. A memory stability verification device is characterized in that a memory is divided into a software system memory and a hardware system memory, the size of the software system memory is the minimum value of the memory required by a vxWorks operating system to work, the hardware system memory is a memory which is not managed by the software operating system, and the device comprises:
a configuration unit, configured to configure a transmission backup buffer table entry, where the transmission backup buffer table entry includes a correspondence between a virtual address and physical addresses in the software system memory and the hardware system memory;
a filling unit, configured to fill data into the hardware system memory, specifically: according to a virtual address in a data filling instruction sent by a CPU, finding a corresponding physical address in the transmission backup buffer table entry, and filling data into a memory corresponding to the physical address;
a reading unit, configured to read data from the hardware system memory, specifically: according to a virtual address in a data reading instruction sent by a CPU, finding a corresponding physical address in the transmission backup buffer table entry, and reading data from a memory corresponding to the physical address;
the judging unit is used for judging that the hardware system memory is stable when the read data is consistent with the filled data; and when the read data is inconsistent with the filled data, judging that the hardware system memory is unstable, outputting read data inconsistent with the filled data, and searching for a corresponding error address according to the inconsistent read data.
5. The device according to claim 4, wherein the padding unit is configured to map part or all of the physical addresses to memory addresses through a crossbar window, and pad data in the memory addresses.
6. The device according to claim 4, wherein the reading unit is configured to read data from the memory address by mapping the physical address to the memory address through a crossbar window.
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| CN1991770A (en) * | 2005-12-28 | 2007-07-04 | 英业达股份有限公司 | Testing method of physical RAM in Linux system |
| CN102662869A (en) * | 2012-04-01 | 2012-09-12 | 龙芯中科技术有限公司 | Method and device for access to memory of virtual machine and finders |
| CN103176876A (en) * | 2013-03-19 | 2013-06-26 | 卡斯柯信号有限公司 | Method and device for efficient and safe computer on-line self-checking |
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| US10209904B2 (en) * | 2013-04-09 | 2019-02-19 | EMC IP Holding Company LLC | Multiprocessor system with independent direct access to bulk solid state memory resources |
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| CN1991770A (en) * | 2005-12-28 | 2007-07-04 | 英业达股份有限公司 | Testing method of physical RAM in Linux system |
| CN102662869A (en) * | 2012-04-01 | 2012-09-12 | 龙芯中科技术有限公司 | Method and device for access to memory of virtual machine and finders |
| CN103176876A (en) * | 2013-03-19 | 2013-06-26 | 卡斯柯信号有限公司 | Method and device for efficient and safe computer on-line self-checking |
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