CN107634030B - Metal interconnection structure suitable for flexible OTFT integrated circuit and manufacturing method thereof - Google Patents
Metal interconnection structure suitable for flexible OTFT integrated circuit and manufacturing method thereof Download PDFInfo
- Publication number
- CN107634030B CN107634030B CN201710713407.2A CN201710713407A CN107634030B CN 107634030 B CN107634030 B CN 107634030B CN 201710713407 A CN201710713407 A CN 201710713407A CN 107634030 B CN107634030 B CN 107634030B
- Authority
- CN
- China
- Prior art keywords
- metal
- flexible
- layer
- manufacturing
- following
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention relates to a metal interconnection structure suitable for a flexible OTFT integrated circuit and a manufacturing method thereof, wherein the manufacturing method of the metal interconnection structure comprises the following steps: s1: preparing a lower metal connecting wire of the flexible substrate; s2: depositing a dielectric layer on the former structure; s3: preparing an upper metal connecting wire on the former structure; s4: manufacturing a via hole, and connecting an upper metal connecting line and a lower metal connecting line: and (3) selecting a required area by adopting an ultrasonic metal welding machine, applying mechanical vibration to the area to break the middle dielectric layer in the action area, activating the metal atoms of the upper layer and the lower layer, mutually permeating at the interface, finally forming solid connection of the metal connecting lines of the upper layer and the lower layer, and completing the via hole to obtain the metal interconnection structure. According to the manufacturing method, the preparation cost of the via hole is low, the process is simple, and the manufacturing method is suitable for integration of flexible organic devices; meanwhile, the ultrasonic generator is easy to electrically control, various complex metal interconnection structures can be manufactured, and the metal connecting wires in the via hole area have high connecting strength.
Description
Technical Field
The invention relates to the technical field of organic semiconductor integrated circuit manufacturing, in particular to a metal interconnection structure suitable for a flexible OTFT integrated circuit and a manufacturing method thereof.
Background
Flexible electronics have received extensive attention from academia and social industries over the last 20 years, and flexible Organic Thin Film Transistors (OTFTs) are an important development direction of future flexible electronic display devices, especially in the last 5-10 years, and organic electronics have made great progress in a variety of application fields, such as organic field effect transistors, organic solar cells, biosensors, TFT arrays, organic light emitting diodes, etc. At present, organic materials and devices are gradually industrialized from basic research, and have the characteristics of simple manufacturing process, flexibility, diversity, low cost and the like in application and production;
in integrated circuits, besides the fabrication of devices in front-end processes, the fabrication of metal interconnect structures in back-end processes is also important. In order to meet the requirement of increasing the number of semiconductor elements, a multilayer structure of semiconductor elements is usually formed, and the semiconductor elements in adjacent layers are electrically connected through a metal interconnection structure. The basic metal interconnection structure comprises an upper metal connecting wire, a lower metal connecting wire, a middle dielectric layer and a through hole for connecting the upper metal connecting wire and the lower metal connecting wire. With the increasing demand of device integration, the performance of metal interconnection structures in integrated circuits becomes one of the key factors affecting the reliability of the integrated circuits. However, for the integration of flexible organic thin film transistor devices, there still exist many challenges in how to fabricate metal interconnection structures suitable for flexible OTFT integrated circuits.
Compared with the existing amorphous silicon or polysilicon TFT, the OTFT has the following characteristics because the active layer is organic: the processing temperature is not too high, generally below 180 ℃, so that the method is not only suitable for the flexible substrate, but also can obviously reduce the preparation power consumption; the process is greatly simplified, the cost is greatly reduced, and the two methods of vapor deposition and printing are suitable for large-area processing; wide material source, great development potential and environment friendship. But because the chemical stability of the organic semiconductor and the thermal stability of the flexible substrate are poor, the requirements on the back-end metal interconnection process are more severe.
In a conventional inorganic semiconductor integrated circuit process, a via in a metal interconnection structure generally needs to be subjected to photolithography, etching, metal deposition, chemical mechanical polishing and other processes. The photolithography process generally includes: coating Photoresist (PR) on a target layer to be patterned, performing an exposure process to change the solubility of the photoresist in a partial region, and performing a development process to form a photoresist pattern exposing the dielectric layer. And performing an etching process by using the photoresist pattern as a mask to transfer the photoresist pattern to the dielectric layer. And washing off the residual photoresist, and depositing metal on the patterned dielectric layer. And finally, removing redundant metal by using chemical mechanical polishing to finish the via hole. However, organic semiconductors are very sensitive to organic solvents and certain chemicals due to their poor chemical stability. Therefore, the conventional via process has no general applicability to organic semiconductors.
Ultrasonic metal welding is a special technique that has been widely used in industry since its invention in the united states in 1950. The principle of ultrasonic metal welding is a special method for connecting the same kind of metal or different kinds of metal by using the mechanical vibration energy of ultrasonic frequency (more than 16 kHz). When metal is welded by ultrasonic waves, under the action of static pressure, elastic vibration energy is converted into friction work, deformation energy and limited temperature rise among workpiece interfaces, so that metal atoms are activated and mutually permeate to realize solid connection of metal weldments. The method has the advantages of small welding pressure, controllable range, high welding speed, high welding spot strength, good stability and the like. And when welding, the current is not transmitted to the workpiece, and a high-temperature heat source is not applied to the workpiece. It is well compatible with flexible substrates.
Disclosure of Invention
Based on this, the invention aims to provide a manufacturing method of a metal interconnection structure suitable for a flexible OTFT integrated circuit, wherein the via hole has low preparation cost and simple process, and is suitable for integration of a flexible organic device; meanwhile, the ultrasonic generator is easy to electrically control, various complex metal interconnection structures can be manufactured, and the metal connecting wires in the via hole area have high connecting strength.
The purpose of the invention is realized by the following technical scheme: a manufacturing method of a metal interconnection structure suitable for a flexible OTFT integrated circuit comprises the following steps:
s1: preparing a lower metal connecting wire of the flexible substrate;
s2: depositing a dielectric layer on the former structure;
s3: preparing an upper metal connecting wire on the former structure;
s4: manufacturing a via hole, and connecting an upper metal connecting line and a lower metal connecting line: and (3) selecting a required area by adopting an ultrasonic metal welding machine, applying mechanical vibration to the area to break the middle dielectric layer in the action area, activating the metal atoms of the upper layer and the lower layer, mutually permeating at the interface, finally forming solid connection of the metal connecting lines of the upper layer and the lower layer, and completing the via hole to obtain the metal interconnection structure.
Compared with the prior art, the preparation method provided by the invention has the following advantages and beneficial effects:
(1) compared with the traditional via hole process, the ultrasonic metal welding machine is creatively applied to the via hole, the insulator in the middle is broken by the vibration pressure of the ultrasonic metal welding machine to complete the via hole, the method for completing the via hole by adopting the ultrasonic vibration pressure is simpler and more flexible, and complex processes such as photoetching, etching and the like are not needed; and the ultrasonic generator is a power electronic circuit, is easy to electrically control, and realizes high-precision via hole operation by accurately adjusting various parameters.
(2) The whole process flow is physically realized at room temperature, has no chemical reaction and temperature requirement, is suitable for a flexible substrate, and does not damage an organic semiconductor.
(3) The process of hole passing does not need vacuum environment and gas protection, does not need high-temperature heat treatment, is beneficial to keeping flexibility and has low manufacturing cost.
(4) The metal in the via hole area has higher connection strength; the ultrasonic vibration pressure makes the upper and lower layer metal connecting lines generate plastic deformation, mechanical embedding and mutual atom diffusion, and finally high-strength bonding between metals is formed.
Further, the method also comprises the following steps:
s5: and repeating the steps S2-S4 to obtain the multilayer metal interconnection structure. And repeating the steps S2-S4 to obtain a multilayer metal interconnection structure, wherein a dielectric layer is arranged between every two adjacent layers of metal connecting wires, and each two layers of metal connecting wires and one dielectric layer are subjected to one-time hole passing.
Further, before step S4, the method further includes the following steps: steps S2 to S3 are repeated. And repeating the steps S2-S3 and then performing via holes to obtain a single-via-hole multilayer metal interconnection structure or a plurality of groups of metal interconnection structures located in different areas, wherein only one via hole is obtained when the single-via-hole multilayer metal interconnection structure is subjected to final via hole passing, the plurality of groups of metal interconnection structures located in different areas form via hole groups, and mechanical vibration can be simultaneously applied to different areas by designing special-shaped welding heads with different shapes and sizes to complete a plurality of via holes at one time.
Further, in step S1, the lower metal line is made of any one of the following conductive metal substances: gold, silver, copper, nickel, aluminum, gold with chromium coated on the surface; the ink is prepared by any low-temperature preparation method of evaporation, printing and sputtering.
Further, in step S2, the dielectric layer is made of any one of the following insulating dielectric materials: SiO 22、Si3N4、Al2O3、La2O3、ZrO2An organic polymer; by CVD, ALD, vapor deposition, sputtering,The ink is prepared by any low-temperature preparation method through solution printing.
Further, in step S3, the upper metal line is made of any one of the following conductive metal substances: gold, silver, copper, nickel, aluminum, gold with chromium coated on the surface; the preparation method adopts any low-temperature preparation method of evaporation, printing and sputtering.
Further, step S1 is preceded by the following steps: selecting a flexible PET substrate, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; then drying in an oven, and then performing UV/O3And (5) after activation treatment, storing for later use.
The invention also provides a metal interconnection structure suitable for the flexible OTFT integrated circuit, which comprises at least two layers of metal connecting wires, an intermediate medium layer between two adjacent layers of metal connecting wires and a via hole for connecting the multiple layers of metal connecting wires, wherein the via hole is formed by ultrasonic vibration and compression; it is produced by any of the above production methods.
Compared with the prior art, the metal interconnection structure has the advantages of simple manufacturing method, low cost, strong compatibility with the flexible substrate and high connection strength between metal connecting wires in the via hole area.
For a better understanding and practice, the invention is described in detail below with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of the structure of the MIM sandwich structure prepared in example 1.
Fig. 2 is an exploded view of the MIM sandwich structure prepared in example 1.
Fig. 3 is a schematic view of the ultrasonic vibration-compaction via process in example 1.
Fig. 4 is a schematic view of a process for fabricating a metal interconnect structure fabricated in example 1.
Figure 5 is a graph of the IV of the MIM sandwich made in example 1.
Fig. 6 is a graph showing the IV curve of the metal interconnection structure obtained in example 1.
Fig. 7 is a schematic process diagram of a process for fabricating a single-via multilevel metal interconnect structure according to embodiment 2.
Fig. 8 is a schematic process diagram of the manufacturing process of the multiple sets of metal interconnection structures located in different regions according to embodiment 3.
Fig. 9 is a schematic view of a process for fabricating a multi-level metal interconnection structure manufactured in example 4.
Detailed Description
Example 1
The manufacturing method of the metal interconnection structure suitable for the flexible OTFT integrated circuit in the embodiment includes the following steps:
(1) selecting a flexible PET substrate 1, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; drying in an oven, and then UV/O3And (5) after activation treatment, storing for later use.
(2) Preparing a lower metal connecting wire 2: by using the thermal evaporation technology, patterns are defined through a hollow mask plate, a 20nm lower layer metal connecting wire 2 is deposited on a cleaned PET substrate 1, the deposition rate is controlled to be 0.02nm/s, the deposition is carried out under high vacuum, and the air pressure is 6 multiplied by 10-4Pa。
(3) Preparing a dielectric layer film 3: preparing lanthanum acetylacetonate-DMF solution with the molar concentration of 0.05mol/L, spin-coating the lanthanum acetylacetonate-DMF solution, and performing heat treatment at 120 ℃ to prepare La2O3Film, treatment time 15 min.
(4) Preparing an upper metal connecting wire 4: by thermal evaporation on La2O3And depositing a gold electrode 4 with the thickness of 40nm on the dielectric layer 3, wherein the deposition rate is 0.02nm/s, and the deposition is carried out under high vacuum.
(5) Through the above 4 steps, a (MIM) sandwich structure 5 composed of a metal, a dielectric layer, and a metal is prepared, as shown in fig. 1.
(6) Manufacturing a via hole, and connecting the upper metal layer connecting line and the lower metal layer connecting line: and selecting the welding head 6 to apply mechanical vibration to the required area by using an ultrasonic metal welding machine to complete the via hole and obtain the metal interconnection structure 7. The ultrasonic metal welding machine is a wire bonding ultrasonic welding machine in IC packaging.
(7) And (5) respectively testing the devices before and after the through hole (step (5)) by using an Agilent B1500A high-precision semiconductor analyzer in a room temperature environment. Before passing through the via hole, the upper and lower metal connecting wires are not electrically conducted to form an insulating state, and the leakage current density is 1.75 × 10-6A/cm2@3 MV/cm. After the via hole is formed, the upper metal connecting wire and the lower metal connecting wire are electrically conducted, and the resistance of the upper metal connecting wire and the lower metal connecting wire is only about 7 omega, as shown in fig. 5-6.
Example 2
The manufacturing method of the metal interconnection structure suitable for the flexible OTFT integrated circuit in the embodiment includes the following steps:
(1) cleaning a substrate: selecting a flexible PET substrate 1, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; drying in an oven, and then UV/O3And (5) after activation treatment, storing for later use.
(2) Preparing a first layer of metal connecting wire 9: by using thermal evaporation and evaporation technology, defining pattern by hollow mask plate, depositing 20nm first layer metal connecting line 9 on cleaned PET substrate at deposition rate of 0.02nm/s under high vacuum pressure of 6 × 10-4Pa。
(3) Preparing a first dielectric layer film 3: preparing lanthanum acetylacetonate-DMF solution with the molar concentration of 0.05mol/L, spin-coating the lanthanum acetylacetonate-DMF solution, and performing heat treatment at 120 ℃ to prepare La2O3Film, treatment time 15 min.
(4) Preparing a second layer of metal connecting wire 10: by thermal evaporation on La2O3A gold electrode with a thickness of 20nm is deposited on the dielectric layer 3 at a deposition rate of 0.02nm/s, and the deposition is carried out under high vacuum.
(5) Preparing a second dielectric layer film 3: spin-coating lanthanum acetylacetonate-DMF solution, and heat-treating at 120 deg.C to prepare La2O3And (3) film treatment time is 15 min.
(6) Preparing the third layer of metalLine 11: by thermal evaporation on La2O3And depositing a gold electrode with the thickness of 40nm on the dielectric layer 3, wherein the deposition rate is 0.02nm/s, and the deposition is carried out under high vacuum.
(7) Manufacturing a via hole, and connecting the first layer, the second layer and the third layer of metal connecting lines: and (3) properly increasing power and static pressure by using an ultrasonic metal welding machine, selecting a required area and applying mechanical vibration to complete the via hole, and obtaining the multilayer metal interconnection structure 12 with the single via hole. The ultrasonic metal welding machine is a Wire Bonding ultrasonic welding machine in IC packaging.
Through testing, before passing through the hole, no electrical communication exists between the metal connecting wires of all layers to form an insulating state; and after the holes are formed, the metal connecting wires of all layers are electrically conducted.
Example 3
The manufacturing method of the metal interconnection structure suitable for the flexible OTFT integrated circuit in the embodiment includes the following steps:
(1) cleaning a substrate: selecting a flexible PET substrate 1, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; drying in an oven, and then UV/O3And (5) after activation treatment, storing for later use.
(2) Preparing a first layer of metal connecting wire 9: by using thermal evaporation and evaporation technology, defining pattern by hollow mask plate, depositing 20nm first layer metal connecting line 9 on cleaned PET substrate at deposition rate of 0.02nm/s under high vacuum pressure of 6 × 10-4Pa。
(3) Preparing a first dielectric layer film 3: preparing lanthanum acetylacetonate-DMF solution with the molar concentration of 0.05mol/L, spin-coating the lanthanum acetylacetonate-DMF solution, and performing heat treatment at 120 ℃ to prepare La2O3And (3) film treatment time is 15 min.
(4) Preparing a second layer of metal connecting wire 10: by thermal evaporation on La2O3A gold electrode with a thickness of 20nm is deposited on the dielectric layer 3 at a deposition rate of 0.02nm/s, and the deposition is carried out under high vacuum.
(5) Preparing a second dielectric layer film 3: spin-coating lanthanum acetylacetonate-DMF solution, and heat-treating at 120 deg.C to prepare La2O3And (3) film treatment time is 15 min.
(6) Preparing a third layer of metal connecting wire 11: by thermal evaporation on La2O3And depositing a gold electrode with the thickness of 40nm on the dielectric layer 3, wherein the deposition rate is 0.02nm/s, and the deposition is carried out under high vacuum.
(7) Manufacturing a via group, and connecting upper and lower metal layer connecting lines in different areas: by using an ultrasonic metal welding machine and designing special-shaped welding heads 13 with different shapes and sizes, mechanical vibration can be simultaneously applied to different areas, a plurality of through holes can be completed at one time, and a plurality of groups of metal interconnection structures 14 can be obtained. The ultrasonic metal welding machine is a Wire Bonding ultrasonic welding machine in IC packaging.
Through testing, before passing through the hole, each group of metal connecting wires on different layers are not electrically communicated to form an insulating state; and after passing through the holes, the connecting wires of different layers of the metals are electrically conducted.
Example 4
The manufacturing method of the metal interconnection structure suitable for the flexible OTFT integrated circuit in the embodiment includes the following steps:
(1) cleaning a substrate: selecting a flexible PET substrate 1, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; drying in an oven, and then UV/O3And (5) after activation treatment, storing for later use.
(2) Preparing a first layer of metal connecting wire 9: by using thermal evaporation and evaporation technology, defining pattern by hollow mask plate, depositing 20nm first layer metal connecting line 9 on cleaned PET substrate at deposition rate of 0.02nm/s under high vacuum pressure of 6 × 10-4Pa。
(3) Preparing a first dielectric layer film 3: preparing lanthanum acetylacetonate-DMF solution with the molar concentration of 0.05mol/L, spin-coating the lanthanum acetylacetonate-DMF solution, and performing heat treatment at 120 ℃ to prepare La2O3Film ofThe treatment time is 15 min.
(4) Preparing a second layer of metal connecting wire 10: by thermal evaporation on La2O3A gold electrode with a thickness of 20nm is deposited on the dielectric layer 3 at a deposition rate of 0.02nm/s, and the deposition is carried out under high vacuum.
(5) Manufacturing a via hole, and connecting the first layer of metal connecting line with the second layer of metal connecting line: and selecting the welding head 6 to apply mechanical vibration to the required area by using an ultrasonic metal welding machine to complete the via hole and obtain the metal interconnection structure 7.
(6) Preparing a second dielectric layer film 3: spin-coating lanthanum acetylacetonate-DMF solution, and heat-treating at 120 deg.C to prepare La2O3And (3) film treatment time is 15 min.
(7) Preparing a third layer of metal connecting wire 11: by thermal evaporation on La2O3And depositing a gold electrode with the thickness of 40nm on the dielectric layer 3, wherein the deposition rate is 0.02nm/s, and the deposition is carried out under high vacuum.
(8) Manufacturing a via group, and connecting upper and lower metal layer connecting lines in different areas: by using an ultrasonic metal welding machine and designing special-shaped welding heads 13 with different shapes and sizes, mechanical vibration can be simultaneously applied to different areas, a plurality of through holes can be completed at one time, and a plurality of groups of metal interconnection structures 14 can be obtained. The ultrasonic metal welding machine is a Wire Bonding ultrasonic welding machine in IC packaging.
(9) And finally, obtaining a plurality of complex metal interconnection structures 7 and 14 positioned in different areas.
Through testing, before passing through the hole, each group of metal connecting wires on different layers are not electrically communicated to form an insulating state; and after passing through the holes, the connecting wires of different layers of the metals are electrically conducted.
The above-mentioned embodiments only express one embodiment of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention.
Claims (10)
1. A manufacturing method of a metal interconnection structure suitable for a flexible OTFT integrated circuit is characterized by comprising the following steps: the method comprises the following steps:
s1: preparing a lower metal connecting wire of the flexible substrate;
s2: depositing a dielectric layer on the former structure;
s3: preparing an upper metal connecting wire on the former structure;
repeating the steps S2-S3;
s4: manufacturing a via hole, and connecting an upper metal connecting line and a lower metal connecting line: and (3) selecting a required area by adopting an ultrasonic metal welding machine, applying mechanical vibration to the area to break the middle dielectric layer in the action area, activating the metal atoms of the upper layer and the lower layer, mutually permeating at the interface, finally forming solid connection of the metal connecting lines of the upper layer and the lower layer, and completing the via hole to obtain the metal interconnection structure.
2. The method of claim 1, wherein the method comprises: in step S1, the lower metal line is made of any one of the following conductive metal substances: gold, silver, copper, nickel, aluminum, gold with chromium coated on the surface; the ink is prepared by any low-temperature preparation method of evaporation, printing and sputtering.
3. The method of claim 1, wherein the method comprises: in step S2, the dielectric layer is made of any one of the following insulating dielectric materials: SiO 22、Si3N4、Al2O3、La2O3、ZrO2An organic polymer; the film is prepared by any low-temperature preparation method of CVD, ALD, evaporation, sputtering and solution printing.
4. The method of claim 1, wherein the method comprises: in step S3, the upper layer metal wire is made of any one of the following conductive metal substances: gold, silver, copper, nickel, aluminum, gold with chromium coated on the surface; the preparation method adopts any low-temperature preparation method of evaporation, printing and sputtering.
5. The method of claim 1, wherein the method comprises: step S1 is preceded by the steps of: selecting a flexible PET substrate, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; then drying in an oven, and then performing UV/O3And (5) after activation treatment, storing for later use.
6. A manufacturing method of a metal interconnection structure suitable for a flexible OTFT integrated circuit is characterized by comprising the following steps: the method comprises the following steps:
s1: preparing a lower metal connecting wire of the flexible substrate;
s2: depositing a dielectric layer on the former structure;
s3: preparing an upper metal connecting wire on the former structure;
s4: manufacturing partial through holes, and connecting upper and lower metal connecting lines: selecting a required area by using an ultrasonic metal welding machine, applying mechanical vibration to the area, crushing a middle dielectric layer in an action area, activating upper and lower metal atoms, mutually permeating at an interface, and finally forming solid connection of upper and lower metal connecting lines to complete a via hole to obtain a metal interconnection structure;
s5: and repeating the steps S2-S4, and when the step of making the via holes is carried out at the last time, making via hole groups, and connecting the upper metal layer connecting line and the lower metal layer connecting line in different areas to obtain the multilayer metal interconnection structure.
7. The method of claim 6, wherein the metal interconnect structure comprises at least one of the following: in step S1, the lower metal line is made of any one of the following conductive metal substances: gold, silver, copper, nickel, aluminum, gold with chromium coated on the surface; the ink is prepared by any low-temperature preparation method of evaporation, printing and sputtering.
8. The method of claim 6, wherein the metal interconnect structure comprises at least one of the following: in step S2, the dielectric layer is made of any one of the following insulating dielectric materials: SiO 22、Si3N4、Al2O3、La2O3、ZrO2An organic polymer; the film is prepared by any low-temperature preparation method of CVD, ALD, evaporation, sputtering and solution printing.
9. The method of claim 6, wherein the metal interconnect structure comprises at least one of the following: in step S3, the upper layer metal wire is made of any one of the following conductive metal substances: gold, silver, copper, nickel, aluminum, gold with chromium coated on the surface; the preparation method adopts any low-temperature preparation method of evaporation, printing and sputtering.
10. The method of claim 6, wherein the metal interconnect structure comprises at least one of the following: step S1 is preceded by the steps of: selecting a flexible PET substrate, cutting the flexible PET substrate into a square with the size of 1.5cm multiplied by 1.5cm, cleaning the flexible PET substrate by ultrasonic, and respectively adding acetone, isopropanol, deionized water and absolute ethyl alcohol to remove impurities such as organic matters on the surface of the flexible PET substrate; then drying in an oven, and then performing UV/O3And (5) after activation treatment, storing for later use.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710713407.2A CN107634030B (en) | 2017-08-18 | 2017-08-18 | Metal interconnection structure suitable for flexible OTFT integrated circuit and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710713407.2A CN107634030B (en) | 2017-08-18 | 2017-08-18 | Metal interconnection structure suitable for flexible OTFT integrated circuit and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107634030A CN107634030A (en) | 2018-01-26 |
| CN107634030B true CN107634030B (en) | 2021-06-22 |
Family
ID=61100638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710713407.2A Active CN107634030B (en) | 2017-08-18 | 2017-08-18 | Metal interconnection structure suitable for flexible OTFT integrated circuit and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107634030B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701401A (en) * | 2013-12-04 | 2015-06-10 | 纳幕尔杜邦公司 | Integrated backboard including aluminum conductive circuit, and back contact type photovoltaic module |
| CN106876259A (en) * | 2015-12-11 | 2017-06-20 | 昆山工研院新型平板显示技术中心有限公司 | A kind of flexible conductive wire and it is provided with the flexible back plate of the flexible conductive |
| CN107026090A (en) * | 2016-01-29 | 2017-08-08 | 台湾积体电路制造股份有限公司 | The manufacture method of semiconductor devices |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1306898A1 (en) * | 2001-10-29 | 2003-05-02 | Dialog Semiconductor GmbH | Sub-milliohm on-chip interconnection |
-
2017
- 2017-08-18 CN CN201710713407.2A patent/CN107634030B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701401A (en) * | 2013-12-04 | 2015-06-10 | 纳幕尔杜邦公司 | Integrated backboard including aluminum conductive circuit, and back contact type photovoltaic module |
| CN106876259A (en) * | 2015-12-11 | 2017-06-20 | 昆山工研院新型平板显示技术中心有限公司 | A kind of flexible conductive wire and it is provided with the flexible back plate of the flexible conductive |
| CN107026090A (en) * | 2016-01-29 | 2017-08-08 | 台湾积体电路制造股份有限公司 | The manufacture method of semiconductor devices |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107634030A (en) | 2018-01-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9177821B2 (en) | Method of fabricating electronic circuit | |
| US10236398B2 (en) | Method for manufacturing transparent electrode | |
| CN107907251B (en) | Pressure sensor and preparation method thereof | |
| KR20140060822A (en) | Method for manufacturing stretchable thin film transistor | |
| US9299940B2 (en) | Carbon nanotube network thin-film transistors on flexible/stretchable substrates | |
| Zhao et al. | High‐performance full‐photolithographic top‐contact conformable organic transistors for soft electronics | |
| CN105470217A (en) | Integration of heat spreader for BEOL thermal management | |
| US11296033B2 (en) | Fan-out multi-device hybrid integrated flexible micro system and fabrication method thereof | |
| CN113044806B (en) | MEMS device monolithic integrated structure for realizing pressure sensing and method thereof | |
| TWM556022U (en) | Photovoltaic battery structure | |
| Gao et al. | Encapsulate-and-peel: fabricating carbon nanotube CMOS integrated circuits in a flexible ultra-thin plastic film | |
| CN105702700B (en) | A kind of thin film transistor (TFT) array and preparation method thereof based on laser etching techniques | |
| CN107735865B (en) | Vertical and planar thin film transistors on a common substrate | |
| CN107634030B (en) | Metal interconnection structure suitable for flexible OTFT integrated circuit and manufacturing method thereof | |
| JP2007073856A (en) | Formation method of conductive pattern, manufacturing method of semiconductor device, and manufacturing method of organic electroluminescent element | |
| CN105470390A (en) | Method for constructing large-area, flexible and wearable organic nanowire field effect transistor array by taking adhesive tape as substrate | |
| CN111969037A (en) | Air-gap graphene field effect tube structure and preparation method | |
| US20070231972A1 (en) | Manufacture of programmable crossbar signal processor | |
| CN108630760B (en) | N-type field effect thin film transistor and manufacturing method thereof, CMOS inverter and manufacturing method thereof | |
| CN113964270A (en) | Flexible organic thin film transistor of electroless chemical plating electrode and preparation method | |
| KR20170027597A (en) | Flexible electrode substrates and methods of manufacturing the same | |
| KR100975628B1 (en) | Method for manufacturing a thin film flexible thermoelectric module using peeling process | |
| CN104716138A (en) | Flexible carbon nano tube thin film field effect transistor and preparation method thereof | |
| KR20200009318A (en) | Method of fabricating a flexible devices | |
| US8575025B2 (en) | Templated circuitry fabrication |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |