CN107613302A - Coding/decoding method and device, storage medium, processor - Google Patents

Coding/decoding method and device, storage medium, processor Download PDF

Info

Publication number
CN107613302A
CN107613302A CN201710826776.2A CN201710826776A CN107613302A CN 107613302 A CN107613302 A CN 107613302A CN 201710826776 A CN201710826776 A CN 201710826776A CN 107613302 A CN107613302 A CN 107613302A
Authority
CN
China
Prior art keywords
hardware
decoding
state
configuration parameter
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201710826776.2A
Other languages
Chinese (zh)
Other versions
CN107613302B (en
Inventor
李辉武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gree Electric Appliances Inc of Zhuhai
Original Assignee
Gree Electric Appliances Inc of Zhuhai
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gree Electric Appliances Inc of Zhuhai filed Critical Gree Electric Appliances Inc of Zhuhai
Priority to CN201710826776.2A priority Critical patent/CN107613302B/en
Publication of CN107613302A publication Critical patent/CN107613302A/en
Application granted granted Critical
Publication of CN107613302B publication Critical patent/CN107613302B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

The invention discloses a kind of coding/decoding method and device, storage medium, processor.Wherein, this method includes:During present frame is decoded in treating decoding video data, the state of the state machine set in decoding process is detected, wherein, state is used to indicate action performed in decoding process;By performing the action corresponding to state and the state of switching state machine, following operate is performed:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And the head of next frame are parsed, the hardware decoding configuration parameter of next frame is obtained, and the hardware decoding configuration parameter of next frame is stored into ping-pong buffer;And in the interrupt processing function decoded for hardware, trigger and treat the progress hardware decoding of decoding video data using the hardware decoding configuration parameter in ping-pong buffer.

Description

Coding/decoding method and device, storage medium, processor
Technical field
The present invention relates to video decoding filed, in particular to a kind of coding/decoding method and device, storage medium, processing Device.
Background technology
In recent years, the trend that Video Applications develop to following direction is further obvious:Fine definition (Higher Definition):The application form of digital video even goes out from 720P to 1080P complete upgradings in some field of video applications 4K*2K, 8K*4K video format are showed;High frame per second (Higher frame rate):Digital video frame per second from 30fps to 60fps, 120fps even 240fps application scenarios upgrading;High compression rate (Higher compression rate):Transmission belt Wide and memory space is always resource the most key in Video Applications, therefore, is obtained in limited space and pipeline optimal Video tastes be always user unremitting pursuit.
Based on use above development trend and H.264 limitation, towards more fine definition, higher frame per second, high compression Efficient video coding standard (High Efficiency Video Coding) HEVC (H.265) consensus standard of rate meet the tendency of and It is raw.H.265 core objective is the premise for ensureing same video quality on the basis of H.264/AVC high profile Under, the code check of video flowing reduces 50%;While compression efficiency is improved, it is allowed to which coding side properly increases complexity (three times meter Calculate complexity).The H.265 decoding of standard at present is all to use flow shown in Fig. 1, parses frame slice a header, Ran Houshen Please idle frame buffer zone start to decode, finally etc. just start to parse new frame slice header after end to be decoded.It is this Problems be present in way:(1) because H.265 encoder complexity is high, decoding speed can be caused using this serial decoding process Degree is slow and occurs playing Caton phenomenon;(2) this serial decoding process causes hardware long time treatment idle condition, does not utilize In giving full play to hardware performance.
The content of the invention
The embodiments of the invention provide a kind of coding/decoding method and device, storage medium, processor, to optimize in correlation technique Decoding process.
According to the one side of the embodiment of the present application, there is provided a kind of coding/decoding method, including:Treating decoding video data During middle present frame is decoded, the state of the state machine set in decoding process is detected, wherein, state is used to indicate Performed action in decoding process;By performing the action corresponding to state and the state of switching state machine, following grasp is performed Make:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And the head of next frame are parsed, obtain next frame Hardware decoding configuration parameter, and the hardware of next frame decoding configuration parameter is stored into ping-pong buffer;And for hard In the interrupt processing function of part decoding, trigger and treat decoding video data using the hardware decoding configuration parameter in ping-pong buffer and enter Row hardware decodes.
Alternatively, by performing the action corresponding to state and the state of switching state machine, operation is performed, including:Examining When measuring state machine and being in first state, the head of next frame are parsed, and switch to the second state;In the second condition, judge With the presence or absence of the frame buffer zone of free time, if it is, state machine is switched into the third state, otherwise, judge hardware whether in sky Not busy state;When hardware is in idle condition, start hardware decoding;When state machine switches to the third state, judge whether to deposit Free time command queue's internal memory, if it is not, then judging whether hardware is in idle condition;When hardware is in idle condition, Start hardware decoding.
Alternatively, when being in the third state in state machine, and idle command queue's internal memory be present, method also includes:Will The hardware decoding configuration parameter of next frame is stored into command queue's internal memory of free time.
Alternatively, method also includes:The release command queuing memory in the interrupt processing function decoded for hardware;And sentence The disconnected command queue with the presence or absence of readable state, if it does, proceeding by hardware decoding.
According to the another aspect of the embodiment of the present application, another coding/decoding method is additionally provided, including:Enter to present frame In row decoding process, the state of first buffering area and second buffering area is detected, wherein, state includes:Read-only status and writeable shape State;First buffering area be in read-only status and second buffering area be in can write state when, read and be used for from first buffering area The hardware that hardware decoding is carried out to present frame decodes configuration parameter;And the hardware decoding configuration parameter of next frame is obtained, will be next The hardware decoding configuration parameter of frame is stored into second buffering area;When the hardware device for decoding is in idle condition, make Hardware decoding is carried out to present frame with the hardware decoding configuration parameter read from appointed buffer, wherein, appointed buffer the The buffering area of read-only status is currently in one buffering area and second buffering area.
Alternatively, before the state for detecting first buffering area and second buffering area, method also includes:To the head of present frame Parsed, obtain the hardware decoding configuration parameter of present frame.
Alternatively, decode configuration parameter using the hardware read from appointed buffer and it is decoded to present frame progress hardware Before, method also includes:Whether idle condition is in by least one of mode detection trigger hardware device:Detect that frame delays Area's application failure is rushed, wherein, frame buffer zone is used to store carries out decoded view data to present frame;Detect for storing Command queue's internal memory application failure of hardware decoding configuration parameter;And detect situations below:In being decoded for hardware In disconnected processing function, command queue's internal memory for storage hardware decoding configuration parameter is discharged, and command queue's internal memory is from can Write state is changed into read-only status.
Alternatively, the hardware decoding configuration parameter of next frame is stored into second buffering area, including:Detecting that frame delays When rushing area and applying successfully, triggering application command queue internal memory;When detecting command queue's internal memory application success, by next frame Hardware decoding configuration parameter is stored into command queue's internal memory.
Alternatively, method also includes:First buffering area from read-only status be changed into can write state, second buffering area is by writeable When state is changed into read-only status, and when the hardware device for decoding is in idle condition, read using from second buffering area The hardware decoding configuration parameter of the next frame taken carries out hardware decoding to next frame.
According to the another aspect of the embodiment of the present application, there is provided a kind of decoding apparatus, including:Detection module, for right During present frame is decoded in video data to be decoded, the state of the state machine set in decoding process is detected, its In, state is used to indicate action performed in decoding process;Execution module, for by perform action corresponding to state and The state of switching state machine, perform following operate:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And to next The head of frame are parsed, and obtain the hardware decoding configuration parameter of next frame, and the hardware decoding configuration parameter of next frame is deposited Storage is into ping-pong buffer;And in the interrupt processing function decoded for hardware, triggering uses the hardware solution in ping-pong buffer Code configuration parameter treats decoding video data and carries out hardware decoding.
According to the another further aspect of the embodiment of the present application, there is provided a kind of storage medium, storage medium include the program of storage, Wherein, equipment performs the coding/decoding method of the above where controlling storage medium when program is run.
According to the another further aspect of the embodiment of the present application, there is provided a kind of processor, processor are used for operation program, wherein, The coding/decoding method of the above is performed when program is run.
In embodiments of the present invention, using during present frame is decoded in treating decoding video data, detect The state of the state machine set in decoding process, by performing the action corresponding to state and the state of switching state machine, from And realize in hardware decoding simultaneously, configuration parameter used in the hardware decoding of next frame can be configured in advance, so as to Reduce the waste of hardware idling-resource, hardware performance can be given full play to, accelerate decoding speed, improve video playback Fluency, and then the broadcasting of the video file of high code check is supported, the technology for solving the decoding process in optimization correlation technique is asked Topic.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, forms the part of the application, this hair Bright schematic description and description is used to explain the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the schematic flow sheet according to a kind of coding/decoding method of correlation technique;
Fig. 2 is a kind of schematic flow sheet of coding/decoding method according to embodiments of the present invention;
Fig. 3 a are a kind of schematic flow sheets of decoding process according to embodiments of the present invention;
Fig. 3 b are the schematic flow sheets of another decoding process according to embodiments of the present invention;
Fig. 4 is a kind of structured flowchart of decoding apparatus according to embodiments of the present invention;
Fig. 5 is the schematic flow sheet of another coding/decoding method according to embodiments of the present invention;
Fig. 6 is the structured flowchart of another decoding apparatus according to embodiments of the present invention.
Embodiment
In order that those skilled in the art more fully understand the present invention program, below in conjunction with the embodiment of the present invention Accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only The embodiment of a part of the invention, rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill people The every other embodiment that member is obtained under the premise of creative work is not made, it should all belong to the model that the present invention protects Enclose.
It should be noted that term " first " in description and claims of this specification and above-mentioned accompanying drawing, " Two " etc. be for distinguishing similar object, without for describing specific order or precedence.It should be appreciated that so use Data can exchange in the appropriate case, so as to embodiments of the invention described herein can with except illustrating herein or Order beyond those of description is implemented.In addition, term " comprising " and " having " and their any deformation, it is intended that cover Cover it is non-exclusive include, be not necessarily limited to for example, containing the process of series of steps or unit, method, system, product or equipment Those steps or unit clearly listed, but may include not list clearly or for these processes, method, product Or the intrinsic other steps of equipment or unit.
In order to more fully understand the embodiment of the present application, below by explanation of technical terms involved in the embodiment of the present application such as Under:
Hardware decodes:It is the scheme with GPU resource decoded video streams that graphic chips producer proposes --- it is on the other side It is soft solution, that is, traditional scheme that decoding effort is undertaken with CPU;
Frame buffer zone (video memory):The two-dimensional array being made up of pixel, each memory cell correspond to one on screen Pixel, the whole corresponding two field picture of frame buffering is active screen.
According to embodiments of the present invention, there is provided a kind of embodiment of the method for coding/decoding method is, it is necessary to illustrate, in accompanying drawing The step of flow illustrates can perform in the computer system of such as one group computer executable instructions, although also, Logical order is shown in flow chart, but in some cases, can be to perform shown different from order herein or retouch The step of stating.
Fig. 2 is a kind of schematic flow sheet of coding/decoding method according to embodiments of the present invention.As shown in Fig. 2 this method includes:
Step S202, during present frame is decoded in treating decoding video data, detect and decoded above-mentioned The state of the state machine set in journey, wherein, above-mentioned state is used to indicate action performed in decoding process.
In one alternate embodiment, the state of above-mentioned state machine can include but is not limited to be used to parse new head PARSE_NEW_SLICE, the REQ_FB for asking frame buffer zone, the REQ_CQ for request command queue and for performing The HW_DECODING of hardware decoding.
Step S204, by performing the action corresponding to above-mentioned state and the state of the above-mentioned state machine of switching, perform following Operation:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And the head (slice header) of next frame are entered Row parsing, the hardware decoding configuration parameter of next frame is obtained, and the hardware decoding configuration parameter of above-mentioned next frame is stored to table tennis In pang caching;And in the interrupt processing function decoded for hardware, triggering is decoded using the hardware in above-mentioned ping-pong buffer Configuration parameter carries out hardware decoding to above-mentioned video data to be decoded.
Alternatively, by performing the action corresponding to above-mentioned state and the state of the above-mentioned state machine of switching, above-mentioned behaviour is performed Make, can be accomplished by the following way, but not limited to this:When detecting that above-mentioned state machine is in first state, parsing is next The head of frame, and switch to the second state;
Under above-mentioned second state, the frame buffer zone of free time is judged whether, if it is, above-mentioned state machine is switched to The third state, otherwise, judge whether hardware is in idle condition;When above-mentioned hardware is in idle condition, start hardware decoding;
When above-mentioned state machine switches to the third state, command queue's internal memory of free time is judged whether, if it is not, then Judge whether hardware is in idle condition;When above-mentioned hardware is in idle condition, start hardware decoding.
Alternatively, will be above-mentioned next when being in the third state in above-mentioned state machine, and idle command queue's internal memory be present The hardware decoding configuration parameter of frame is stored into above-mentioned idle command queue's internal memory.An optional implementation as the application Example, the release command queuing memory in the interrupt processing function decoded for hardware;And judge whether the life of readable state Queue is made, if it does, proceeding by hardware decoding.
For ease of understanding above-described embodiment, described in detail below in conjunction with Fig. 3 a and Fig. 3 b.Following examples adoption status machine Method, ping-pong buffer are used as by Liang Ge command queues, the data of storage configuration hardware register, parsing in advance One frame slice header, then start hardware decoding in hardware decodes end interrupt processing function, reduce the hardware free time Time, so as to reach the purpose for accelerating decoding speed.Specifically:
As shown in Figure 3 a, the mode of adoption status machine, four kinds of states are set:PARSE_NEW_SLICE、REQ_FB、REQ_ CQ、HW_DECODING;Then in decoding task and frame decoding end interrupt processing function switching state machine.
In decoding task, corresponding flow is completed according to state machine.If current state machine is PARSE_NEW_SLICE, A frame slice header are then parsed, state machine is then switched to REQ_FB, start to judge have not idle frame buffer zone to use Decode, if successfully frame buffer zone is arrived in application, state machine is switched to REQ_CQ, start to judge there is not idle order team Column memory;If applying for frame buffer zone failure, whether inquiry hardware locates idle condition and whether has had ready life Queue is made, if two conditions all meet, starts hardware decoding.
If current state machine is REQ_CQ, start to judge there is not idle command queue's internal memory, if successfully application is arrived Command queue's internal memory, then the parameter for needing to configure hardware decoding is stored into command queue;If apply for that command queue's internal memory loses Lose, then inquire about whether hardware locates idle condition and whether had ready command queue, if two conditions all meet, Then start hardware decoding.
As shown in Figure 3 b, in hardware frame decoding end interrupt handles function, the order of storage current decoded frame parameter Whether queuing memory discharges, then inquire about in ready command queue, if so, then starting hardware decoding.
Fig. 4 is a kind of structured flowchart of decoding apparatus according to embodiments of the present invention.As shown in figure 4, the device includes:
Detection module 40, for during present frame is decoded in treating decoding video data, detecting above-mentioned The state of the state machine set in decoding process, wherein, above-mentioned state is used to indicate action performed in decoding process;
Execution module 42, it is of coupled connections to detection module 40, for by performing the action corresponding to above-mentioned state and cutting The state for stating state machine is changed, performs following operate:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And under The head of one frame are parsed, and obtain the hardware decoding configuration parameter of next frame, and the hardware of above-mentioned next frame is decoded into configuration Parameter is stored into ping-pong buffer;And in the interrupt processing function decoded for hardware, triggering uses above-mentioned ping-pong buffer In hardware decoding configuration parameter hardware decoding is carried out to above-mentioned video data to be decoded.
It should be noted that above-mentioned modules are can be realized by way of software or hardware, for the latter, Implementations below, but not limited to this can be shown as:Above-mentioned modules are located in same processor;It is or above-mentioned each The mode of module in any combination is located in different processors.
It should be noted that the preferred embodiment of Fig. 4 shown devices may refer to the phase in embodiment of the method shown in Fig. 2 Description is closed, here is omitted.
Fig. 5 is the schematic flow sheet of another coding/decoding method according to embodiments of the present invention, as shown in figure 5, this method bag Include following steps:
Step S502, in decoding process is carried out to present frame, the state of first buffering area and second buffering area is detected, its In, above-mentioned state includes:Read-only status and can write state;Alternatively, in detection first buffering area and the state of second buffering area Before, the head of above-mentioned present frame can also be parsed, obtains above-mentioned first configuration parameter;In an alternative embodiment In, above-mentioned first configuration parameter can also obtain from miscellaneous equipment, and the other equipment is setting with parsing two field picture function It is standby.
Step S504, above-mentioned first buffering area be in read-only status and above-mentioned second buffering area be in can write state when, The hardware for carrying out hardware decoding to present frame is read from above-mentioned first buffering area and decodes configuration parameter;And obtain next frame Hardware decoding configuration parameter, the hardware of above-mentioned next frame decoding configuration parameter is stored into second buffering area;
Above-mentioned hardware decoding configuration parameter includes but is not limited to:Compression ratio, video format etc..
Step S506 is hard using being read from appointed buffer when the hardware device for decoding is in idle condition Part decode configuration parameter to above-mentioned present frame carry out hardware decoding, wherein, above-mentioned appointed buffer be above-mentioned first buffering area and The buffering area of read-only status is currently in second buffering area.
Whether idle condition is in by the above-mentioned hardware device of at least one of mode detection trigger:Detect that frame buffers Area's application failure, wherein, above-mentioned frame buffer zone is used to store carries out decoded view data to above-mentioned present frame;Detect use In command queue's internal memory application failure of storage hardware decoding configuration parameter;And detect situations below:For hardware solution In the interrupt processing function of code, command queue's internal memory for storage hardware decoding configuration parameter, and mentioned order team are discharged Column memory from can write state be changed into read-only status.
In one alternate embodiment, the hardware of next frame can be decoded into configuration parameter storage value life in the following manner Make in queuing memory, specifically, can be accomplished by the following way, but not limited to this:Above-mentioned frame buffer zone Shen will detected When please succeed, triggering application mentioned order queuing memory;When detecting mentioned order queuing memory application success, under above-mentioned The hardware decoding configuration parameter of one frame is stored into above-mentioned command queue's internal memory.
Alternatively, above-mentioned first buffering area from read-only status be changed into can write state, above-mentioned second buffering area is by writeable shape When state is changed into above-mentioned read-only status, and when the above-mentioned hardware device for being used to decode is in idle condition, using from above-mentioned the The hardware decoding configuration parameter for the above-mentioned next frame that two buffering areas are read carries out hardware decoding to next frame.
It should be noted that the state of above-mentioned first buffering area and second buffering area can change, also, in difference State its participate in action and it is different, such as:Above-mentioned first buffering area from read-only status be changed into can write state, it is above-mentioned Second buffering area from can write state be changed into above-mentioned read-only status when, and it is above-mentioned be used for decode hardware device be in idle shape During state, hardware solution is carried out to the next frame of above-mentioned present frame using from above-mentioned second configuration parameter that above-mentioned second buffering area is read Code.From the discussion above it can also be seen that because the configuration that when present frame is decoded, can in advance obtain next frame is joined Number, therefore, reduces the free time of hardware, is favorably improved decoding efficiency.
The embodiment of the present invention also provides a kind of decoding apparatus, and the decoding apparatus is used to realize the coding/decoding method shown in Fig. 5, figure 6 be the structured flowchart of another decoding apparatus according to embodiments of the present invention.As shown in fig. 6, the device includes:
Detection module 60, in decoding process is carried out to present frame, detecting first buffering area and second buffering area State, wherein, above-mentioned state includes:Read-only status and can write state;
Processing module 62, for being in read-only status in above-mentioned first buffering area and above-mentioned second buffering area is in writeable shape During state, the hardware for carrying out hardware decoding to present frame is read from above-mentioned first buffering area and decodes configuration parameter;And obtain The hardware decoding configuration parameter of next frame, the hardware decoding configuration parameter of above-mentioned next frame is stored into second buffering area;
Decoder module 66, when the hardware device for decoding is in idle condition, use what is read from appointed buffer Hardware decodes configuration parameter and carries out hardware decoding to above-mentioned present frame, wherein, above-mentioned appointed buffer is above-mentioned first buffering area With the buffering area that read-only status is currently in second buffering area.
It should be noted that above-mentioned modules are can be realized by way of software or hardware, for the latter, Implementations below, but not limited to this can be shown as:Above-mentioned modules are located in same processor;It is or above-mentioned each The mode of module in any combination is located in different processors.
It should be noted that the preferred embodiment of Fig. 6 shown devices may refer in embodiment of the method shown in Fig. 2 and 5 Associated description, here is omitted.
The present embodiment also provides a kind of storage medium, and above-mentioned storage medium includes the program of storage, wherein, in said procedure Equipment where above-mentioned storage medium is controlled to perform the coding/decoding method shown in Fig. 2 or Fig. 6 during operation.
Exemplified by performing method shown in Fig. 2, above-mentioned storage medium is at least used to store the program for performing following functions:Right During present frame is decoded in video data to be decoded, the state of the state machine set in decoding process is detected, its In, state is used to indicate action performed in decoding process;By performing action corresponding to state and switching state machine State, perform following operate:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And the head of next frame are carried out Parsing, the hardware decoding configuration parameter of next frame is obtained, and the hardware decoding configuration parameter of next frame is stored to ping-pong buffer In;And in the interrupt processing function decoded for hardware, triggering uses the hardware decoding configuration parameter pair in ping-pong buffer Video data to be decoded carries out hardware decoding.
Alternatively, above-mentioned storage medium is additionally operable to perform the program of following functions:Detecting that state machine is in the first shape During state, the head of next frame are parsed, and switch to the second state;In the second condition, the frame buffering of free time is judged whether Area, if it is, state machine is switched into the third state, otherwise, judge whether hardware is in idle condition;The free time is in hardware During state, start hardware decoding;When state machine switches to the third state, command queue's internal memory of free time is judged whether, If it is not, then judging whether hardware is in idle condition;When hardware is in idle condition, start hardware decoding.
Alternatively, above-mentioned storage medium is additionally operable to the program that storage performs following functions:The third state is in state machine, And when idle command queue's internal memory be present, the hardware decoding configuration parameter of next frame is stored to command queue's internal memory of free time In.
The present embodiment also provides a kind of processor, and above-mentioned processor is used for operation program, wherein, said procedure is held when running Coding/decoding method shown in row Fig. 2 or Fig. 4
Exemplified by performing method shown in Fig. 2, above-mentioned processor operationally, performs the program of following functions:Treating solution During present frame is decoded in code video data, the state of the state machine set in decoding process is detected, wherein, shape State is used to indicate action performed in decoding process;By performing the action corresponding to state and the state of switching state machine, Perform following operate:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And the head of next frame are parsed, The hardware decoding configuration parameter of next frame is obtained, and the hardware decoding configuration parameter of next frame is stored into ping-pong buffer;With And in the interrupt processing function decoded for hardware, triggering uses the hardware in ping-pong buffer to decode configuration parameter to be decoded Video data carries out hardware decoding.
Alternatively, above-mentioned processor is additionally operable to perform the program of following functions:It is changed into first buffering area from read-only status Can write state, second buffering area from can write state be changed into read-only status when, and for decoding hardware device be in free time During state, hardware decoding is carried out to the next frame of present frame using from the second configuration parameter that second buffering area is read.
Alternatively, above-mentioned processor is additionally operable to perform the program of following functions:Detecting that state machine is in first state When, the head of next frame are parsed, and switch to the second state;In the second condition, the frame buffer zone of free time is judged whether, If it is, state machine is switched into the third state, otherwise, judge whether hardware is in idle condition;Idle shape is in hardware During state, start hardware decoding;When state machine switches to the third state, command queue's internal memory of free time is judged whether, such as Fruit is no, then judges whether hardware is in idle condition;When hardware is in idle condition, start hardware decoding.
The embodiments of the present invention are for illustration only, do not represent the quality of embodiment.
In the above embodiment of the present invention, the description to each embodiment all emphasizes particularly on different fields, and does not have in some embodiment The part of detailed description, it may refer to the associated description of other embodiment.
In several embodiments provided herein, it should be understood that disclosed technology contents, others can be passed through Mode is realized.Wherein, device embodiment described above is only schematical, such as the division of the unit, Ke Yiwei A kind of division of logic function, can there is an other dividing mode when actually realizing, for example, multiple units or component can combine or Person is desirably integrated into another system, or some features can be ignored, or does not perform.Another, shown or discussed is mutual Between coupling or direct-coupling or communication connection can be INDIRECT COUPLING or communication link by some interfaces, unit or module Connect, can be electrical or other forms.
The unit illustrated as separating component can be or may not be physically separate, show as unit The part shown can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple On unit.Some or all of unit therein can be selected to realize the purpose of this embodiment scheme according to the actual needs.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, can also That unit is individually physically present, can also two or more units it is integrated in a unit.Above-mentioned integrated list Member can both be realized in the form of hardware, can also be realized in the form of SFU software functional unit.
If the integrated unit is realized in the form of SFU software functional unit and is used as independent production marketing or use When, it can be stored in a computer read/write memory medium.Based on such understanding, technical scheme is substantially The part to be contributed in other words to prior art or all or part of the technical scheme can be in the form of software products Embody, the computer software product is stored in a storage medium, including some instructions are causing a computer Equipment (can be personal computer, server or network equipment etc.) perform each embodiment methods described of the present invention whole or Part steps.And foregoing storage medium includes:USB flash disk, read-only storage (ROM, Read-Only Memory), arbitrary access are deposited Reservoir (RAM, Random Access Memory), mobile hard disk, magnetic disc or CD etc. are various can be with store program codes Medium.
Described above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For member, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications also should It is considered as protection scope of the present invention.

Claims (12)

  1. A kind of 1. coding/decoding method, it is characterised in that including:
    During present frame is decoded in treating decoding video data, the state set in the decoding process is detected The state of machine, wherein, the state is used to indicate action performed in decoding process;
    By performing the action corresponding to the state and the state of the switching state machine, following operate is performed:Using table tennis The mode storage hardware decoding configuration parameter of caching;And the head of next frame are parsed, obtain the hardware decoding of next frame Configuration parameter, and the hardware decoding configuration parameter of the next frame is stored into ping-pong buffer;And decoded for hardware Interrupt processing function in, triggering decodes configuration parameter to the video data to be decoded using the hardware in the ping-pong buffer Carry out hardware decoding.
  2. 2. according to the method for claim 1, it is characterised in that by performing action and switching institute corresponding to the state The state of state machine is stated, performs the operation, including:
    When detecting that the state machine is in first state, the head of next frame are parsed, and switch to the second state;
    In said second condition, the frame buffer zone of free time is judged whether, if it is, the state machine is switched into the 3rd State, otherwise, judge whether hardware is in idle condition;When the hardware is in idle condition, start hardware decoding;
    When the state machine switches to the third state, command queue's internal memory of free time is judged whether, if it is not, then judging Whether hardware is in idle condition;When the hardware is in idle condition, start hardware decoding.
  3. 3. according to the method for claim 2, it is characterised in that be in the third state in the state machine, and exist idle Command queue's internal memory when, methods described also includes:The hardware decoding configuration parameter of the next frame was stored to the free time Command queue's internal memory in.
  4. 4. according to the method for claim 1, it is characterised in that methods described also includes:In the interruption decoded for hardware Handle release command queuing memory in function;And the command queue of readable state is judged whether, if it does, proceeding by Hardware decodes.
  5. A kind of 5. coding/decoding method, it is characterised in that including:
    In decoding process is carried out to present frame, the state of first buffering area and second buffering area is detected, wherein, the state bag Include:Read-only status and can write state;
    The first buffering area be in read-only status and the second buffering area be in can write state when, from the described first buffering The hardware for carrying out hardware decoding to present frame is read in area and decodes configuration parameter;And obtain the hardware decoding configuration of next frame Parameter, the hardware decoding configuration parameter of the next frame is stored into second buffering area;
    When the hardware device for decoding is in idle condition, configuration parameter is decoded using the hardware read from appointed buffer Hardware decoding is carried out to the present frame, wherein, the appointed buffer be in the first buffering area and second buffering area when The preceding buffering area in read-only status.
  6. 6. according to the method for claim 5, it is characterised in that detection first buffering area and second buffering area state it Before, methods described also includes:
    The head of the present frame are parsed, obtain the hardware decoding configuration parameter of the present frame.
  7. 7. according to the method for claim 5, it is characterised in that use the hardware decoding configuration ginseng read from appointed buffer Before several progress hardware decodings to the present frame, methods described also includes:Pass through at least one of mode detection trigger institute State whether hardware device is in idle condition:
    Frame buffer zone application failure is detected, wherein, it is decoded to present frame progress that the frame buffer zone is used for storage View data;Detect command queue's internal memory application failure for storage hardware decoding configuration parameter;And detect following Situation:In the interrupt processing function decoded for hardware, discharge in the command queue for storage hardware decoding configuration parameter Deposit, and command queue's internal memory from can write state be changed into read-only status.
  8. 8. according to the method for claim 7, it is characterised in that by the hardware of next frame decoding configuration parameter store to In second buffering area, including:
    When detecting that the frame buffer zone is applied successfully, command queue's internal memory is applied in triggering;
    When detecting command queue's internal memory application success, the hardware decoding configuration parameter of the next frame is stored to institute State in command queue's internal memory.
  9. 9. the method according to any one in claim 5 to 8, it is characterised in that methods described also includes:Described One buffering area from read-only status be changed into can write state, the second buffering area from can write state be changed into the read-only status when, and And when the hardware device for being used to decode is in idle condition, use the next frame read from the second buffering area Hardware decoding configuration parameter to next frame carry out hardware decoding.
  10. A kind of 10. decoding apparatus, it is characterised in that including:
    Detection module, for during present frame is decoded in treating decoding video data, detecting and being decoded described The state of the state machine set in journey, wherein, the state is used to indicate action performed in decoding process;
    Execution module, for by performing the action corresponding to the state and the state of the switching state machine, performing following Operation:Storage hardware decodes configuration parameter by the way of ping-pong buffer;And the head of next frame are parsed, obtain next The hardware decoding configuration parameter of frame, and the hardware decoding configuration parameter of the next frame is stored into ping-pong buffer;And In interrupt processing function for hardware decoding, trigger and treated using the hardware decoding configuration parameter in the ping-pong buffer to described Decoding video data carry out hardware decoding.
  11. A kind of 11. storage medium, it is characterised in that the storage medium includes the program of storage, wherein, run in described program When control the storage medium where coding/decoding method in equipment perform claim requirement 1 to 4 described in any one;Or perform Coding/decoding method in claim 5-9 described in any one.
  12. A kind of 12. processor, it is characterised in that the processor is used for operation program, wherein, right of execution when described program is run Profit requires the coding/decoding method described in any one in 1 to 4;Or perform claim requires the decoding side in 5-9 described in any one Method.
CN201710826776.2A 2017-09-13 2017-09-13 Decoding method and device, storage medium and processor Active CN107613302B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710826776.2A CN107613302B (en) 2017-09-13 2017-09-13 Decoding method and device, storage medium and processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710826776.2A CN107613302B (en) 2017-09-13 2017-09-13 Decoding method and device, storage medium and processor

Publications (2)

Publication Number Publication Date
CN107613302A true CN107613302A (en) 2018-01-19
CN107613302B CN107613302B (en) 2020-10-02

Family

ID=61063649

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710826776.2A Active CN107613302B (en) 2017-09-13 2017-09-13 Decoding method and device, storage medium and processor

Country Status (1)

Country Link
CN (1) CN107613302B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111124577A (en) * 2019-12-23 2020-05-08 威创集团股份有限公司 Screen display control method and electronic equipment
CN111683253A (en) * 2020-06-12 2020-09-18 浪潮(北京)电子信息产业有限公司 Parameter set decoding method and device
CN111768609A (en) * 2020-06-29 2020-10-13 珠海格力电器股份有限公司 Infrared signal processing method and device
CN116737248A (en) * 2023-08-09 2023-09-12 武汉凌久微电子有限公司 Dormancy and awakening method of hard decoder

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102487439A (en) * 2010-12-01 2012-06-06 安凯(广州)微电子技术有限公司 Audio and video acquisition and play processing method with whole embedding of memory
US20130136188A1 (en) * 2011-11-30 2013-05-30 Freescale Semiconductor, Inc Multi-core decompression of block coded video data
CN204697189U (en) * 2015-07-06 2015-10-07 深圳市聚视安技术有限公司 A kind of AHD simulates HD video transducer
CN105992005A (en) * 2015-03-04 2016-10-05 广州市动景计算机科技有限公司 Video decoding method and device and terminal device
CN106375767A (en) * 2015-07-24 2017-02-01 联发科技股份有限公司 Hybrid video decoder and associated hybrid video decoding method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102487439A (en) * 2010-12-01 2012-06-06 安凯(广州)微电子技术有限公司 Audio and video acquisition and play processing method with whole embedding of memory
US20130136188A1 (en) * 2011-11-30 2013-05-30 Freescale Semiconductor, Inc Multi-core decompression of block coded video data
CN105992005A (en) * 2015-03-04 2016-10-05 广州市动景计算机科技有限公司 Video decoding method and device and terminal device
CN204697189U (en) * 2015-07-06 2015-10-07 深圳市聚视安技术有限公司 A kind of AHD simulates HD video transducer
CN106375767A (en) * 2015-07-24 2017-02-01 联发科技股份有限公司 Hybrid video decoder and associated hybrid video decoding method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111124577A (en) * 2019-12-23 2020-05-08 威创集团股份有限公司 Screen display control method and electronic equipment
CN111124577B (en) * 2019-12-23 2021-12-07 威创集团股份有限公司 Screen display control method and electronic equipment
CN111683253A (en) * 2020-06-12 2020-09-18 浪潮(北京)电子信息产业有限公司 Parameter set decoding method and device
CN111768609A (en) * 2020-06-29 2020-10-13 珠海格力电器股份有限公司 Infrared signal processing method and device
CN116737248A (en) * 2023-08-09 2023-09-12 武汉凌久微电子有限公司 Dormancy and awakening method of hard decoder
CN116737248B (en) * 2023-08-09 2023-11-14 武汉凌久微电子有限公司 Dormancy and awakening method of hard decoder

Also Published As

Publication number Publication date
CN107613302B (en) 2020-10-02

Similar Documents

Publication Publication Date Title
CN107613302A (en) Coding/decoding method and device, storage medium, processor
US11012338B2 (en) Network adaptive latency reduction through frame rate control
US11706483B2 (en) Video playing method and apparatus, and electronic device
CN106034129B (en) A kind of FBSG method for game synchronization
US9584809B2 (en) Encoding control apparatus and encoding control method
CN103024456A (en) Online video playing method and video playing server
WO2017096885A1 (en) Video playing method and device
CN103873952B (en) A kind of efficient video playback frame losing control system and its method
CN105245880B (en) Video file cutting method and distributed trans-coding method
CN106034261B (en) A kind of view networking service treating method and apparatus
CN101783919B (en) Round-robin method based on video conference
CN113490055B (en) Data processing method and device
CN107295364B (en) For the real-time streaming transport control method of barrage video, control device
CN107147921A (en) Based on section and the intelligence CDN video playback accelerated methods dispatched and equipment
WO2021238940A1 (en) Video data processing method and apparatus, and electronic device
CN109889919A (en) A kind of video transcoding method, device, system and medium
CN105323183B (en) Data transmission processing method and system between network server
CN103957445A (en) Video redirecting system and method based on application virtualization technology
CN104243412B (en) Network data processing terminal and method in wherein network data
CN105120323B (en) A kind of method and system of distribution player task scheduling
CN115460458B (en) Video frame loss method and device
WO2013174337A2 (en) Subtitle extraction method and apparatus
CN104038778B (en) Multimedia redirects the control method and device played
CN105611394B (en) Video reorientation method under VDI environment and system
CN109218809A (en) A kind of playing method and device of Streaming Media

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant