CN107590047B - SMI signal timeout monitoring system and method - Google Patents
SMI signal timeout monitoring system and method Download PDFInfo
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- CN107590047B CN107590047B CN201610537849.1A CN201610537849A CN107590047B CN 107590047 B CN107590047 B CN 107590047B CN 201610537849 A CN201610537849 A CN 201610537849A CN 107590047 B CN107590047 B CN 107590047B
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Abstract
The invention provides a system and a method for monitoring the timeout of an SMI signal, wherein the SMI signal transmitted by a GPIO pin of a BIOS is monitored by a BMC in a polling mode. The recording module records the time corresponding to the second polling point as the starting time of the recording module for recording the SMI signal continuous low voltage when the first polling point is provided with the first flag value in the previous polling period of the first polling point and the clear module clears the first flag value at the first polling point, the first polling point and the second polling point monitored by the voltage detection module are both low potential, and the flag detection module monitors the state information of the previous polling period at the second polling point and acquires the preset flag value indicating that no voltage is reduced in the previous polling period of the second polling point.
Description
Technical Field
The present invention relates to a system and a method for monitoring an SMI signal timeout, and more particularly, to a system and a method for monitoring an SMI signal timeout, which can reduce BMC operation load.
Background
The BMC monitors the current state of the system and records the event, wherein the SMI Timeout sensor is a sensor for monitoring whether the SMI (System Management interface) of the BIOS of the BMC has abnormality, the normal transmission signal can jump in high and low voltage interaction by using the signal of the GPIO, if the signal is maintained at the low voltage all the time and the time lasts too long, the SMI stops working, the BMC records the event if the abnormality occurs. The method for judging whether the signal is always maintained at the low voltage is generally carried out only by receiving the interruption of hardware, when the interruption A from the high voltage to the low voltage is received, the BMC records the starting time, when the interruption A from the low voltage to the high voltage is received, the BMC records the ending time, calculates the time difference of the A.B point, and whether the timeout phenomenon occurs or not, but the SMI signal jumps very frequently and can occur many times per second.
Disclosure of Invention
The invention mainly aims to provide a monitoring system and a monitoring method capable of reducing the timeout of SMI signals of BMC operation load.
The invention provides a monitoring system for SMI signal timeout, which monitors SMI signals transmitted by GPIO pin of BIOS in a polling mode by BMC, and comprises:
the setting module is used for setting a polling period and presetting a timeout standard, and the end point of the polling period is a polling point;
the voltage detection module monitors the voltage of the SMI signal at the polling point;
a flag detection module that monitors GPIO status information during a polling period, the status information including whether a status flag value associated with the SMI signal is a first flag value indicating at least one voltage drop during the polling period or a default flag value indicating no voltage drop during the polling period;
the device comprises a recording module, a calculating module, a judging module and a control module, wherein the recording module is used for recording the starting time (Ta) and the current time (Tb) of the SMI signal lasting low voltage;
the judging module is used for judging whether the accumulated time length reaches a preset time-out standard or not;
the notification module is used for sending out a timeout notification after the judgment result is that the preset timeout standard is reached;
a zero clearing module for clearing the record of the first flag value and/or the starting time, namely restoring the first flag value of the previous period of the polling point to a preset flag value and/or clearing the starting time;
and after the first flag value is set in the previous polling period of the first polling point and the clear module clears the first flag value at the first polling point, the first polling point and the second polling point monitored by the voltage detection module are both at low potential, and the flag detection module monitors the state information of the previous polling period at the second polling point, and when the preset flag value indicating that no voltage is reduced in the previous polling period of the second polling point is obtained, the recording module records the time corresponding to the second polling point as the starting time when the recording module records the SMI signal and continues to be at low voltage.
Particularly, when the voltage detection module monitors that a high voltage occurs at the polling point or the flag detection module monitors that the first flag value is in the previous polling period of the polling point, the reset module resets the first flag value in the previous period of the polling point to a preset flag value and resets the starting time.
Particularly, the polling point cleared by the clear module is an ending polling point used for judging the accumulated time length, the cleared accumulated time length is recalculated, and if the starting time does not appear before the cleared polling point, the accumulated time length is not generated at the ending polling point; if the initial time appears before the reset polling point, the polling point is ended, and the accumulated time length does not reach the preset timeout standard.
The invention also provides a method for monitoring the timeout of the SMI signal, which monitors the execution of the SMI signal transmitted by the GPIO pin of the BIOS in a polling mode by the BMC and comprises the following steps:
step S10, setting a polling period and a preset timeout standard, wherein the end point of the polling period is a polling point;
step S20, receiving a start monitoring signal and monitoring according to the polling point;
step S30, monitoring whether the voltage of the SMI signal at the current polling point is low voltage, if so, executing step S40; otherwise, go to step S50;
step S40, monitoring whether the current polling period generates a voltage drop flag; if yes, go to step S50; otherwise, go to step S60; the current polling cycle is a polling cycle taking a current polling point as an end point;
step S50, whether there is already the starting time Ta for recording the SMI signal continuous low voltage; if yes, go to step S55, otherwise go to step S58;
step S55, clearing Ta and clearing the flag, waiting for executing the subsequent polling point, and then executing step S30;
step S58, recording no time and waiting for executing the subsequent polling point, then executing step S30;
step S60, whether there is already the starting time Ta for recording the SMI signal continuous low voltage; if yes, go to step S65, otherwise go to step S90;
step S65, recording the current time Tb and calculating the accumulated time Tb-Ta between the current time and the starting time;
step S70, judging whether the accumulated time length reaches the preset time-out standard, if yes, executing step S80; if not, waiting for the execution of the subsequent polling point, and then executing the step S30;
step S80, sending out a time-out notice;
in step S90, the start time Ta of the SMI signal continuing to be low is recorded and the execution of the subsequent polling point is waited, and then, step S30 is performed.
In particular, the polling period is 1 second, 2 seconds or 5 seconds.
In particular, the preset timeout criterion is 2 minutes.
Specifically, the BMC may record the event of the timeout notification in the NVRAM corresponding to the BMC in the form of SYSTEM LOG _ SEL.
Compared with the prior art, the invention combines the interrupt and polling modes, the BMC only records a flag when receiving the interrupt (from high voltage to low voltage), and checks whether the SMI is overdue or not by matching the polling mode per second, thereby reducing the load of the operation time per second of the BMC.
[ description of the drawings ]
FIG. 1 is a schematic block diagram of a SMI timeout monitoring system according to the present invention.
FIG. 2 is a flowchart illustrating a method for monitoring SMI timeout.
FIG. 3 is a monitoring state diagram for issuing a timeout notification.
Fig. 4 is a monitoring state diagram in which the voltage of the SMI signal is high at the polling point occurring in the monitoring period.
Fig. 5 is a monitoring state diagram showing that the voltage of the SMI signal is low at a polling point occurring in a monitoring period and at least one flag of voltage drop exists in a polling period before the polling point.
[ detailed description ] embodiments
Referring to fig. 1, the present invention provides a system 100 for monitoring timeout of an SMI signal, which monitors an SMI signal transmitted by a GPIO pin of a BIOS through a polling method by a BMC, and includes:
a setting module 10 for setting a polling period and presetting a timeout criterion, wherein the end point of the polling period is a polling point;
a voltage detection module 20 for monitoring the voltage level of the SMI signal at the polling point;
a flag detection module 30 for monitoring status information of GPIOs in a polling cycle, the status information including whether a status flag value associated with the SMI signal is a first flag value indicating at least one voltage drop during the polling cycle or a default flag value indicating no voltage drop during the polling cycle;
a recording module 40 for recording the starting time (Ta) and the current time (Tb) of the SMI signal continuing to the low voltage;
a calculating module 50 for calculating an accumulated time period between the current time and the starting time, wherein the starting time of the monitored SMI signal with the low voltage represents an estimated time when the SMI is triggered to start or begins to execute the SMI;
a judging module 60 for judging whether the accumulated time length reaches a preset time-out standard;
a notification module 70 for sending out a timeout notification when the determination result is that the preset timeout criterion is reached;
a clear module 80 for clearing the record of the first flag value and/or the start time, i.e. restoring the first flag value in the previous period of the polling point to the preset flag value and/or clearing the start time;
and after the first flag value is set in the previous polling period of the first polling point and the clear module 80 clears the first flag value at the first polling point, the first polling point and the second polling point monitored by the voltage detection module 20 are both at low potential, and the flag detection module 30 monitors the status information of the previous polling period at the second polling point, and when the preset flag value indicating that no voltage drop occurs in the previous polling period of the second polling point is obtained, the recording module 40 records the time corresponding to the second polling point as the starting time for the recording module to record the SMI signal at low voltage continuously.
In this embodiment, when the voltage detection module 20 monitors that a high voltage occurs at the polling point or the flag detection module 30 monitors that the first flag value is included in the previous polling period of the polling point, the clearing module 70 restores the first flag value in the previous period of the polling point to the preset flag value and clears the start time.
In this embodiment, the polling point cleared by the clear module 70 is an end polling point used for determining the accumulated time length, the cleared accumulated time length is recalculated, and if the starting time does not occur before the cleared polling point, the end polling point does not generate the accumulated time length; if the initial time appears before the reset polling point, the polling point is ended, and the accumulated time length does not reach the preset timeout standard.
Referring to fig. 2, the present invention further provides a method for monitoring timeout of an SMI signal, which monitors execution of the SMI signal transmitted by a GPIO pin of a BIOS by a BMC in a polling manner, and includes the following steps:
step S10, setting a polling period and a preset timeout standard, wherein the end point of the polling period is a polling point;
step S20, receiving a start monitoring signal and monitoring according to the polling point;
step S30, monitoring whether the voltage of the SMI signal at the current polling point is low voltage, if so, executing step S40; otherwise, go to step S50;
step S40, monitoring whether the current polling period generates a voltage drop flag; if yes, go to step S50; otherwise, go to step S60; the current polling cycle is a polling cycle taking a current polling point as an end point;
step S50, whether there is already the starting time (Ta) for recording the SMI signal continuous low voltage; if yes, go to step S55, otherwise go to step S58;
step S58, recording no time and waiting for executing the subsequent polling point, then executing step S30;
step S60, whether there is already the starting time (Ta) for recording the SMI signal continuous low voltage; if yes, go to step S65, otherwise go to step S90;
step S65, recording the current time (Tb), and calculating the accumulated time Tb-Ta between the current time and the starting time;
step S70, judging whether the accumulated time length reaches the preset time-out standard, if yes, executing step 80; if not, waiting for the execution of the subsequent polling point, and then executing the step S30;
step S80, sending out a time-out notice;
step S90, record the start time (Ta) of the SMI signal continuing low and wait for the execution of the subsequent polling point, and then execute step S30.
In this embodiment, the polling period is 1 second, 2 seconds, or 5 seconds.
In this embodiment, the predetermined timeout criterion is 2 minutes.
In this embodiment, the BMC records the event of the timeout notification in the NVRAM corresponding to the BMC in a SYSTEM LOG _ SEL format.
Referring to fig. 3-5, taking polling once per second and the predetermined timeout criterion as 2 minutes as an example, the method according to the present invention can determine that the 2 nd polling point (i.e. the 2 nd second) is the estimated time when the SMI is triggered to start \ start executing the SMI.
In fig. 3, when the 3 rd polling point, the 4 th polling point, and the 5 th polling point … … are all low voltage, and there is no first flag value with voltage drop in each polling cycle before the 122 th polling point, the BMC records the 2 nd polling point as Ta, records each subsequent polling point as Tb, and continuously updates Tb, before the 122 th polling point arrives, because Tb-Ta <120 seconds, the BMC continuously monitors the next polling point after the current polling point is monitored, until the BMC polls to the 122 th polling point, Tb-Ta =120 seconds, the 122 th polling point is the end polling point, and at this time, the timeout notification is sent.
In fig. 4, the No. 3 polling point, the No. 4 polling point, and the No. 5 polling point … … polling point 50 are all low voltages, and there is no first flag value of voltage drop in each polling cycle before the No. 50 polling point, and the No. 51 polling point is a high voltage, then the No. 51 polling point is an end polling point, the accumulated time Tb-Ta =49<120 seconds, and does not reach the preset timeout criterion, and no timeout notification is sent.
In fig. 5, all of the 3 rd polling point, the 4 th polling point, and the 5 th polling point … …, the 91 st polling point are low voltages, and there is no first flag value with voltage drop in each polling cycle before the 90 th polling point, and there is a first flag value with voltage drop in the previous polling cycle before the 91 st polling point, then the 91 st polling point is a polling end point, the accumulated time Tb-Ta =89<120 seconds, and the preset timeout criterion is not reached, and no timeout notification is sent.
The invention combines the interrupt and polling modes, the BMC records a flag only when receiving interrupt (from high voltage to low voltage), and checks whether an SMI signal in execution exists in a polling mode per second, the SMI signal in execution continues to have low voltage for more than one polling period, and the BMC only detects the timeout of the SMI signal in execution and continues to have low voltage for more than one polling period, namely continuously detects whether the SMI signal which has executed for more than one polling period exceeds the timeout, instead of detecting the timeout of each SMI signal every time, so that the load of operation time per second of the BMC can be reduced.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. A monitoring system for SMI signal timeout monitors SMI signals transmitted by GPIO pins of a BIOS in a polling mode by a BMC, and is characterized by comprising:
the setting module is used for setting a polling period and presetting a timeout standard, and the end point of the polling period is a polling point;
the voltage detection module monitors the voltage of the SMI signal at the polling point;
a flag detection module for monitoring status information of GPIOs in a polling cycle, wherein the status information comprises a status flag value related to the SMI signal, the status flag value is a first flag value indicating at least one voltage drop in the polling cycle or is a preset flag value indicating no voltage drop in the polling cycle;
the recording module is used for recording the starting time Ta and the current time Tb of the SMI signal continuous low voltage;
the calculation module is used for calculating the accumulated time length between the current time and the starting time;
the judging module is used for judging whether the accumulated time length reaches a preset time-out standard or not;
the notification module is used for sending out a timeout notification after the judgment result is that the preset timeout standard is reached;
a zero clearing module for clearing the record of the first flag value and/or the starting time, namely restoring the first flag value of the previous period of the polling point to a preset flag value and/or clearing the starting time;
after the status flag value generated in the previous polling cycle of the current polling point is the first flag value and the clear module clears the first flag value at the current polling point, when the voltage detection module monitors that the voltage of the SMI signal is low at the current polling point and the subsequent polling point adjacent to the current polling point, and the flag detection module monitors that the status flag value generated in the previous polling cycle of the subsequent polling point is the preset flag value, the recording module records the time corresponding to the subsequent polling point as the starting time for the recording module to record the continuous low voltage of the SMI signal;
when the voltage detection module monitors that a high voltage occurs at the polling point or the flag detection module monitors that the state flag value generated in the previous polling period of the polling point is the first flag value, the reset module restores the state flag value in the previous period of the polling point from the first flag value to a preset flag value and resets the starting time.
2. The system for monitoring timeout of SMI signals according to claim 1, further comprising: the polling point cleared by the clear module is an ending polling point used for judging the accumulated time length, the cleared accumulated time length is recalculated, and if the starting time does not appear before the cleared polling point, the accumulated time length is not generated at the ending polling point; if the initial time appears before the reset polling point, the polling point is ended, and the accumulated time length does not reach the preset timeout standard.
3. A monitoring method for SMI signal timeout monitors execution of SMI signal transmitted by GPIO pin of BIOS by BMC in polling mode, which is characterized by comprising the following steps:
step S10, setting a polling period and a preset timeout standard, wherein the end point of the polling period is a polling point;
step S20, receiving a start monitoring signal and monitoring according to the polling point;
step S30, monitoring whether the voltage of the SMI signal at the current polling point is low voltage, if so, executing step S40; otherwise, go to step S50;
step S40, monitoring whether the current polling period generates a voltage drop flag; if yes, go to step S50; otherwise, go to step S60; the current polling cycle is a polling cycle taking a current polling point as an end point;
step S50, whether there is already the starting time Ta for recording the SMI signal continuous low voltage; if yes, go to step S55, otherwise go to step S58;
step S55, clearing Ta and clearing the flag, waiting for executing the subsequent polling point, and then executing step S30;
step S58, recording no time and waiting for executing the subsequent polling point, then executing step S30;
step S60, whether there is already the starting time Ta for recording the SMI signal continuous low voltage; if yes, go to step S65, otherwise go to step S90;
step S65, recording the current time Tb and calculating the accumulated time Tb-Ta between the current time and the starting time;
step S70, judging whether the accumulated time length reaches the preset time-out standard, if yes, executing step S80; if not, waiting for the execution of the subsequent polling point, and then executing the step S30;
step S80, sending out a time-out notice;
in step S90, the start time Ta of the SMI signal continuing to be low is recorded and the execution of the subsequent polling point is waited, and then, step S30 is performed.
4. The method of monitoring timeout of an SMI signal according to claim 3, further comprising: the polling period is 1 second, 2 seconds, or 5 seconds.
5. The method of monitoring timeout of an SMI signal according to claim 3, further comprising: the preset timeout criterion is 2 minutes.
6. The method of monitoring timeout of an SMI signal according to claim 3, further comprising: the BMC records the event of the overtime notification in the nonvolatile random access memory corresponding to the BMC in the form of a system event log.
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