CN107579724B - Low-frequency analgesic device - Google Patents
Low-frequency analgesic device Download PDFInfo
- Publication number
- CN107579724B CN107579724B CN201710766608.9A CN201710766608A CN107579724B CN 107579724 B CN107579724 B CN 107579724B CN 201710766608 A CN201710766608 A CN 201710766608A CN 107579724 B CN107579724 B CN 107579724B
- Authority
- CN
- China
- Prior art keywords
- circuit
- pulse
- resistor
- driving circuit
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000000202 analgesic effect Effects 0.000 title claims abstract description 22
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 21
- 239000003990 capacitor Substances 0.000 claims description 25
- 230000003247 decreasing effect Effects 0.000 claims description 10
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 claims description 9
- 229910052744 lithium Inorganic materials 0.000 claims description 9
- 230000005611 electricity Effects 0.000 claims description 8
- 230000003321 amplification Effects 0.000 claims description 6
- 238000002955 isolation Methods 0.000 claims description 6
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010892 electric spark Methods 0.000 claims description 2
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 claims 1
- 229910001416 lithium ion Inorganic materials 0.000 claims 1
- 208000002193 Pain Diseases 0.000 abstract description 24
- 230000036407 pain Effects 0.000 abstract description 23
- 230000000694 effects Effects 0.000 description 4
- 230000000638 stimulation Effects 0.000 description 3
- 210000004556 brain Anatomy 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 208000000094 Chronic Pain Diseases 0.000 description 1
- 230000036592 analgesia Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 229940079593 drug Drugs 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 210000005036 nerve Anatomy 0.000 description 1
- 231100000957 no side effect Toxicity 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Electrotherapy Devices (AREA)
Abstract
The invention discloses a low-frequency analgesic device, which comprises a shell, a positive electrode plate, a negative electrode plate, a rechargeable battery and an internal circuit arranged in the shell, wherein the internal circuit comprises a charging circuit A1, a pulse generating circuit A2, a voltage stabilizing circuit A3, a key circuit A4, a boosting circuit A5 and a pulse driving circuit A6; the pulse driving circuit A6 comprises a first pulse driving circuit A61 and a second pulse driving circuit A62; the charging circuit A1 charges a rechargeable battery; the key circuit A4 controls the output pulse amplitude of the pulse generating circuit A2, the boosting circuit A5 boosts the voltage of 3.6V of the rechargeable battery and provides a driving power supply for the pulse driving circuit A6, and the pulse driving circuit A6 outputs pulse signals to the positive electrode plate and the negative electrode plate after isolating and amplifying the pulse signals. The invention can meet the individual pain relieving requirement of users, and has stable work and long service life.
Description
Technical Field
The invention relates to the field of medical instruments, in particular to a low-frequency analgesic device.
Background
The analgesic device is a device which can block pain spirit to send electric signals to brain by generating physical stimulus to human body so as to achieve the purpose of easing pain, has good help to the treatment and rehabilitation of chronic pain, and has almost no side effect compared with the drug analgesia. At present, many devices based on the skin electric signal stimulation principle generate regular electric signals, and the specific stimulation intensity cannot be selected according to the pain intensity, so that the pain effect cannot be achieved for the pain with strong pain sense, and the regular stimulation can be adapted to the organism for a short time when the device is used for a long time.
Disclosure of Invention
The invention aims to provide a low-frequency analgesic device, which solves the problems that the existing analgesic device cannot set pain intensity and pain effect independently and has poor analgesic effect.
In order to achieve the technical purpose, the invention adopts the following specific scheme: the low-frequency analgesic device comprises a shell, a positive electrode plate, a negative electrode plate, a rechargeable battery and an internal circuit, wherein the positive electrode plate and the negative electrode plate are arranged on the outer surface of the shell, and the internal circuit is packaged in the shell; the internal circuit comprises a charging circuit A1, a pulse generating circuit A2, a voltage stabilizing circuit A3, a key circuit A4, a boosting circuit A5 and a pulse driving circuit A6; the pulse driving circuit A6 comprises a first pulse driving circuit A61 and a second pulse driving circuit A62;
The charging circuit A1 charges the rechargeable battery, and the rechargeable battery provides power for the key circuit A4, the pulse generating circuit A2, the pulse driving circuit A6, the voltage stabilizing circuit A3 and the boosting circuit A5;
the voltage stabilizing circuit A3 provides constant voltage for the pulse generating circuit A2 and the key circuit A4 so as to ensure that the pulse generating circuit A2 and the key circuit work normally; the booster circuit A5 provides a driving voltage for the pulse driving circuit A6;
The key circuit A4 outputs a control signal to the pulse generating circuit A2, the pulse generating circuit A2 outputs two paths of pulse signals and one path of voltage control signal according to the control signal, the two paths of pulse signals are respectively input to the first pulse driving circuit A61 and the second pulse driving circuit A62, the first pulse driving circuit A61 performs isolation amplification on the pulse signals and then outputs the pulse signals to the positive electrode plate, and the second pulse driving circuit A62 performs isolation amplification on the pulse signals and then outputs the pulse signals to the negative electrode plate; the voltage control signal controls the magnitude of the voltage output from the booster circuit A5 to the pulse drive circuit A6.
Compared with the prior art, the invention has the beneficial effects that:
According to the invention, the intensity increasing key S2 or the intensity decreasing key S1 of the key circuit A4 is used for adjusting the pulse amplitude output by the pulse generating circuit A2, and meanwhile, the pulse generating circuit A2 outputs a control signal to the boosting circuit A5, so that the boosting circuit A5 outputs driving voltage to the pulse driving circuit A6 according to the pulse amplitude, and the pulse driving circuit A6 further outputs the isolated and amplified pulse to the electrode plate, thereby meeting the individual pain relieving requirement of a user; in the low-frequency analgesic device, the voltage stabilizing circuit A3 is additionally arranged in the internal circuit, so that the key circuit A4 and the pulse generating circuit A2 can stably work under constant voltage, and the service life of the low-frequency analgesic device is prolonged.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
The accompanying drawings, in which like reference numerals refer to identical or similar parts throughout the several views and which are used to provide a further understanding of the present application, are incorporated in and constitute a part of this specification:
FIG. 1 is a block diagram of a circuit connection of the present invention;
Fig. 2 is a circuit block diagram of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and specific embodiments thereof, and the exemplary embodiments of the present application and the descriptions thereof are used to explain the present application without unduly limiting the present application.
As shown in fig. 1 and 2, a low-frequency analgesic apparatus comprises a housing, a positive electrode sheet, a negative electrode sheet, a lithium rechargeable battery, and an internal circuit, wherein the positive electrode sheet and the negative electrode sheet are arranged on the outer surface of the housing, and the internal circuit is encapsulated in the housing; the internal circuit comprises a charging circuit A1, a pulse generating circuit A2, a voltage stabilizing circuit A3, a key circuit A4, a voltage boosting circuit A5, a pulse driving circuit A6, a positive electrode plate and a negative electrode plate; the pulse driving circuit A6 includes a first pulse driving circuit a61 and a second pulse driving circuit a62.
The charging circuit A1 charges a lithium rechargeable battery, and the lithium rechargeable battery provides 3.6v voltage for the key circuit A4, the pulse generating circuit A2, the pulse driving circuit A6, the voltage stabilizing circuit A3 and the voltage boosting circuit A5.
The voltage stabilizing circuit A3 stabilizes the voltage of 3.6V of the lithium rechargeable battery to a constant voltage of 3.0V, and outputs the constant voltage of 3.0V to the pulse generating circuit A2 and the key circuit A4 so as to ensure that the pulse generating circuit A2 and the key circuit work normally under the constant voltage of 3.0V.
The key circuit A4 outputs control signals to the pulse generating circuit A2, the pulse generating circuit A2 outputs two paths of pulse signals and one path of voltage control signals according to the control signals, the two paths of pulse signals are respectively input into the first pulse driving circuit A61 and the second pulse driving circuit A62, the first pulse driving circuit A61 carries out isolation amplification on the pulse signals and then transmits the pulse signals to the positive electrode plate, and the second pulse driving circuit A62 carries out isolation amplification on the pulse signals and then outputs the pulse signals to the negative electrode plate; the voltage control signal controls the magnitude of the voltage output from the booster circuit A5 to the pulse drive circuit A6.
The charging circuit A1 comprises a charging management chip U3, a self-locking switch K1 and a peripheral circuit connected with the charging management chip U3; the model of the charging management chip U3 is CN3082, the VIN end, namely the 4 th pin, of the charging management chip U3 is connected to the USB socket through the USB interface of the plug connector J2, and the LED interface of the plug connector J2 is connected with the 7 th pin of the charging management chip U3, so that the electric quantity of the lithium rechargeable battery can be displayed; the BAT input port of the charging management chip U3, namely the 5th pin is electrically connected with the anode of the lithium rechargeable battery, the cathode of the lithium rechargeable battery is grounded with the 3 rd pin which is the grounding port of the charging management chip U3, the 2 nd pin of the charging management chip U3 is grounded after passing through a resistor R23, and the 6 th pin of the charging management chip U3 is grounded after passing through R21 and R23 in sequence; the first end of the self-locking switch K1 is connected to the positive electrode of the rechargeable battery, the second end is electrically connected with the power input end of the key circuit A4, the power voltage detection input end of the pulse generation circuit A2, the power input end of the pulse driving circuit A6, the power input end of the voltage stabilizing circuit A3 and the power input end of the voltage boosting circuit A5, namely the output end of the charging circuit A1 outputs 3.6V voltage after passing through the self-locking switch K1, wherein the two ends of the self-locking switch K1 are connected with a capacitor C15 in parallel, so that the charging circuit A1 can plug in a power supply through a USB interface to charge the lithium rechargeable battery without replacement, the capacitor C15 can be used conveniently, and the electric spark generated when the self-locking switch K1 is opened or closed can be eliminated, so that the service life is prolonged.
The pulse generating circuit A2 comprises a singlechip U2, wherein the singlechip U2 adopts an STM8S003F3P6 type singlechip, a 16 th pin of the singlechip U2 is used as a first pulse signal output end, a 10 th pin is used as a second pulse signal output end, and a 9 th pin is used as a power input end; the 3 rd pin is used as a power supply voltage detection input end; the 16 th pin of the singlechip U2 is electrically connected with the pulse signal input end of the first pulse driving circuit A61, and the 10 th pin of the singlechip U2 is electrically connected with the pulse input end of the second pulse driving circuit A62, namely: the 16 th pin and the 10 th pin of the singlechip U2 output pulse signals, the 3 rd pin of the singlechip U2 is electrically connected to the second end of the self-locking switch K1 through a resistor R14, and the 3 rd pin is also grounded through a resistor R18.
The voltage stabilizing circuit A3 comprises an LDO U4, the model number of the LDO U4 is MC33761SN71-030G, the 1 st pin and the 3 rd pin of the LDO U4 are electrically connected with the second end of the self-locking switch K1, namely, the voltage of 3.6V is accessed, the output end of the LDO U4, namely, the 6 th pin, outputs a constant voltage VDD to the power input end of the singlechip U2, namely, the 9 th pin, the RST input end and the key circuit A4 through the inductor L2; the 6 th pin of the LDO U4 is grounded through a capacitor C12, and the voltage stabilizing circuit A3 further comprises a peripheral circuit electrically connected with the LDO U4, namely: the 1 st pin and the 3 rd pin of the U4 are grounded after passing through the capacitor C4, and the 2 nd pin of the LDO U4 is grounded, so that the voltage stabilizing circuit A4 stabilizes the voltage of 3.6v to the constant voltage VDD3.0v through the LDO U4.
The 6 th pin of the LDO U4 is connected to the 9 th pin of the singlechip through an inductor L2, and the 6 th pin of the LDO U4 is connected to the RST input end of the singlechip U2, namely the 4 th pin, through an inductor L2 and a resistor R13 in sequence, and the 4 th pin of the singlechip U2 is grounded through a capacitor C8; the 6 th pin of the LDO U4 is connected with a capacitor C5 in series through an inductor L2 and then grounded.
The key circuit A4 includes an intensity increasing key switch S2, an intensity decreasing key switch S1, a resistor R11 and a resistor R12, wherein one end of the intensity decreasing key switch S1 is grounded, the other end is electrically connected with a first signal input end of the single chip microcomputer U2, namely, an 11 th pin and one end of the resistor R11, one end of the intensity increasing key switch S2 is grounded, the other end is electrically connected with a second signal input end of the single chip microcomputer U2, namely, a 12 th pin and one end of the resistor R12, the other end of the resistor R11 and the other end of the resistor R12 are connected with a constant voltage VDD of the voltage stabilizing circuit A3, namely, the other end of the resistor R11 and the other end of the resistor R12 are connected with an inductor L2, namely, when the intensity increasing key switch S2 is pressed down, a2 nd pin output voltage control signal of the single chip microcomputer U2 controls the output voltage of the boost circuit A5 to increase, and the pulse driving circuit A6 outputs a pulse amplitude to increase; when the intensity-decreasing key switch S1 is pressed, the 2 nd pin output voltage control signal of the singlechip U2 controls the output voltage of the booster circuit A5 to decrease, and the pulse amplitude of the output pulse of the pulse driving circuit A6 is decreased. In this embodiment, the key circuit A4 further includes a capacitor C6 and a capacitor C7, the capacitor C6 is connected in parallel to two ends of the intensity decreasing key switch S1, and the capacitor C7 is connected in parallel to two ends of the intensity increasing key switch S2, so that an instant interference signal generated when the S1 and S2 are turned on or off can be avoided.
The boost circuit A5 comprises a boost chip U1 and a peripheral circuit, the boost chip U1 adopts TPS61040, the VIN end of the boost chip U1 is electrically connected with the second end of the self-locking switch K1 through a resistor R1, the EN end of the boost chip U1 is connected to the collector of an NPN triode Q2, the base of the NPN triode Q2 is connected to the control signal output end of the singlechip U2, namely the 2 nd pin, and the SW end of the boost chip U1 outputs a driving voltage V+ after passing through a diode D1;
Therefore, the VIN end of the boost chip U1 is connected with the power supply of the charging circuit A1, namely a 3.6V power supply, and the 2 nd pin of the singlechip U2 outputs a voltage control signal to control the on and off frequency of the NPN triode Q2, so that the voltage output from the boost chip U1 to the pulse driving circuit A6 is controlled, and the specific circuit connection mode is as follows: the emitter of NPN triode Q2 is grounded, the base electricity is connected to singlechip U2's 2 nd pin, the collecting electrode inserts boost chip U1's EN end and is connected with boost chip U1's VIN end electricity through resistance R5, boost chip U1's VIN end and still be connected to diode D1's positive pole through electric capacity C4 ground connection and still through inductance L1, diode D1 negative pole still is connected with electric capacity C3 first end, polarity electric capacity C2 positive pole, resistance R4 first end is electric simultaneously, boost chip U1's FB end is connected with resistance R6's first end and resistance R4's second end electricity, electric capacity C3 second end is connected with boost chip U1's earthing terminal simultaneously, polarity electric capacity C2 negative pole, resistance R4 second end, resistance R6's second end electricity ground connection, resistance R4 both ends parallelly connected with electric capacity C1.
Wherein the first pulse driving circuit a61 is the same as the second pulse driving circuit a 62; the first pulse driving circuit A61 comprises a transistor group T1, a resistor R7, a photoelectric coupler Q1 and a resistor R2, wherein the type of the photoelectric coupler Q1 is HCPL-2530, the grid electrode of the transistor group T1 is connected to the 16 th pin of the singlechip U2 through the resistor R7, the drain electrode of the transistor group T1 is connected to the cathode of a light emitting diode of the photoelectric coupler Q1, namely the 3 rd pin, the source electrode of the transistor group T1 is grounded, the anode of a light emitting diode of the photoelectric coupler Q1, namely the 2 nd pin end is electrically connected to the second end of the self-locking switch K1 through the resistor R3, namely the charging circuit A1 is connected
Vcc3.6v power supply; the output end of the photoelectric coupler Q1, namely the 7 th pin, is electrically connected with the positive electrode sheet, and the driving power input end of the photoelectric coupler Q1, namely the 8 th pin, is connected into the output driving voltage V+ of the booster circuit A5 through a resistor R2. In this way, the pulse electric signal is isolated and amplified by the photocoupler Q1, and then the pulse signal is transmitted to the positive electrode sheet.
The second pulse driving circuit a62 includes a transistor group T2, a resistor R15, a photo-coupler Q4, and a resistor R9, where the model of the photo-coupler Q2 is HCPL-2530, and the second pulse driving circuit A6 and the first pulse driving circuit A6 adopt the same circuit connection mode, i.e., the transistor group T2 corresponds to the transistor group T1, the photo-coupler Q4 corresponds to the photo-coupler Q1, the resistor R9 corresponds to the resistor R2, the resistor R15 corresponds to the resistor R7, and the gate of the transistor group T2 is connected to the 10 th pin of the single chip microcomputer U2 through the resistor R15.
In the present embodiment, the transistor group T1 and the transistor group T2 are NTR4170N
In this embodiment, the output protection circuit is further separately added to the first pulse driving circuit a61, where the output protection circuit includes a resistor R16, a resistor R17, a resistor R19, and a capacitor C9, one end of the resistor R16 is electrically connected to the 5 th pin, which is the grounding end of the photo coupler Q1, the other end is connected to one end of the resistor R17 and one end of the resistor R19, the other end of the resistor R17 is connected to one end of the capacitor C9 and the 13 th pin, which is the interrupt port of the single chip microcomputer U2, and the other end of the resistor R19 and the other end of the capacitor C9 are grounded. Therefore, when the voltage drop on the resistor R19 is increased to 0.9V, the voltage is subjected to delay filtering treatment by the resistor R17 and the capacitor C9 and then enters the 13 th pin of the singlechip U2, the pulse generation module is closed at the first rising edge, meanwhile, the power supply of the booster circuit A5 is stopped, equipment damage caused by misoperation of a user and the like is avoided, the reaction time is microsecond, and the method is greatly superior to a method for detecting current in an AD sampling mode of similar products.
The working principle of the invention is as follows: according to the pain sense of the pain part, the intensity increasing key S1 or the intensity decreasing key S2 of the key circuit A4 inputs a control signal for adjusting the pulse amplitude to the pulse generating circuit A2, and the pulse generating circuit A2 adjusts the output voltage of the booster circuit A5 according to the control signal to control the pulse amplitude output by the A6 driving circuit.
The pulse driving circuit A6 isolates and amplifies the pulse signals and then transmits the pulse signals to the electrode slice, so that the individual pain relieving requirement of a user is met; the voltage stabilizing circuit A3 outputs a constant power supply, so that the key circuit A4 and the pulse generating circuit A2 can work stably, and the use stability and the service life of the low-frequency analgesic device are improved.
When the pain relieving device is used, the positive electrode plate and the negative electrode plate of the pain relieving device are attached to the pain part, the self-locking switch K1 is pressed, the pain relieving device starts to work, at the moment, the positive electrode plate, the negative electrode plate of the pain relieving device and the surface skin of the pain part of a human body form a loop, at the moment, an electronic pulse is sent to the human body through the internal circuit of the pain relieving device to form a nerve blocking environment, the pain relieving signal returned by the brain is blocked, the pain relieving effect is achieved, and the pain relieving effect is achieved. The pulse amplitude of the analgesic output is increased by pressing the intensity increasing button switch S2 of the button circuit A4, so that the analgesic intensity is enhanced, and the pulse amplitude of the analgesic output is reduced by pressing the intensity decreasing button switch S1 of the button circuit A4, so that the analgesic intensity is reduced.
The embodiments described herein are intended to be illustrative and not limiting, and other modifications and equivalents will be apparent to those skilled in the art from the teachings herein.
Claims (5)
1. A low frequency analgesic apparatus, characterized by: the lithium ion battery comprises a shell, a positive electrode plate, a negative electrode plate, a rechargeable battery and an internal circuit, wherein the positive electrode plate and the negative electrode plate are arranged on the outer surface of the shell, and the internal circuit is encapsulated in the shell; the internal circuit comprises a charging circuit A1, a pulse generating circuit A2, a voltage stabilizing circuit A3, a key circuit A4, a boosting circuit A5 and a pulse driving circuit A6; the pulse driving circuit A6 comprises a first pulse driving circuit A61 and a second pulse driving circuit A62;
The charging circuit A1 charges the rechargeable battery, and the rechargeable battery provides power for the key circuit A4, the pulse generating circuit A2, the pulse driving circuit A6, the voltage stabilizing circuit A3 and the boosting circuit A5; the charging circuit A1 comprises a charging management chip U3, a self-locking switch K1 and a peripheral circuit connected with the charging management chip U3; the VIN end of the charging management chip U3 is connected to a USB socket, the BAT input port of the charging management chip U3 is electrically connected with the anode of the rechargeable battery, the cathode of the rechargeable battery and the grounding port of the charging management chip U3 are grounded, the first end of the self-locking switch K1 is connected to the anode of the rechargeable battery, and the second end of the self-locking switch K1 is electrically connected with the power input end of the key circuit A4, the power voltage detection input end of the pulse generation circuit A2, the power input end of the pulse driving circuit A6, the power input end of the voltage stabilizing circuit A3 and the power input end of the voltage boosting circuit A5; the charging circuit A1 can be connected with a power supply through a USB interface to charge the lithium rechargeable battery; the capacitor C15 can eliminate electric sparks generated when the self-locking switch K1 is opened or closed;
the voltage stabilizing circuit A3 provides constant voltage for the pulse generating circuit A2 and the key circuit A4 so as to ensure that the pulse generating circuit A2 and the key circuit work normally; the booster circuit A5 provides a driving voltage for the pulse driving circuit A6;
The key circuit A4 outputs a control signal to the pulse generating circuit A2, the pulse generating circuit A2 outputs two paths of pulse signals and one path of voltage control signal according to the control signal, the two paths of pulse signals are respectively input to the first pulse driving circuit A61 and the second pulse driving circuit A62, the first pulse driving circuit A61 performs isolation amplification on the pulse signals and then outputs the pulse signals to the positive electrode plate, and the second pulse driving circuit A62 performs isolation amplification on the pulse signals and then outputs the pulse signals to the negative electrode plate; the voltage control signal controls the voltage output by the booster circuit A5 to the pulse driving circuit A6;
The pulse generation circuit A2 comprises a singlechip U2, and the singlechip U2 comprises a first pulse signal output end, a second pulse signal output end and a power supply input end; the first pulse signal output end is electrically connected with the pulse signal input end of the first pulse driving circuit A61, and the second pulse signal output end is electrically connected with the pulse input end of the second pulse driving circuit A62;
The voltage stabilizing circuit A3 comprises an LDO U4, wherein the power input end of the LDO U4 is electrically connected to the second end of the self-locking switch K1, and the output end of the LDO U4 outputs a constant voltage VDD to the power input end and RST input end of the singlechip U2 and the power input end of the key circuit A4 through an inductor L2; the output end of the LDO U4 is grounded through a capacitor C12;
The key circuit A4 comprises an intensity increasing key switch S2, an intensity decreasing key switch S1, a resistor R11 and a resistor R12, wherein one end of the intensity decreasing key switch S1 is grounded, and the other end of the intensity decreasing key switch S1 is electrically connected with a first signal input end of the singlechip U2 and one end of the resistor R11; one end of the intensity increasing key switch S2 is grounded, and the other end of the intensity increasing key switch S is electrically connected with the second signal input end of the singlechip U2 and one end of the resistor R12; the other end of the resistor R11 and the other end of the resistor R12 are connected to the constant voltage VDD of the voltage stabilizing circuit A3;
the key circuit A4 further comprises a capacitor C6 and a capacitor C7, wherein the capacitor C6 is connected in parallel with two ends of the intensity-decreasing key switch S1, and the capacitor C7 is connected in parallel with two ends of the intensity-increasing key switch S2.
2. A low frequency analgesic apparatus as claimed in claim 1 wherein: the boost circuit A5 comprises a boost chip U1 and a peripheral circuit, wherein the VIN end of the boost chip U1 is electrically connected to the second end of the self-locking switch K1 through a resistor R1, the EN end of the boost chip U1 is connected to the collector electrode of an NPN triode Q2, the base electrode of the NPN triode Q2 is connected to the control signal output end of the singlechip U2, and the SW end of the boost chip U1 outputs a driving voltage V+ through a diode D1; the emitter of NPN triode Q2 is grounded, the collector is still connected with the VIN end electricity of singlechip U1 through resistance R5, the VIN end of boost chip U1 still is grounded through electric capacity C4 and still is connected to diode D1's positive pole through inductance L1, diode D1 negative pole still is connected with electric capacity C3 first end simultaneously, polarity electric capacity C2 positive pole, resistance R4 first end electricity, the FB end of boost chip U1 is connected with resistance R6's first end and resistance R4's second end electricity, electric capacity C3 second end is connected with boost chip U1's earthing terminal simultaneously, polarity electric capacity C2 negative pole, resistance R4 second end, resistance R6's second end electricity ground after connecting, resistance R4 both ends parallelly connected with electric capacity C1.
3. A low frequency analgesic apparatus as claimed in claim 1 wherein: the first pulse driving circuit a61 is the same as the second pulse driving circuit a 62; the first pulse driving circuit A61 comprises a transistor group T1, a resistor R7, a photoelectric coupler Q1 and a resistor R2, wherein the grid electrode of the transistor group T1 is connected to the first pulse signal output end of the singlechip U2 through the resistor R7, the drain electrode of the transistor group T1 is connected to the negative electrode of the light emitting diode of the photoelectric coupler Q1, and the source electrode of the transistor group T1 is grounded; the positive end of the light-emitting diode of the photoelectric coupler Q1 is electrically connected to the second end of the self-locking switch K1 through a resistor R3; the output end of the photoelectric coupler Q1 is electrically connected with the positive electrode sheet, and the driving power supply input end of the photoelectric coupler Q1 is connected with the output driving voltage V+ of the booster circuit A5 through a resistor R2.
4. A low frequency analgesic apparatus as claimed in claim 2 wherein: the first pulse driving circuit A61 is also separately provided with an output protection circuit, the output protection circuit comprises a resistor R16, a resistor R17, a resistor R19 and a capacitor C9, one end of the resistor R16 is connected to the grounding end of the photoelectric coupler Q1, the other end is connected with one end of the resistor R17 and one end of the resistor R19, the other end of the resistor R17 is connected with one end of the capacitor C9 and an interrupt port of the singlechip U2, and the other end of the resistor R19 is connected with the other end of the capacitor C9 and grounded.
5. A low frequency analgesic apparatus as claimed in claim 1 wherein: the constant voltage VDD output by the voltage stabilizing circuit A3 is connected to the RST input port of the single chip microcomputer U2 through a resistor R13, and the RST input end of the single chip microcomputer U2 is grounded through a capacitor C8; the output end of the LDO U4 is connected with a capacitor C5 in series through an inductor L2 and then grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710766608.9A CN107579724B (en) | 2017-08-30 | 2017-08-30 | Low-frequency analgesic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710766608.9A CN107579724B (en) | 2017-08-30 | 2017-08-30 | Low-frequency analgesic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107579724A CN107579724A (en) | 2018-01-12 |
| CN107579724B true CN107579724B (en) | 2024-06-28 |
Family
ID=61030294
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710766608.9A Active CN107579724B (en) | 2017-08-30 | 2017-08-30 | Low-frequency analgesic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107579724B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108553758A (en) * | 2018-02-13 | 2018-09-21 | 天津科技大学 | A kind of electronic impulse foot massager |
| CN117891301B (en) * | 2024-01-24 | 2024-08-09 | 深圳艾摩米智能科技有限公司 | Micro-current output circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101428165A (en) * | 2008-09-11 | 2009-05-13 | 中国人民解放军第二军医大学 | Physiotherapy equipment for treating peripheral nerve pathological changes of diabetes |
| CN203154605U (en) * | 2013-03-21 | 2013-08-28 | 华南理工大学 | Portable constant-pulse-current parturition analgesia instrument |
| CN207382275U (en) * | 2017-08-30 | 2018-05-18 | 四川艾力特电子科技有限公司 | A kind of low frequency Analgesic devices |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2683170Y (en) * | 2004-01-13 | 2005-03-09 | 余学飞 | Portable low frequency electronic pulse dysmenorrheal therapeutic equipment |
| KR200408546Y1 (en) * | 2005-12-01 | 2006-02-13 | 이우철 | Device for relieving pain using electric stimulation method of resonance type |
| CN105288845A (en) * | 2015-11-20 | 2016-02-03 | 陕西巴赫曼健康产品有限公司 | Muscle-soothing and pain-relieving pad therapeutic instrument |
| CN105763173B (en) * | 2016-02-18 | 2018-12-21 | 广东宝莱特医用科技股份有限公司 | A kind of electric pulse generator |
| CN206444022U (en) * | 2016-10-28 | 2017-08-29 | 四川艾力特电子科技有限公司 | Low frequency Analgesic devices |
-
2017
- 2017-08-30 CN CN201710766608.9A patent/CN107579724B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101428165A (en) * | 2008-09-11 | 2009-05-13 | 中国人民解放军第二军医大学 | Physiotherapy equipment for treating peripheral nerve pathological changes of diabetes |
| CN203154605U (en) * | 2013-03-21 | 2013-08-28 | 华南理工大学 | Portable constant-pulse-current parturition analgesia instrument |
| CN207382275U (en) * | 2017-08-30 | 2018-05-18 | 四川艾力特电子科技有限公司 | A kind of low frequency Analgesic devices |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107579724A (en) | 2018-01-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105013084A (en) | Electric stimulation physiotherapeutic instrument | |
| CN107579724B (en) | Low-frequency analgesic device | |
| CN109999342B (en) | Device for adjusting stimulating electric pulse for stimulating human body | |
| CN203139390U (en) | Electronic vomiting stopping instrument | |
| CN105763173B (en) | A kind of electric pulse generator | |
| CN203620080U (en) | Electronic pulse massager circuit | |
| CN105288846A (en) | Headache and sleep-assisting therapeutic instrument | |
| CN201750911U (en) | Multifunctional therapeutic massage instrument control circuit | |
| CN113134159B (en) | External electrical stimulation treatment system | |
| CN207382275U (en) | A kind of low frequency Analgesic devices | |
| CN106362285A (en) | Expandable totally-implantable cochlear implant system | |
| CN209358778U (en) | A kind of hearing aid low-voltage alarm circuit | |
| CN209356900U (en) | A kind of electric pulse output device of Bluetooth control | |
| CN206444022U (en) | Low frequency Analgesic devices | |
| CN208316379U (en) | Static electricity on human body's collection device | |
| CN109847187A (en) | A kind of headache therapeutic equipment | |
| CN207203226U (en) | A kind of therapeutic equipment for sick headache | |
| CN105521558A (en) | Intelligent pulse sweating suppression instrument with load detection function and use method | |
| CN202554749U (en) | Mobile terminal with electrotherapeutic function | |
| CN208626430U (en) | A kind of medical low-frequency electric pulse therapeutical instrument | |
| CN214260314U (en) | Sound stimulation and electric stimulation combined earphone | |
| CN209358777U (en) | A kind of low pressure alarming hearing aid | |
| CN218727936U (en) | Falling detection circuit of stimulation output polar plate and stimulation instrument | |
| CN203253059U (en) | Simple and convenient electronic rapid-analgesia therapeutic apparatus | |
| CN103055416A (en) | Electronic anti-emesis instrument |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |